WO2001018564A1

WO2001018564A1 - Digital x-ray imaging device

Info

Publication number: WO2001018564A1
Application number: PCT/US2000/024466
Authority: WO
Inventors: Paul P. Suni; Peter Vutz
Original assignee: Suni Imaging Microsystems, Inc.
Priority date: 1999-09-08
Filing date: 2000-09-06
Publication date: 2001-03-15

Abstract

A semiconductor image detection device (112) is provided for use in a digital X-ray image detection head including a sheet of scintillating material having a top surface and a bottom surface for emitting optical energy in response to X-ray energy impinged on the top surface. The image detection device (112) is operative to develop an image data signal in response to energy impinged thereon via the scintillating material. The image detection device (112) includes a substrate assembly (120) and a plurality of electrodes (132-136) formed over the substrate assembly (120). The substrate assembly (120) includes: an N-type layer (122) having a top surface; at least one P-type layer (124, 126) formed over the top surface of the N-type layer (122); and a buried channel (128) formed in the P-type layer (126) proximate the top surface of the P-type layer (126), the buried channel layer (128) having charge storage regions (138) formed therein. A P-N junction is formed between the top surface of the N-type layer (122) and the P-type layer (124). The P-N junction forms a potential barrier (130) for substantially preventing electron-hole pairs generated in the N-type layer (122) from diffusing upward toward the charge storage regions (138) of the buried channel (128).

Description

Specification

DIGITAL X-RAY IMAGING DEVICE

Cross Reference to Related Applications: Reference is made to and priority claimed from U.S. provisional application serial No.

60/152,908, filed September 8, 1999, entitled "Digital X-Ray Imaging Device".

BACKGROUND OF THE INVENTION: Field of the Invention:

The present invention relates generally to digital X-ray imaging systems, and more specifically to a semiconductor imaging detection device for use in a digital X-ray imaging detection head. Description of the Prior Art:

Semiconductor imaging systems typically include an imaging device that is implemented using either charged-coupled device (CCD) technology or complementary metal oxide semiconductor (CMOS) technology. Solid-state video imaging systems having CCD detectors are commonly used in scientific applications such as astronomical and space-based imaging systems, and in video-based consumer electronic devices such as hand-held video cameras. CCD detectors are commonly used for visual-spectrum applications spanning wavelengths in a range of 400 nanometers to about 700 nanometers, but can have an even wider range of application extending from the near infrared spectrum to the ultraviolet spectrum.

More recently, the medical community has embraced CCD cameras for imaging applications, particularly in the endoscopy field where the small size and sensitivity of CCD image devices is particularly appreciated. In a representative application, CCD's have been used in diagnostic X-ray imaging where the CCD detector takes the place of conventional film, and a computer-based image processing system having a cathode ray tube (CRT) display takes the place of a conventional viewing light-box. These CCD solid-state X-ray imaging systems offer the advantages of speed, sensitivity and convenient image storage. In addition, such systems facilitate data transmission as well as image processing capability.

In general, CCD X-ray detection methods include indirect X-ray detection methods and direct X-ray detection methods. Indirect detection is accomplished using a scintillator plate, which emits optical photons in response to X-rays, in conjunction with a CCD detector. The photons emitted by the scintillator plate produce a optical light image which is then detected by the CCD detector. The indirect method offers the advantage of higher sensitivity and benefits from use of off-the-shelf CCD detector products. In addition, the X-ray opacity provided by the scintillator plate aids in shielding the CCD from the effects of direct X-ray radiation.

FIG. 1 shows a diagram of a conventional digital X-ray imaging detection head 10 for use in a digital X-ray image system, the head 10 including a conventional semiconductor imaging detection device 12, a fiber optic face plate 14 disposed over a top surface of the detection device 12, and a sheet of scintillating material 16 disposed over a top surface of the fiber optic face plate 14. The detection device 12 is typically implemented using CCD technology, or CMOS technology.

The scintillating material 16 emits optical light from a bottom surface thereof in response to X-ray energy impinging on a top surface of the scintillating material. The optical light is conducted through fibers of the face plate 14 downward toward the surface of the detection device 12. Note however that a portion of the X-ray energy actually penetrates through the scintillating material 16.

It is desirable to block X-ray energy from impinging on the device 12 because X-ray energy tends to damage the device 12, and also generates noise in imaging signals generated by the device 12 in response to electromagnetic energy of other wavelengths incident thereon. Therefore, the fiber optic face plate 14 is provided for filtering or blocking X-ray energy which penetrates through the scintillating material 16 in order to prevent X-ray energy from impinging on the device 12. The face plate 14 is comprised of lead glass, or a similar material, which has a high atomic number in order to absorb X-rays which penetrate through the scintillating material. The conventional image detection device 12 is not designed to withstand X-ray energy impinging thereon, and without the fiber optic face plate 14. X-ray energy impinging on the device 12 results in a reduced signal to noise ratio and increased damage to the device 12. The face plate 14 therefore serves as a noise reduction device, and also prevents physical damage to the device 12. The semiconductor image detection device 12 is sensitive to both optical light and to X- ray energy. As is well understood in the art, electron-hole pairs are generated in the device 12 in response to both optical light, and in response to X-rays impinging on the device 12. A greater number of electron-hole pairs are generated by X-rays impinging on the device 12 than are generated by optical light impinging on the device 12. Optical light photons, such as green light having a wave length of 550 nanometers, generate one electron hole pair (ehp) per photon once absorbed. X-ray energy impinging on the device 12 can generate many thousands of electron hole pairs. The X-ray energy is typically in the range between 10 KeV and 100 KeV while the energy of light having a wavelength of 550 nanometers is only few eV.

Relationship (1), below, expresses the photon energy E of light or X-ray as a function of the frequency v of the light or X-ray, and the wavelength λ of the light or X-ray. _r E, = , h v = — he = \24eV * μ —m = p ,hoton energy ( ,.1.) A where 1 eV = 1.602 X 10^"12 erg, h = Planck's constant = 6.625 X 10^'27 erg* sec, and C = velocity of light = 3.00 X 10¹⁰ cm/sec.

As an example, a 550 nm optical (green) photon has photon energy determined in accordance with Relationship (1), _Evis = \.2 eV • ^μ urn^m = 2.26 eV (2)

.55μm Quantum efficiency (QE) defines the number of electron hole pairs generated per photon in a medium. A photon energy level of approximately 2.5 eV is required to generate one electron-hole pair (ehp) in silicon. Therefore, the quantum efficiency of silicon for a 550 mm optical (green) photon is determined in accordance with Relationship (3), below.

QEvis * ^{226β V} = 0.9 * 1 (3)

2.5e

As another example, a typical dental X-ray photon may have a photon energy of approximately 20,000 eV, that is E_x-ray ~ 20,000 eV.

Therefore, the quantum efficiency of a silicon substrate thick enough to absorb every X- ray photon incident thereon would be determined in accordance with Relationship (4), below.

OE,„_y * ^^ 8000 (4)

Typically, however, perhaps only 5% of the incident X-rays are absorbed in the silicon while the rest pass on through. Therefore, the quantum efficiency of a silicon substrate is determined in accordance with Relationship (5), below

8000 ---?- X 5% = 400 ehp per incident X-ray (5) xray

FIG. 2 shows a cross-sectional view of the conventional image detection device 12 (FIG.

1). The device 12 has a three phase CCD structure, and includes a plurality of electrodes 22-26 formed over a top surface of a substrate assembly 32 with a dielectric layer 33 formed between the electrodes and substrate assembly. The electrodes 22-26 are typically formed from polychrystalline silicon (POLY), and include: a POLY_l electrode 22 designated φi which is formed first in accordance with a fabrication process; a POLY_2 electrode 24 designated φ₂ "J- which is typically formed after the POLY_l electrode 22 is formed; and a POLY 3 electrode 26 designated φ₃ which overlaps both the Poly_l and Poly_2 electrodes.

The substrate assembly 32 typically includes a p-type epitaxial layer 34 which is lightly doped to achieve a doping density that is typically between lO¹" and 10¹ dopant atoms per cubic centimeter. The epitaxial layer 34 is formed over a P+ substrate 36 which is heavily doped to achieve a doping density that is typically between 10 and 10 dopant atoms per cubic centimeter.

The electrodes 22-26 are biased to control potentials in the silicon substrate assembly 32. A depletion region 38 is formed in the epitaxial layer 34 proximate the top surface of the epitaxial layer 34, and an electric field is generated in the depletion region 38 as a result of the biasing of the electrodes 22-26. A neutral region 42, in which no electric field is generated, typically exists in the epitaxial layer 34 between the depletion region 38 and the top surface of the substrate 36.

The conventional image detection device 12 also typically includes a buried channel layer 44 which is a shallow n-type layer (on the order of 0.5 micron deep) formed in a top portion of the epitaxial layer 34 proximate the top surface of the epitaxial layer, and additional implanted regions 46 which define charge storage regions in the buried channel layer 44 between the implanted regions 46 as further explained below. In the depicted device 12, each of the additional implanted regions 46 is a P-type implanted region providing a "barrier" implant region. Note however that each of the additional implanted regions 46 may also be implemented as an N-type implanted region, that is as a "well" implanted region. In accordance with the standard 3-phase structure of the conventional device 12. each of the implanted barrier regions 46 is implanted between associated Poly_l and Poly_2 electrodes 22 and 24 in an area disposed directly beneath an associated one of the Poly_3 electrodes 26. Also, in accordance with conventional self aligned fabrication processes for fabricating the device 12, the implanted barrier regions 46 are implanted before the associated Poly_3 electrode 26 is formed using a gap formed between the Poly_l and Poly_2 electrodes 22 and 24.

Electron-hole pairs are generated inside the substrate assembly 32 in response to electromagnetic energy, including optical light and X-ray energy, incident thereon. The electrons and holes are moved in response to electric field vectors generated in the depletion region 38. As further explained below, electrons generated in the depletion region 38 are swept into a potential well where they are held there until they are transferred to an outside readout circuit (not shown). Electrons that are generated in the non-depleted neutral region 42 wander randomly as minority carriers, but are eventually collected because the epitaxial layer 34 in which the neutral region lies is lightly doped and provides a relatively long life time for electrons.

Only a percentage of the charge generated in the P+ substrate 36 will be collected because the heavily doped P+ substrate provides a short life time for electron-hole pairs. The maximum depth at which electrons may be collected in the device 12 is referred to as the effective active depth 50 which defines a sensitive region of the device 12. The effective active depth 50 of a conventional image detection device 12 is typically 25 microns, as discussed in the next paragraph. In the depicted conventional device 12, an effective active boundary 52 is defined by the depth 50 in the P+ substrate 36. Electrons generated below the effective active boundary 52 are not collected because they recombine with holes in the P+ substrate 36 before they can reach the depletion region 38. However, electrons generated in the top portion 56 of the substrate 36 can reach the depletion region in their random wandering. The width of the region 56 is given by the minority carrier diffusion length 54, designated here as L_n The minority carrier diffusion length is given by L_n = VD_nτ_n (5a)

Where D_n is the diffusion coefficient for electrons, and τ_n is the minority carrier (electrons in this case) lifetime.

The diffusion coefficient for electrons in silicon is 39 cm7sec. A typical minority carrier lifetime in this application might be 0.1 microsecond. Using these values in Relationship 5a yields the minority carrier diffusion length, L_n = VD_πτ_n = 20 microns.

In a conventional device the effective active depth 50 is the sum of the epitaxial layer 34 thickness and the minority carrier diffusion length 54. A typical epitaxial layer thickness might be 5 microns. Using the minority carrier diffusion length as calculated above, gives the effective active depth as 5 microns + 20 microns = 25 microns for a typical conventional X-ray detection device.

One reason that an undesirable signal to noise ratio arises in the conventional detection device 12 in response to X-ray energy impinging thereon is that the sensitive region of the device 12, as defined by the depth 50, has a large volume. The minority carrier diffusion length 54 defines the distance the effective active depth 50 extends into the P+ substrate 36. The depth 54 is typically around 20 microns, as calculated above. Ideally, no electron-hole pairs would be collected in the P+ substrate 36. However, in practice, electron-hole pairs are effectively collected in an upper portion 56 of the P+ substrate 36 defined by the minority carrier diffusion length 54. Therefore, the total active volume of the device includes the depletion region 38, the neutral region 42 of the epitaxial layer 34, and the upper portion 56 of the P+ substrate 36.

Also shown in FIG. 2 is a potential well diagram 60 illustrating the storage of charge in potential wells 62 between corresponding ones of the barrier regions 46. As mentioned above, the implanted barrier regions 46 provide walls for maintaining charge between the implanted barrier regions 46. Because the implanted barrier regions 46 are as large as the associated Poly_3 electrodes 26 above them, the size of the charge storage areas 62 in which signal charge can be stored in the device 12 is limited. The large barrier regions 46 of the conventional device 12 provide desirable features such as confined charge and reduced dark leakage current. However, a drawback of the large barrier regions 46 is that they occupy approximately one third of the pixel area of the device 12, and no charge can be stored in the large barrier regions 46.

FIG. 3 shows a cross sectional view of the conventional semiconductor image detection device 12 (FIG. 1), the view illustrating an electron cloud effect. An x-ray photon 68 incident on the lattice of the substrate assembly 32 generates electrons in the substrate 32. For example, an X-ray incident on the lattice of the substrate may generate a 50 keV electron. This electron may produce a secondary cloud 70 of electrons that will hit other electrons and free them into the conduction band to generate a shower effect. Therefore, several thousand electrons may be generated by this original high energy electron. The cloud 70 of electrons will have some spatial extent. As an example, a few thousand electrons generated in the cloud 70 may be spread over a distance of 25 microns. Actually, the cloud is in the shape of a rounded cone that may be approximately 25 microns deep.

In the conventional detection device 12. the exemplary cloud 70 of electrons extends only slightly outside of the large sensitive region defined by the large effective active depth 50. Only a portion 72 of the electrons of the exemplary cloud 70 which lie in the sensitive region will be collected. A small remaining portion 74 of electrons of the cloud are not collected. When an x-ray is absorbed, all of the charge inside the portion 72 of the cloud 70, that is the resulting charge within the total active volume of the device 12 is collected and a noise spike is generated in the readout signal to create a salt and pepper effect in the image.

If the effective active depth 50 is decreased by a factor of five, this will decrease the probability of absorption by a factor of approximately five. Also, only that portion of the electrons generated inside the active depth will be collected. The remainder of the electrons in the cloud 70 will recombine or be swept away by an electric field depending on how the device is constructed. A problem associated with the conventional digital X-ray imaging detection head 10 is that it is relatively thick. The size and particularly the thickness of the detection head 10 is important because the detection head must be inserted into a patients mouth. The need for the fiber optic face plate 14 limits the ability to minimize the thickness of the detection head 10. The fiber optic face plate 14 is expensive, and it must be adhesively attached to the device 12. The necessity of adhesively attaching the face plate 14 to the device 12 causes problems in manufacturing yield because the device 12 is prone to damage during this adhesive attaching process.

Another problem associated with the conventional semiconductor image detection device 12 is that, without the fiber optic face plate to block X-rays, the dielectric structure 33 (FIG. 2) will be damaged by X-ray absorption.

What is needed is a digital X-ray imaging detection head having a smaller thickness so as to be easily inserted into a patients mouth.

What is also needed is an X-ray imaging detection head that can withstand a higher level of exposure to X-rays so that no face plate is required to block X-rays from impinging on the detection device.

Summary of the Invention:

It is an object of the present invention to provide a thinner digital X-ray imaging detection head.

It is also an object of the present invention to provide a semiconductor image detection device providing improved image quality, an improved signal to noise ratio, and higher tolerance to penetrating X-ray photons.

Briefly, a presently preferred embodiment of the present invention provides a semiconductor image detection device for use in a digital X-ray image detection head including a sheet of scintillating material having a top surface, and a bottom surface for emitting optical energy in response to X-ray energy impinged on the top surface. The image detection device is operative to develop an image data signal in response to energy impinged thereon via the scintillating material. The image detection device includes a substrate assembly, and a plurality of electrodes formed over the substrate assembly. The substrate assembly includes: an N-type layer having a top surface; at least one P-type layer formed over the top surface of the N-type layer; and a buried channel formed in the P-type layer proximate the top surface of the P-type layer, the buried channel layer having charge storage regions formed therein.

In accordance with the present invention, a P-N junction is formed between the top surface of the N-type layer and the P-type layer. The P-N junction forms a potential barrier for substantially preventing electron-hole pairs generated in the N-type layer from diffusing upward toward the charge storage regions of the buried channel. A digital X-ray image detection head using the semiconductor image detection device of the present invention does not require a fiber optic face plate for filtering or blocking X-ray energy. In an embodiment, the N-type layer is an N-type substrate, and the at least one P-type layer is an epitaxial layer grown over the N-type substrate. Also in an embodiment, the P-type layer includes: a heavily doped P+ layer formed over the top surface of the N-type layer and also having a top surface; and a lightly doped P-type layer formed over the top surface of the heavily doped P+ layer and also having a top surface, wherein the P-N junction is formed between the top surface of N-type layer and the heavily doped P+ layer.

The device may further include biasing means having a first terminal connected to the N- type layer, and a second terminal connected to the at least one P-type layer. The biasing means provides for increasing the potential barrier formed by the P-N junction.

In accordance with another aspect of the invention, the image detection device is formed in accordance with a fabrication process including the steps of: providing a semiconductor substrate assembly having a top surface; forming a buried channel layer in the substrate assembly proximate the top surface; forming a plurality of first electrodes over the substrate assembly; forming a plurality of second electrodes over the substrate assembly; positioning a barrier mask over the first and second electrodes and over the substrate assembly, the barrier mask having a plurality of holes formed therethrough, the holes being positioned to leave exposed portions of the substrate assembly between corresponding pairs of the first and second electrodes; applying ion gas to the exposed portions of the substrate assembly thereby forming a plurality of implanted barrier regions each being defined at least in part by an associated one of the holes in the barrier mask; and forming a plurality of third electrodes over the substrate assembly between associated ones of the first and second electrodes. In an embodiment, each of the implanted barrier regions is further defined by an edge portion of an associated one of the second electrodes that underlies the associated hole. The fabrication process also includes the step of forming a dielectric layer between the top surface of the substrate assembly and each of the first, second, and third electrodes. Important advantages realized by the semiconductor image detection device of the present invention include higher tolerance to penetrating X-ray photons, improved image quality, and improved signal to noise ratio. Another important advantage of the image detection device of the present invention is that it allows for a thinner digital X-ray imaging detection head.

The foregoing and other objects, features, and advantages of the present invention will be apparent from the following detailed description of the preferred embodiment which makes reference to the several figures of the drawing. IN THE DRAWING:

FIG. 1 is a block diagram generally illustrating a conventional digital X-ray imaging detection head including a semiconductor image detection device, a fiber optic face plate disposed over the detection device, and a sheet of scintillating material disposed over the face plate; FIG. 2 is a cross sectional view of the conventional semiconductor image detection device of FIG. 1 , the device having a large sensitive region, and also having extended implanted barrier regions which limit the size of charge storage regions in the device;

FIG. 3 is a second cross sectional view of the image detection device of FIG. 2, the view illustrating a scattering effect; FIG. 4 is a block diagram generally illustrating a digital X-ray imaging detection head including a semiconductor image detection device in accordance with the present invention;

FIG. 5 is a cross sectional view of a first embodiment of the image detection device in accordance with the present invention;

FIG. 6 is a potential well diagram illustrating electrical potentials as a function of depth into the image detection device of FIG. 4;

FIG. 7 is a cross sectional view of a second embodiment of the semiconductor image detection device of FIG. 4 in accordance with the present invention; and FIG. 8 is a top view of the image detection device of FIG. 7.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS :

FIG. 4 shows a block diagram illustrating a digital X-ray image detection head 100 in accordance with the present invention for use in a digital X-ray image system, the head 100 including a semiconductor image detection device 112 in accordance with the present invention, and a sheet of scintillating material 1 14 disposed over a top surface of the image detection device 112. The scintillating material 1 14 emits optical light from a bottom surface thereof in response to X-ray energy impinging on a top surface of the scintillating material. The detection device 112 is operative to generate image data which is provided via a readout signal in response to energy impinged on the device via the scintillating material. It is important to note that a portion of the X-ray energy actually penetrates through the scintillating material 114 and is impinged on the top surface of the device 112. However, the image detection device 1 12 is designed to withstand X-ray energy impinging directly thereon without the need for a fiber optic face plate to filter the X-rays, thereby providing for a thinner image detection head 100. Also, as further explained below, the detection device 112 is designated to be substantially insensitive to the penetrating X-ray energy and therefore the readout signal includes relatively small disturbances or noise resulting from X-ray absorption events. Therefore, an acceptable signal to noise ratio is maintained in the device 1 12 in spite of the X-ray energy impinging thereon. Also, as further explained below, the device 112 is designed to be robust enough so as not to be damaged beyond a specified tolerance by X-ray energy impinging directly thereon.

FIG. 5 is a cross-sectional view of the image detection device 1 12 (FIG. 4) of the present invention. In one embodiment of the present invention, the detection device 1 12 is implemented using CCD technology. However, in alternative embodiments, the image detection device 1 12 may be implemented using CMOS technology, or any other suitable semiconductor technology. The device 1 12 includes a substrate assembly 120 having a majority carrier-type substrate 122, a first epitaxial layer 124 grown over a top surface of the substrate 122, and a second epitaxial layer 126 grown over a top surface of the first epitaxial layer 124. In a preferred embodiment of the device 112 wherein the majority carriers are electrons, the substrate 122 is an N-type substrate, the first epitaxial layer 124 is a heavily doped P+ layer, and the second epitaxial layer 126 is a lightly doped P layer. In an alternative embodiment of the device 1 12 wherein the majority carriers are holes, the substrate 122 is a P-type substrate, the first epitaxial layer 124 is a heavily doped N+ layer, and the second epitaxial layer 126 is a lightly doped N layer.

In one embodiment, the N-type substrate 122 is doped to have a doping density that is between 10¹³ and 10¹⁶ dopant atoms per cubic centimeter, and the thickness of the N-type substrate 122 is between approximately 200 and 300 microns as illustrated at 123. Also, in the same embodiment, the P+ epitaxial layer 124 is heavily doped to have a doping density that is between 10¹⁶ and 10¹⁹ dopant atoms per cubic centimeter, and the thickness or depth of the P+ epitaxial layer 124 is between approximately 1 and 3 microns as illustrated at 125. Further, in this embodiment, the lightly doped epitaxial layer 126 has a doping density that is between 10¹³ and 10¹⁶ dopant atoms per cubic centimeter, and the thickness of the layer 126 is between approximately 4 and 5 microns as illustrated at 127.

The substrate assembly 120 also includes a buried channel layer 128 formed in a top portion of the lightly doped epitaxial layer 126 proximate the top surface of the epitaxial layer. In the preferred embodiment, the buried channel layer 128 is a shallow N-type layer which is approximately 0.5 micron deep. Additional implanted regions 130 are formed in the buried channel layer 128 as further explained below. In the preferred embodiment, each of the implanted regions 130 is a P-type implanted region providing a "barrier". Note however that each of the implanted regions 130 may also be implemented as an N-type implanted region, that is as a "well" implanted region. The P-type barrier regions define charge storage regions 138, also referred to as potential wells, formed in the buried channel layer 128 between the implanted regions 130. The structure of the barrier regions 130, and the process of forming the barrier regions 130, is further explained below. A dielectric layer 131 is formed over the lightly doped epitaxial layer 126, and a plurality of polysilicon electrodes 132-136 are formed over the dielectric layer. In the preferred embodiment wherein the device 1 12 is implemented using CCD technology, the dielectric layer

131 is formed from silicon dioxide layer. The electrodes 132-136 include a POLY_l electrode

132 designated φi , a POLY_2 electrode 134 designated φ₂ , and a POLY_3 electrode 136 designated φ₃ which overlaps a portion of both the Poly_l and Poly_2 electrodes. As mentioned above, charge is stored in the charge storage regions 138 of the buried channel layer 128 between corresponding ones of the barrier regions 130. In the first embodiment, the P-type barrier regions 130 are formed in accordance with the standard self-aligned fabrication process including the general steps of: initially forming the Poly_l and Poly_2 electrodes 132 and 134; implanting the barrier regions 130 using the gaps formed between associated ones of the Poly_l and Poly_2 electrodes 132 and 134 as a mask; and subsequently forming the Poly_3 electrodes 136 over associated ones of the barrier regions 130. However, as further explained below, the barrier regions 130 and electrodes 132-136 may also be formed in accordance with fabrication steps of the present invention. A depletion region 142, which is defined by a depletion region boundary line 144, is formed in the lightly doped epitaxial layer 126 proximate the buried channel layer 128. The electrodes 132-134 are biased to control potentials in the silicon substrate assembly 120. Note that an electric field is generated in the depletion region 142 as a result of this biasing. A neutral region 146, in which no electric field is generated, is located in the lightly doped epitaxial layer 126 outside and beneath the depletion region 142. Electron-hole pairs are generated inside the substrate assembly 120 in response to electromagnetic energy, including optical light and X-ray energy, incident thereon. The electron-hole pairs move in response to electric field vectors in the depletion region 142. As further explained below, electron-hole pairs generated in the depletion region 142 are swept into the charge storage regions 138 where they are held there until they are transferred via an image data signal, or readout signal, to a readout circuit (not shown). Electron-hole pairs that are generated in the non-depleted neutral region 146 wander as minority carriers but are eventually collected because the lightly doped epitaxial layer 126, in which the neutral region 146 lies, provides a relatively long life time for electron-hole pairs.

The sensitive volume of the substrate assembly 120 may be generally defined as the region in which charge may actually be collected to generate the image data signal which is transmitted to the readout circuit (not shown). The sensitive volume of the device 1 12 is directly proportional to the effective active depth of the device 112 which defines the maximum depth at which electron-hole pairs may be collected in the device 112. The effective active depth of the device 112 varies as a function of the energy of the penetrating photon. X-ray energy is typically in the range between 10 keV and 100 keV while the energy of light having a wavelength of 550 nanometers is only few eV. The effective active depth of the device 112 for optical photons is approximately between 1 and 2 microns and therefore, optical photons are usually absorbed in the depletion region 142.

The effective active depth of the device 112 for X-ray photons is the width of the lightly doped epitaxial layer 126 plus approximately one half the width of the heavily doped layer 124. X-ray photons which are absorbed in the P+ layer 124 generate hole-electron pairs that diffuse at random. Therefore, approximately half of the hole-electron pairs generated in the P+ layer 124 will diffuse upward toward the charge storage regions 138, and the other half diffuse downward to be collected by the N-type substrate 122 and have no effect. In a typical detection device according to the present invention the lightly doped P epitaxial layer 126 might be 4 microns thick and the heavily doped P+ layer 124 might be 2 microns thick. Thus the effective active depth would be 4 + (l/2)*2 = 5 microns. Most X-ray photons, which penetrate deep into the substrate, will be absorbed below the top surface of the N type substrate 122.

With reference to FIG. 2, the prior art device 12 (FIG. 1) has an effective active depth of approximately 25 microns. In the prior art, there is approximately a 20 micron depth (see previous discussion of minority carrier diffusion length 54 of FIG. 2) into the P+ substrate 36 (FIG. 2) at which a signal may be generated because the minority carrier lifetime in the P+ substrate 36 (FIG. 2) is not zero. By providing the N type substrate 122 (FIG. 5) in the device of the present invention, the minority carrier lifetime is not an issue because whatever electrons are generated in the N-type substrate cannot surmount the potential barrier of the PN junction between the N layer 122 and player 124.

The electron cloud extent for an X-ray is approximately 25 microns. If an X-ray absorption event occurs proximate the depletion region 142 in the lightly doped epitaxial layer 126, which is a very low probability event because X-rays are only lightly absorbed in silicon, then electrons are collected only in a region having a depth of 5 microns or less, and so only a small portion of the electron-hole pairs generated in the cloud will be collected to contribute to noise on the readout signal.

In accordance with the present invention, a P-N junction is formed between the top surface of the N-type substrate 122 and the heavily doped P+ layer 124. This P-N junction provides a potential barrier for preventing electron-hole pairs (usually generated by X-ray energy penetrating into the N-type substrate 122) from diffusing upward toward the charge storage regions 138 of the buried channel 128. Note that the N-type substrate 122 is rendered completely inactive by the P-N junction potential barrier because if an electron is generated in the N-type substrate 122 as a result of a photon penetrating to that depth, the electron cannot surmount the P-N junction potential barrier into the heavily doped epitaxial layer 124. Note that only one of the P type layers 124, 126 is needed to form a P-N junction with the N type substrate 122 in order to form a P-N junction potential barrier for preventing electron-hole pairs generated in the N-type substrate 122 from diffusing upward toward the charge storage regions.

In one embodiment of the present invention, the heavily doped epitaxial layer 124 is reverse biased with respect to the N-type layer 122 by a biasing voltage source 160. The biasing voltage 160 provides for increasing the P-N junction potential barrier height, thereby decreasing the occurrence of electron-hole pairs diffusing upward from the N type substrate to the charge storage regions. The biasing voltage for the P-N junction may be greater than or equal to 0 volts, with a polarity to reverse bias the junction. The biasing voltage source 160 has a negative terminal which is connected to the lightly doped P type layer 126 via a first contact 162, and a positive terminal which is connected to the N type substrate via a second contact 164. In one embodiment of the present invention, the first contact 162 is formed by a method including the steps of: etching a hole through the dielectric layer 131 into the layer 126; diffusing P+ ions into the hole; and depositing aluminum into the hole. Also in an embodiment, the second contact 164 is a backside contact formed by soldering the N type substrate 122 to a semiconductor package (not shown).

As mentioned above X-ray absorption events in the sensitive regions of the device 112 can cause spikes which are disturbances or noise in the readout signals generated as a result of charge collected in the charge storage areas 138. In the device 1 12 of the present invention, the number of spikes generated in the readout signal is decreased on the average by a factor of five as compared with prior art detection devices. Also, the magnitudes of the spikes generated in the device 1 12 are very small. In fact, the magnitude of each spike is on the same order of magnitude as the signal generated in response to a 550 nanometer photon. In fact when the silicon detection device of the present invention, having an active depth of 5 microns, is illuminated with no fiber optic face plate to absorb X-rays, there is minimal X-ray spike noise.

As described, the sensitive volume of the detection device 112 is effectively minimized by the P-N junction formed between the top surface of the N-type substrate 122 and the heavily doped P+ layer 124. The prior art teaches away from the solution of minimizing the sensitive volume of the detection device because of a commonly misunderstood aspect of X-ray absorption in silicon. Optical light is strongly absorbed by the silicon of the substrate assembly 120. The intensity of photons, such as for example 550 nanometer photons, decays very rapidly in the substrate assembly 120. Therefore, almost all of the photons are generated inside the depletion region 142 or proximate thereto. However, X-rays are not absorbed strongly by silicon because silicon has low atomic weight. The intensity of X-ray photons does not decay greatly as a function of the depth of penetration into the substrate assembly 120. Therefore, an X-ray photon will be absorbed at approximately equal probability throughout the whole semiconductor substrate assembly 120. A photon is said to be "absorbed" at the depth where it is absorbed into an atom thereby generating an electron-hole pair. For a typical X-ray photon energy level, less than 5% of the X-ray photons are absorbed in the entire thickness of the substrate assembly 120 which is several hundred microns. Therefore, minimizing the sensitive volume of the device 1 12 provides for minimizing the number of electron-hole pairs generated by X-ray photons which diffuse up into the charge storage areas 138. Reducing the sensitive volume from a 25 micron depth to a 5 micron depth would minimize the number of X-rays that are absorbed into the device 1 12 by a factor of 5. The X-ray absorption characteristics are also negative exponential with depth, as for the case of optical light. However, the slope of this exponential relationship (plot of photons absorbed as a function of depth into the substrate assembly 120) is minimal for X-ray photons. Therefore, by limiting the sensitive volume of the device 112 by a factor of 5, the number of X-ray photons absorbed in the device 112 will be reduced by a factor 5.

Another important problem solved by the present invention is radiation hardness. Radiation hardness is an important issue because the device 112 must be able to withstand a higher level of exposure to X-rays. In operation, the device 1 12 must be robust enough to last for an appreciable length of time in spite of the direct exposure to X-rays. When the device 1 12 is exposed to X-rays, the dielectric layer 131 formed between the electrodes 132-134 and substrate assembly 120 is charged up, and CCD thresholds shift in the same way that thresholds of transistors shift. X-rays incident on the device 1 12 have sufficient energy to generate oxide charges in the dielectric layer 131. These charges are lodged in the dielectric layer 131 proximate the semiconductor surface. This causes a shift in threshold voltage of the corresponding electrode.

The electrostatic potential in the silicon is, to a good approximation, described by relationship (6), below. VCHAN = VG - VTH (6) where VCHAN is equal to the potential in the silicon at the location of the buried channel 128 (where the charge packet will be held), V_G is equal to the voltage on the associated one of the gate electrodes 132-136, and V_τ,ι is equal to the threshold voltage of the undamaged structure. VTH is negative for an N-type buried channel structure, as is typical for CCD devices used in imaging applications.

X-ray damage is proportional to a change in the channel potential as described in accordance with Relationship (7), below.

VCHAN (damaged) = V_G - V_TH + VDAMAGE (7) where VD_ΛMAGE is equal to the change in channel voltage due to radiation damage in the oxide. VDAMΛGE may be approximately 1 to 3 volts for typical long term dental X-ray application.

Radiation damage in silicon also causes an increase in leakage current across the depletion region 142 between the neutral region 146 and the charge storage regions 138 in the buried channel 128. The leakage current can be minimized by operating the CCD in a multi pinned phase mode (MPP mode). In this mode, the gate is held sufficiently negative so that the potential at the silicon surface causes the surface to be inverted. Further (negative) increases in the gate voltage do not cause the potential profile in the silicon to become significantly more negative, i.e. the surface is said to be pinned.

FIG. 6 shows a potential well diagram at 200 illustrating potential in the device 1 12

(FIG. 5) as a function of depth into the substrate assembly 120 (FIG. 5). The depicted diagram illustrates the concept of surface pinning discussed above. Operation in the MPP mode can significantly reduce leakage currents, perhaps by a factor of more than 100. In order to minimize the increase in leakage current caused by radiation damage, it is necessary to insure that the silicon surface is adequately pinned. This is accomplished by making the gate voltage low level (i.e., the time when the surface is pinned) sufficiently more negative than would be necessary with an undamaged device as expressed in accordance with Relationship (8) below.

V g. low ⁼ V _g, low. undamaged " VDAMAGE (8) where V _g> |_0W is the clock voltage low level, and V_DAMAGE is the change in threshold voltage caused by the X-ray damage in the oxide of the dielectric layer 131. Because V_DAMAGE is typically 1 to 3 volts in the device of the present invention, the low level is 1 to 3 volts more negative than otherwise required in order to make sure that the surface will always be pinned, thus maintaining the low leakage current of MPP operation. Therefore, the device 1 12 is sufficiently insensitive to X-ray damage so that a fiber optic face plate is not required for use with the device 1 12. The key is to ensure that the device 1 12 is biased in such a way that when the threshold shifts occur, the device provides an adequate image readout function.

FIG. 7 shows a cross sectional view of a second embodiment at 220 of the image detection device 1 12 (FIG. 4) which has a three phase CCD structure. The device 220 includes a substrate assembly 222. In the depicted embodiment, the substrate assembly 222 is similar to the substrate assembly 120 (FIG. 5) of the device 1 12 in that it includes the majority carrier-type substrate 122, the first epitaxial layer 124 grown over the top surface of the substrate 122, and the second epitaxial layer 126 grown over the top surface of the first epitaxial layer 124. Therefore, in the depicted embodiment, the substrate assembly 222 has a P-N junction formed between the substrate 122 and the first epitaxial layer 124. However, the device 220 includes a buried channel 224 and electrodes which are different from the buried channel and electrodes of the device 1 12 (FIG. 5) and which provide improved performance as further explained below. Note that the improved buried channel 224 and electrodes of the device 220 may also be used to great advantage with other conventional substrate assembly components not forming a P-N junction. In the preferred embodiment, the buried channel layer 224 is a shallow N-type layer which is approximately 0.5 micron deep. Additional implanted regions 226 are formed in the buried channel layer 224 as further explained below. In the preferred embodiment, each of the implanted regions 226 is a P-type implanted region providing a "barrier". Note however that each of the additional implanted regions 226 may also be implemented as an N-type implanted region, that is as a "well" implanted region. The P-type barrier regions 226 define charge storage regions 228. also referred to as potential wells, in the buried channel layer 222 between the barrier regions 226. The structure of the barrier regions 226, and the process of forming them, is further explained below.

A dielectric layer 227 is formed over the lightly doped epitaxial layer 126. and a plurality of electrodes are formed over the dielectric layer 227 as further explained below. In the preferred embodiment wherein the device 1 12 is implemented using CCD technology, the dielectric layer 227 is formed from silicon dioxide layer. The present invention provides a process of forming the electrodes and the barrier regions 226 of the buried channel layer 224. The process includes the steps of: forming a plurality of first electrodes 232 designated φi over the dielectric layer 227; forming a plurality of second electrodes 234 designated φ₂ over the dielectric layer 227; positioning a barrier mask 236 over the first and second electrodes 232 and 234 and over the substrate assembly 222, the barrier mask 236 having a plurality of holes 237 formed therethrough, the holes 237 being positioned to leave exposed portions of the substrate assembly 222 between corresponding pairs of the first and second electrodes 232 and 234; implanting P type ions to the exposed portions of the substrate assembly 222 thereby forming a plurality of implanted barrier regions 226 each being defined at least in part by an associated one of the holes 237 in the barrier mask 236; and forming third electrodes designated φ₃ over the dielectric layer 227 between associated ones of the first and second electrodes 232 and 234, wherein a portion of each of the third electrodes 238 overlies an associated one of the barrier regions 226. In a preferred embodiment, each of the implanted barrier regions 226 is further defined by an edge portion 235 of an associated one of the second electrodes 234 that underlies the associated hole 237. In one embodiment of the present invention, each of the electrodes 232, 234, and 238 is formed from polysilicon. Also in an embodiment, boron ions are used to form the P-type barrier regions 226.

In accordance with the present invention, the implanted barrier regions 226, which provide walls for maintaining charge, are formed using the mask 236 as described above in order to limit the size of the barrier regions 226 so that the size of the charge storage areas 228 may be increased. During operation of the device, charge is stored in charge storage areas 228 formed in the buried channel layer 222 between corresponding ones of the barrier regions 226.

In a conventional three phase CCD, using a standard 3 -phase implant, the implanted barrier regions are typically formed in areas directly beneath the Poly_3 electrodes as described above with reference to FIG. 2. However, in conventional devices, the implanted barrier regions are large, and this limits the size of the potential wells 46 (FIG. 2) in which signal charge can be stored. The signal charge can only be stored between the implanted regions. In conventional devices, the implanted barrier regions 46 (FIG. 2) are implanted in accordance with a self- alignment process wherein a gap between the first and second electrodes essentially provides a mask. The conventional design, having extended implanted barrier regions, has desirable features such as confined charge and reduced dark leakage current. However, the extended implanted barrier regions 46 (FIG. 2) also have the undesirable characteristic of occupying approximately one third of the pixel area. In the present invention, the separate barrier mask 236 is provided for masking off the barrier region in order to form smaller barrier regions 226. The smaller barrier regions 226 provide for increased size charge storage areas 228 by narrowing the extent of the implanted barrier regions. The object is to make the implanted barrier region 226 narrower in order to achieve a larger charge storage area 228, or potential well, for storage of charge. The only drawback to narrowing the implanted barrier region 226 is the cost of the extra mask. All the electrodes are independently adjustable. By storing more charge, more signal can be generated, a better signal noise ratio can be achieved, and the device can be exposed with a wider latitude. In contrast, the smaller charge storage areas of prior art image detection devices will limit signal/noise ratios and exposure latitude. Fig. 8 shows a top view at 280 of a portion of the device 220 (FIG. 7) including a silicon substrate on which is deposited a plurality of N-type buried channel stops 284 along with a series of the overlapping gate electrodes 232, 234, and 238 shown at 286. The channel stops 284 are disposed below the polysilicon electrodes, and limit the spread of charge along the direction orthogonal to the channels stops. In the shift register, each group of three electrodes is associated with an individual detector or charge well, and a pixel which has a known location within the array of detectors. When a photon, such as a optical light photon, strikes a pixel, an electrical charge in the form of electrons, is stored in the associated charge packet. The greater the number of photons impinging on the pixel, the higher the charge of the packet. These charge packets can be moved over long distances along the CCD detector array with little degradation of the charge. Accordingly, each of the pixels stores a packet having a charge dependent upon the light intensity at an associated point in the scene.

An important aspect of the present invention is the layout of the electrodes 232, 234, and 238 which provide for maximizing the storage volume of electrons. By providing larger charge storage areas 228, more electrons may be stored, allowing for a larger range of exposure and therefore a larger signal to noise ratio in the readout signal of the device 220. By providing a larger storage volume and a larger signal to noise ratio, more incoming X-ray photons may be tolerated while maintaining an adequate image quality. As explained above, advantages of the present device include a thinner image detection head, simpler manufacturing, lower cost, higher yield, larger signal to noise ratio, improved image quality, and higher tolerance to penetrating X-ray photons.

Although the present invention has been particular'y shown and described above with reference to a specific embodiment, it is anticipated that alterations and modifications thereof will no doubt become apparent to those skilled in the art. It is therefore intended that the following claims be interpreted as covering all such alterations and modifications as fall within the true spirit and scope of the invention.

What is claimed is:

Claims

CLAIM

1. A semiconductor image detection device for use in a digital X-ray image detection head including a sheet of scintillating material having a top surface, and a bottom surface for emitting optical energy in response to X-ray energy impinged on the top surface, the image detection device being operative to develop an image data signal in response to energy impinged thereon via the scintillating material, comprising: a substrate assembly including, an N-type layer having a top surface, at least one P-type layer formed over said top surface of said N-type layer, a buried channel formed in said P-type layer proximate said top surface of said P- type layer, said buried channel layer having charge storage regions formed therein, wherein a P-N junction is formed between said top surface of said N-type layer and said P-type layer, said P-N junction forming a potential barrier for substantially preventing electron-hole pairs generated in said N-type layer from diffusing upward toward said charge storage regions of said buried channel; and a plurality of electrodes formed over said substrate assembly.

2. A semiconductor image detection device as recited in claim 1 wherein said N-type layer is an N-type substrate, and wherein said at least one P-type layer is an epitaxial layer grown over said N-type substrate.

3. A semiconductor image detection device as recited in claim 1 wherein said at least one P-type layer comprises: a heavily doped P+ layer formed over said top surface of said N-type layer and also having a top surface; and a lightly doped P-type layer formed over said top surface of said heavily doped P+ layer and also having a top surface, wherein said P-N junction is formed between said top surface of N-type layer and said heavily doped P+ layer.

4. A semiconductor image detection device as recited in claim 3 wherein said N-type layer is an N-type substrate, wherein said heavily doped P+ layer is formed as a first epitaxial layer grown over said N-type substrate, and wherein said lightly doped P-type layer is formed as a second epitaxial layer grown over said P+ layer.

5. A semiconductor image detection device as recited in claim 1 further comprising biasing means having a first terminal connected to said N-type layer, and a second terminal connected to said at least one P-type layer, said biasing means for increasing said potential barrier formed by said P-N junction.

6. A semiconductor image detection device as recited in claim 3 wherein said heavily doped P+ layer has a doping density that is approximately between 10¹⁶ and 10¹⁹ dopant atoms per cubic centimeter, and said lightly doped P-type layer has a doping density that is between 10¹³ and 10¹⁶ dopant atoms per cubic centimeter.

7. A semiconductor image detection device as recited in claim 3 said heavily doped P+ layer is formed to have a thickness between approximately 1 and 3 microns, and said lightly doped P-type layer is formed to have a thickness between approximately 4 and 5 microns.

8. A process of forming a semiconductor image detection device for use in a digital X-ray image detection head, comprising the steps of: providing a semiconductor substrate assembly having a top surface; forming a buried channel layer in said substrate assembly proximate said top surface; forming a plurality of first electrodes over said substrate assembly; forming a plurality of second electrodes over said substrate assembly; positioning a barrier mask over said first and second electrodes and over said substrate assembly, said barrier mask having a plurality of holes formed therethrough, said holes being positioned to leave exposed portions of said substrate assembly between corresponding pairs of said first and second electrodes; applying ion gas to said exposed portions of said substrate assembly thereby forming a plurality of implanted barrier regions each being defined at least in part by an associated one of said holes in said barrier mask; and forming a plurality of third electrodes over said substrate assembly between associated ones of said first and second electrodes.

9. A process of forming a semiconductor image detection device as recited in claim 8 further comprising the step of forming a dielectric layer between said top surface of said substrate assembly and each of said first, second, and third electrodes.

10. A process of forming a semiconductor image detection device as recited in claim 8 wherein each of said implanted barrier regions is further defined by an edge portion of an associated one of said second electrodes that underlies said associated hole.

1 1. A process of forming a semiconductor image detection device as recited in claim 8 wherein a portion of each of said third electrodes overlies an associated one of said barrier regions.

12. A process of forming a semiconductor image detection device as recited in claim 8 wherein each of said first, second, and third electrodes is formed from polysilicon.

13. A process of forming a semiconductor image detection device as recited in claim 8 wherein said buried channel layer is an N-type layer, and said implanted barrier regions are P- type regions.

14. A process of forming a semiconductor image detection device as recited in claim 13 wherein boron ions are used to form said barrier regions.

15. A process of forming a semiconductor image detection device as recited in claim 14 wherein said step of providing a substrate assembly comprises the steps of: forming an N-type layer having a top surface; and forming at least one P-type layer over said top surface of said N-type layer, said buried channel being formed in said P-type layer proximate said top surface of said P-type layer; wherein a P-N junction is formed between said top surface of said N-type layer and said P-type layer, said P-N junction forming a potential barrier for substantially preventing electron- hole pairs generated in said N-type layer from diffusing upward toward said charge storage regions of said buried channel.

16. A process of forming a semiconductor image detection device as recited in claim 15 wherein said N-type layer is an N-type substrate, and wherein said at least one P-type layer is an epitaxial layer grown over said N-type substrate.

1 17. A process of forming a semiconductor image detection device as recited in claim 15 wherein said step of forming at least one P-type layer comprises: forming a heavily doped P+ layer over said top surface of said N-type layer, said P+ layer also having a top surface; and

5 forming a lightly doped P-type layer over said top surface of said heavily doped P+

6 layer, said lightly doped P-type layer also having a top surface, wherein said P-N junction is

7 formed between said top surface of N-type layer and said heavily doped P+ layer.

18. A process of forming a semiconductor image detection device as recited in claim 17 i wherein said N-type layer is an N-type substrate, wherein said heavily doped P+ layer is formed

3 as a first epitaxial layer grown over said N-type substrate, and wherein said lightly doped P-type

4 layer is formed as a second epitaxial layer grown over said P+ layer.

1 19. A process of forming a semiconductor image detection device for use in a digital X-ray

2 image detection head, comprising the steps of:

3 providing a semiconductor substrate assembly having a top surface;

4 forming a buried channel layer in said substrate assembly proximate said top surface;

5 forming a dielectric layer over said top surface of said substrate;

6 forming a plurality of first electrodes over said dielectric layer;

7 forming a plurality of second electrodes over said dielectric layer;

8 positioning a barrier mask over said first and second electrodes, said barrier mask having

9 a plurality of holes formed therethrough, said holes being positioned to leave exposed portions 0 of said dielectric layer between corresponding pairs of sad first and second electrodes; 1 applying ion gas to said exposed portions of said dielectric layer thereby forming a 2 plurality of implanted barrier regions each being defined at least in part by an associated one of 3 said holes in said barrier mask; and 4 forming a plurality of third electrodes over said dielectric layer between associated ones 5 of said first and second electrodes.

1 20. A semiconductor image detection device operative to develop an image data signal in response to energy impinged thereon via the scintillating material, comprising: a substrate assembly including, an N-type layer having a top surface, at least one P-type layer formed over said top surface of said N-type layer, a buried channel formed in said P-type layer proximate said top surface of said P- type layer, said buried channel layer having charge storage regions formed therein, wherein a P-N junction is formed between said top surface of said N-type layer and said P-type layer, said P-N junction forming a potential barrier for substantially preventing electron-hole pairs generated in said N-type layer from diffusing upward toward said charge storage regions of said buried channel; and a plurality of electrodes formed over said substrate assembly.