WO2001037322A3 - System and method for product yield prediction using a logic characterization vehicle - Google Patents
System and method for product yield prediction using a logic characterization vehicle Download PDFInfo
- Publication number
- WO2001037322A3 WO2001037322A3 PCT/US2000/031839 US0031839W WO0137322A3 WO 2001037322 A3 WO2001037322 A3 WO 2001037322A3 US 0031839 W US0031839 W US 0031839W WO 0137322 A3 WO0137322 A3 WO 0137322A3
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- product yield
- yield prediction
- characterization vehicle
- combinatorial logic
- logic circuit
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
- H01L22/20—Sequence of activities consisting of a plurality of measurements, corrections, marking or sorting steps
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
- H01L22/30—Structural arrangements specially adapted for testing or measuring during manufacture or treatment, or specially adapted for reliability measurements
- H01L22/34—Circuits for electrically characterising or monitoring manufacturing processes, e. g. whole test die, wafers filled with test structures, on-board-devices incorporated on each die, process control monitors or pad structures thereof, devices in scribe line
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
Abstract
Priority Applications (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
AU17807/01A AU1780701A (en) | 1999-11-18 | 2000-11-17 | System and method for product yield prediction using a logic characterization vehicle |
US10/130,380 US6834375B1 (en) | 1999-11-18 | 2000-11-17 | System and method for product yield prediction using a logic characterization vehicle |
JP2001537778A JP3811649B2 (en) | 1999-11-18 | 2000-11-17 | System and method for product yield prediction using a logical characterization vehicle |
Applications Claiming Priority (6)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US16630899P | 1999-11-18 | 1999-11-18 | |
US16630799P | 1999-11-18 | 1999-11-18 | |
US09/442,699 | 1999-11-18 | ||
US09/442,699 US6449749B1 (en) | 1999-11-18 | 1999-11-18 | System and method for product yield prediction |
US60/166,307 | 1999-11-18 | ||
US60/166,308 | 1999-11-18 |
Publications (3)
Publication Number | Publication Date |
---|---|
WO2001037322A2 WO2001037322A2 (en) | 2001-05-25 |
WO2001037322A3 true WO2001037322A3 (en) | 2002-01-24 |
WO2001037322A9 WO2001037322A9 (en) | 2002-09-06 |
Family
ID=27389249
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/US2000/031839 WO2001037322A2 (en) | 1999-11-18 | 2000-11-17 | System and method for product yield prediction using a logic characterization vehicle |
Country Status (4)
Country | Link |
---|---|
US (2) | US6834375B1 (en) |
JP (2) | JP3811649B2 (en) |
AU (2) | AU1770301A (en) |
WO (1) | WO2001037322A2 (en) |
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Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3751647A (en) * | 1971-09-22 | 1973-08-07 | Ibm | Semiconductor and integrated circuit device yield modeling |
US5486786A (en) * | 1994-08-09 | 1996-01-23 | Lsi Logic Corporation | Process monitor for CMOS integrated circuits |
US5773315A (en) * | 1996-10-28 | 1998-06-30 | Advanced Micro Devices, Inc. | Product wafer yield prediction method employing a unit cell approach |
US5790479A (en) * | 1996-09-17 | 1998-08-04 | Xilinx, Inc. | Method for characterizing interconnect timing characteristics using reference ring oscillator circuit |
Family Cites Families (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4835466A (en) | 1987-02-06 | 1989-05-30 | Fairchild Semiconductor Corporation | Apparatus and method for detecting spot defects in integrated circuits |
JPH08148537A (en) | 1994-11-18 | 1996-06-07 | Toshiba Corp | Semiconductor integrated circuit |
US6124143A (en) | 1998-01-26 | 2000-09-26 | Lsi Logic Corporation | Process monitor circuitry for integrated circuits |
-
2000
- 2000-11-17 WO PCT/US2000/031839 patent/WO2001037322A2/en active Application Filing
- 2000-11-17 US US10/130,380 patent/US6834375B1/en not_active Expired - Lifetime
- 2000-11-17 JP JP2001537778A patent/JP3811649B2/en not_active Expired - Fee Related
- 2000-11-17 AU AU17703/01A patent/AU1770301A/en not_active Abandoned
- 2000-11-17 AU AU17807/01A patent/AU1780701A/en not_active Abandoned
- 2000-11-17 JP JP2001539173A patent/JP4070998B2/en not_active Expired - Fee Related
-
2002
- 2002-11-17 US US10/130,448 patent/US6795952B1/en not_active Expired - Lifetime
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3751647A (en) * | 1971-09-22 | 1973-08-07 | Ibm | Semiconductor and integrated circuit device yield modeling |
US5486786A (en) * | 1994-08-09 | 1996-01-23 | Lsi Logic Corporation | Process monitor for CMOS integrated circuits |
US5790479A (en) * | 1996-09-17 | 1998-08-04 | Xilinx, Inc. | Method for characterizing interconnect timing characteristics using reference ring oscillator circuit |
US5773315A (en) * | 1996-10-28 | 1998-06-30 | Advanced Micro Devices, Inc. | Product wafer yield prediction method employing a unit cell approach |
Non-Patent Citations (2)
Title |
---|
KHARE ET AL.: "Extraction of defect characteristics for yield estimation using the double bridge test structure", VLSITSA, 1991, pages 428 - 432, XP002939179 * |
KHARE ET AL.: "Yield-oriented computer-aided defect diagnosis", IEEE TRANS. ON SEMICONDUCTOR MANUFACTURING, vol. 8, 2 May 1995 (1995-05-02), pages 195 - 206, XP002939180 * |
Also Published As
Publication number | Publication date |
---|---|
AU1770301A (en) | 2001-05-30 |
US6795952B1 (en) | 2004-09-21 |
JP2003517193A (en) | 2003-05-20 |
WO2001037322A2 (en) | 2001-05-25 |
US6834375B1 (en) | 2004-12-21 |
JP2003514475A (en) | 2003-04-15 |
AU1780701A (en) | 2001-05-30 |
WO2001037322A9 (en) | 2002-09-06 |
JP4070998B2 (en) | 2008-04-02 |
JP3811649B2 (en) | 2006-08-23 |
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