WO2001039266A1 - Power semiconductor die attach process using conductive adhesive film - Google Patents

Power semiconductor die attach process using conductive adhesive film Download PDF

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Publication number
WO2001039266A1
WO2001039266A1 PCT/US2000/032176 US0032176W WO0139266A1 WO 2001039266 A1 WO2001039266 A1 WO 2001039266A1 US 0032176 W US0032176 W US 0032176W WO 0139266 A1 WO0139266 A1 WO 0139266A1
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WIPO (PCT)
Prior art keywords
die
film
substrate
area
adhesive film
Prior art date
Application number
PCT/US2000/032176
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French (fr)
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WO2001039266A9 (en
Inventor
Mark Pavier
Original Assignee
International Rectifier Corporation
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Filing date
Publication date
Application filed by International Rectifier Corporation filed Critical International Rectifier Corporation
Priority to AU19275/01A priority Critical patent/AU1927501A/en
Priority to JP2001540836A priority patent/JP3771843B2/en
Publication of WO2001039266A1 publication Critical patent/WO2001039266A1/en
Publication of WO2001039266A9 publication Critical patent/WO2001039266A9/en

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    • H01L24/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/27Manufacturing methods
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    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/50Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
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Definitions

  • This invention relates to semiconductor devices and more specifically relates to a novel process for the attachment of power semiconductor die to a thermally and/or electrically conductive support.
  • Power semiconductor die such as diodes, MOSFETs, IGBTs and the like are normally attached to conductive lead frames or other substrates by electrically conducting materials such as epoxies, thermoplastics, solders and the like or by electrically insulative materials if electrical isolation is desired. This process is carried out sequentially for individual die, after die singulation from a wafer and is time consuming.
  • adhesive films which may be electrically conductive or insulative are used as the die attach material for power semiconductors. Further, such adhesive films are attached to power semiconductor wafers before the die singulation stage.
  • Adhesive films are now used to bond low power integrated circuits to lead frames.
  • electrically conductive or insulative adhesive films are used to bond power semiconductors to substrates/lead frames.
  • Adhesive films in the prior art are pre-cut and placed onto a substrate before the placement of die on the film.
  • the resultant substrate/film/die assembly is then partially heat treated to promote adhesion between die/lead frame.
  • the adhesive film is placed onto the power semiconductor wafer before the die singulation stage.
  • the wafer/adhesive film stack is then sawn using conventional singulation methods, producing die with the adhesive film pre-attached.
  • the sawn die/film stack is then placed onto a substrate/lead frame before re-activating the adhesive via heat treatment to promote bonding and complete the curing.
  • conventional power semiconductor die attach involves use of epoxy or solder type adhesives in paste or liquid form. These materials often overspill from the edge of the die onto the substrate/lead frame during die bonding. This overspill limits the size of die that can be placed on the lead frame/substrate. By using an adhesive film, such overspill is eliminated. Larger die can then be placed in a package of a given size. Bond line thickness is also set by the adhesive film thickness and will be constant. Voids in the bond will also be absent.
  • Pre-bonding electrically conductive or (electrically isolating) adhesive film onto the power semiconductor wafer before die singulation also removes the requirement of an extra pick and place stage during assembly. Manufacturing equipment costs and cycle times are therefore reduced.
  • Figure 1 and 2 are top and side views respectively of a prior art die attach.
  • Figure 3 and 4 are top and side views respectively of a power semiconductor die attached to a substrate by a conductive adhesive film.
  • Figure 5 is a perspective diagram of a large area adhesive film and a semiconductor device wafer before singulation.
  • Figure 6 is a perspective diagram of Figure 5 after adhesion.
  • Figure 7 shows one die/film stack singulated from the assembly of Figure 6 before attachment to a substrate.
  • Figure 8 shows the assembly of Figure 8 after heat cure and bonding.
  • Figure 9 shows the process of the invention as applied to a die-on-die assembly.
  • Figure 10 shows the process of the invention as applied to a side-by - side assembly of die on a common substrate.
  • Figures 1 and 2 show a prior art power semiconductor die 10 and a conductive substrate 11 to which it is attached by a solder or epoxy attach material 12. Note that material 12 conventionally overspills, thereby limiting the maximum size of the die on a substrate of given area.
  • Figure 3 and 4 show the die 10 of Figures 1 and 2 where a thin, flexible adhesive film 13 is used to bond the die 10 and substrate 11.
  • Film 13 is electrically conductive or may be insulative, and is heat curable. The use of such film is seen in Figures 3 and 4 to eliminate overspill, thus enabling a larger area die 10 on the substrate 11 of same area as that of Figures 1 and 2.
  • Figure 5 shows a semiconductor device wafer 21 which contains a large number of identical power semiconductor die which are simultaneously processed in a conventional manner.
  • the wafer can contain hundreds of identical vertical conduction power MOSFET die which have P/N junctions in their top surface, conventionally covered by a conductive source electrode and a bottom conductive drain electrode.
  • the die of the wafer are singulated by sawing the wafer with conventional sawing apparatus.
  • the individual die are then to be mounted on a lead frame or other substrate by soldering or epoxy bonding the drain electrode of the die to the substrate.
  • an adhesive film 20 is cut to the size of the wafer, which can have a typical diameter of about 6 inches.
  • Film 20 is preferably a polyimide film such as that know as a "KAPTON” film which is frequently used in PC boards, "flex” circuits, for electrical winding insulation and the like.
  • the Kapton polyimide is an excellent insulator.
  • the wafer 21 and film 20 are then laid atop one another and are preheated to promote adhesion, but to not fully cure the film 20.
  • the film 20 and wafer 21 are simultaneously sawn at cut lines 22 into separate die.
  • a conventional frame or support keeps the separated film/die stacks in place and the stacks are then placed into a conventional pick and place device so that the singulated devices can be picked up and carried to a location to be mounted on respective heated lead frames or substrates in an automated manner.
  • the die/film stack 21/20 can be picked up and placed atop a respective substrate 11 with a conventional pick and place apparatus. Pressure is preferably applied to press the stack 21/20 onto the surface of the pre-heated substrate 11.
  • the die/film stack 21/20 and substrate 11 are heated to about 260 °C to fully heat cure film 21 to form a bond to the substrate 11.
  • FIG. 7 The structure of figures 7 and 8 can also be carried out to form die-on- die packages ( Figure 9) or side-by-side die packages ( Figure 10).
  • Figure 9 die-on- die packages
  • Figure 10 side-by-side die packages
  • die 30 and 31 having adhesive layers 20 and semiconductor die 21 may be mounted with die 31 atop die 30.
  • Die 30 and 31 may be diverse devices, for example, a MOSFET and a Schottky diode respectively and may be of different sizes or areas.
  • die 31 can be an integrated circuit.
  • layers 20 in Figure 9 can be a suitable electrically conductive adhesive film to allow back-to-back connection of die 30 and 31.
  • the die 30 and 31 may contain a MOSFET and an IC respectively (die 21).
  • thermoplastic adhesive paste such as Alpha Metals 383G (RHS) and UH2W-E polyimide film

Abstract

A large area adhesive film (20) is attached to a semiconductor wafer (21) containing a large number of identical structures. The film (20) and wafer (21) are then simultaneously singulated and the individual die with film thereon are then placed atop a lead frame and the film is completely cured to adhere the semiconductor die to the lead frame. Plural die can be mounted side-by-side on a common substrate (11), or one die can be mounted atop a second die which is on the substrate (11).

Description

POWER SEMICONDUCTOR DIE ATTACH PROCESS USING CONDUCTIVE ADHESIVE FILM
BACKGROUND OF THE INVENTION
This invention relates to semiconductor devices and more specifically relates to a novel process for the attachment of power semiconductor die to a thermally and/or electrically conductive support.
Power semiconductor die such as diodes, MOSFETs, IGBTs and the like are normally attached to conductive lead frames or other substrates by electrically conducting materials such as epoxies, thermoplastics, solders and the like or by electrically insulative materials if electrical isolation is desired. This process is carried out sequentially for individual die, after die singulation from a wafer and is time consuming.
BRIEF DESCRIPTION OF THE INVENTION
In accordance with the invention adhesive films which may be electrically conductive or insulative are used as the die attach material for power semiconductors. Further, such adhesive films are attached to power semiconductor wafers before the die singulation stage.
Adhesive films are now used to bond low power integrated circuits to lead frames. In accordance with the invention, electrically conductive or insulative adhesive films are used to bond power semiconductors to substrates/lead frames.
Adhesive films in the prior art are pre-cut and placed onto a substrate before the placement of die on the film. The resultant substrate/film/die assembly is then partially heat treated to promote adhesion between die/lead frame. In accordance with the invention, the adhesive film is placed onto the power semiconductor wafer before the die singulation stage. The wafer/adhesive film stack is then sawn using conventional singulation methods, producing die with the adhesive film pre-attached. The sawn die/film stack is then placed onto a substrate/lead frame before re-activating the adhesive via heat treatment to promote bonding and complete the curing.
There are a number of benefits provided by the invention. Thus, conventional power semiconductor die attach involves use of epoxy or solder type adhesives in paste or liquid form. These materials often overspill from the edge of the die onto the substrate/lead frame during die bonding. This overspill limits the size of die that can be placed on the lead frame/substrate. By using an adhesive film, such overspill is eliminated. Larger die can then be placed in a package of a given size. Bond line thickness is also set by the adhesive film thickness and will be constant. Voids in the bond will also be absent.
Pre-bonding electrically conductive or (electrically isolating) adhesive film onto the power semiconductor wafer before die singulation also removes the requirement of an extra pick and place stage during assembly. Manufacturing equipment costs and cycle times are therefore reduced.
BRIEF DESCRIPTION OF THE DRAWINGS
Figure 1 and 2 are top and side views respectively of a prior art die attach.
Figure 3 and 4 are top and side views respectively of a power semiconductor die attached to a substrate by a conductive adhesive film.
Figure 5 is a perspective diagram of a large area adhesive film and a semiconductor device wafer before singulation.
Figure 6 is a perspective diagram of Figure 5 after adhesion. Figure 7 shows one die/film stack singulated from the assembly of Figure 6 before attachment to a substrate.
Figure 8 shows the assembly of Figure 8 after heat cure and bonding. Figure 9 shows the process of the invention as applied to a die-on-die assembly.
Figure 10 shows the process of the invention as applied to a side-by - side assembly of die on a common substrate. DETAILED DESCRIPTION OF EMBODIMENTS OF THE INVENTION
Figures 1 and 2 show a prior art power semiconductor die 10 and a conductive substrate 11 to which it is attached by a solder or epoxy attach material 12. Note that material 12 conventionally overspills, thereby limiting the maximum size of the die on a substrate of given area.
Figure 3 and 4 show the die 10 of Figures 1 and 2 where a thin, flexible adhesive film 13 is used to bond the die 10 and substrate 11. Film 13 is electrically conductive or may be insulative, and is heat curable. The use of such film is seen in Figures 3 and 4 to eliminate overspill, thus enabling a larger area die 10 on the substrate 11 of same area as that of Figures 1 and 2.
The novel process of the invention is shown in Figures 5 to 8. Figure 5 shows a semiconductor device wafer 21 which contains a large number of identical power semiconductor die which are simultaneously processed in a conventional manner. Thus, the wafer can contain hundreds of identical vertical conduction power MOSFET die which have P/N junctions in their top surface, conventionally covered by a conductive source electrode and a bottom conductive drain electrode. The die of the wafer are singulated by sawing the wafer with conventional sawing apparatus. The individual die are then to be mounted on a lead frame or other substrate by soldering or epoxy bonding the drain electrode of the die to the substrate.
In accordance with the invention, an adhesive film 20 is cut to the size of the wafer, which can have a typical diameter of about 6 inches.
Film 20 is preferably a polyimide film such as that know as a "KAPTON" film which is frequently used in PC boards, "flex" circuits, for electrical winding insulation and the like. The Kapton polyimide is an excellent insulator. The wafer 21 and film 20 are then laid atop one another and are preheated to promote adhesion, but to not fully cure the film 20.
Thereafter, and as schematically shown in Figure 6 the film 20 and wafer 21 are simultaneously sawn at cut lines 22 into separate die. A conventional frame or support keeps the separated film/die stacks in place and the stacks are then placed into a conventional pick and place device so that the singulated devices can be picked up and carried to a location to be mounted on respective heated lead frames or substrates in an automated manner.
Thus, as shown in Figure 7 the die/film stack 21/20 can be picked up and placed atop a respective substrate 11 with a conventional pick and place apparatus. Pressure is preferably applied to press the stack 21/20 onto the surface of the pre-heated substrate 11.
Thereafter, the die/film stack 21/20 and substrate 11 are heated to about 260 °C to fully heat cure film 21 to form a bond to the substrate 11.
The structure of figures 7 and 8 can also be carried out to form die-on- die packages (Figure 9) or side-by-side die packages (Figure 10). Thus, in Figure
9, two identical die 30 and 31 having adhesive layers 20 and semiconductor die 21 may be mounted with die 31 atop die 30. Die 30 and 31 may be diverse devices, for example, a MOSFET and a Schottky diode respectively and may be of different sizes or areas. Alternatively, die 31 can be an integrated circuit. Further, layers 20 in Figure 9 can be a suitable electrically conductive adhesive film to allow back-to-back connection of die 30 and 31.
As shown in Figure 10, the die 30 and 31 may contain a MOSFET and an IC respectively (die 21).
Other film which can be used for film 20 includes thermoplastic adhesive paste such as Alpha Metals 383G (RHS) and UH2W-E polyimide film
(LHS).
Although the present invention has been described in relation to particular embodiments thereof, many other variations and modifications and other uses will become apparent to those skilled in the art. It is preferred, therefore, that the present invention be limited not by the specific disclosure herein, but only by the appended claims.

Claims

I CLAIM;
1. The process of connecting semiconductor die to a substrate: said process comprising the steps of adhering a thin, flexible, heat curable film which is at least partially cured and is of a first area, to a thin semiconductor wafer of a second area and which contains a plurality of laterally displaced, identical semiconductor die of respective third areas which are each substantially less than the area of said first area; thereafter simultaneously singulating both said heat curable film and said plurality of identical die to form individual elements each being of the area of said die and a matching area of adhesive film adhered to one surface of said die; thereafter applying said singulated die to the top surface of said substrate surface with the film on said die pressed against said top surface; and thereafter fully curing said film to firmly adhere said die to said substrate.
2. The process of Claim 1 wherein said substrate is a conductor lead frame.
3. The process of Claim 1 wherein said film is a polyimide.
4. The process of Claim 2 wherein said film is a polyimide.
5. The process of Claim 1 wherein said film on said die has the same area as that of said die after assembly onto said substrate.
6. The process of Claim 1 which includes the further step of adhering a second semiconductor die with a second adhesive film thereon to said substrate at a position laterally removed from the first die.
7. The process of Claim 1 which includes the further step of adhering a second die with a second adhesive film thereon to the top of said die secured to said substrate.
8. The process of Claim 1 wherein said first area is substantially identical to said second area.
9. The process of Claim 1 wherein said die and film are moved to said substrate by pick-and-place apparatus.
10. The process of Claim 1 wherein said adhesive film has a smaller area than said top surface of said die.
11. The process of Claim 7 wherein said adhesive film has a smaller area than said top surface of said die and wherein said second die and said second adhesive film both have the same area as said adhesive film.
PCT/US2000/032176 1999-11-24 2000-11-22 Power semiconductor die attach process using conductive adhesive film WO2001039266A1 (en)

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AU19275/01A AU1927501A (en) 1999-11-24 2000-11-22 Power semiconductor die attach process using conductive adhesive film
JP2001540836A JP3771843B2 (en) 1999-11-24 2000-11-22 Power semiconductor die bonding method using conductive adhesive film

Applications Claiming Priority (2)

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US16745699P 1999-11-24 1999-11-24
US60/167,456 1999-11-24

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US6620651B2 (en) 2001-10-23 2003-09-16 National Starch And Chemical Investment Holding Corporation Adhesive wafers for die attach application
US6781352B2 (en) 2002-12-16 2004-08-24 International Rectifer Corporation One cycle control continuous conduction mode PFC boost converter integrated circuit with integrated power switch and boost converter

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KR100885099B1 (en) * 2003-12-15 2009-02-20 후루카와 덴키 고교 가부시키가이샤 Wafer processing tape and method of producing the same
JP2006114649A (en) * 2004-10-14 2006-04-27 Fuji Electric Device Technology Co Ltd Method and apparatus for manufacturing semiconductor device
CN101807531A (en) * 2010-03-30 2010-08-18 上海凯虹电子有限公司 Ultra-thin chip packaging method and packaged body

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US6781352B2 (en) 2002-12-16 2004-08-24 International Rectifer Corporation One cycle control continuous conduction mode PFC boost converter integrated circuit with integrated power switch and boost converter

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KR20020059782A (en) 2002-07-13
TW501207B (en) 2002-09-01
KR100468233B1 (en) 2005-01-26
AU1927501A (en) 2001-06-04
CN1187804C (en) 2005-02-02
CN1399794A (en) 2003-02-26
JP3771843B2 (en) 2006-04-26
WO2001039266A9 (en) 2002-04-18
JP2003515929A (en) 2003-05-07

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