WO2001039406A2 - Method for effecting the interference-reduced operation of a radio transceiver and a radio transceiver - Google Patents

Method for effecting the interference-reduced operation of a radio transceiver and a radio transceiver Download PDF

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Publication number
WO2001039406A2
WO2001039406A2 PCT/DE2000/004160 DE0004160W WO0139406A2 WO 2001039406 A2 WO2001039406 A2 WO 2001039406A2 DE 0004160 W DE0004160 W DE 0004160W WO 0139406 A2 WO0139406 A2 WO 0139406A2
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WIPO (PCT)
Prior art keywords
processor device
radio
parts
time slots
ets
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PCT/DE2000/004160
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German (de)
French (fr)
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WO2001039406A3 (en
Inventor
Walter Wanasek
Franz Höllrigl
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Siemens Aktiengesellschaft
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Publication of WO2001039406A2 publication Critical patent/WO2001039406A2/en
Publication of WO2001039406A3 publication Critical patent/WO2001039406A3/en

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Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04BTRANSMISSION
    • H04B15/00Suppression or limitation of noise or interference
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04BTRANSMISSION
    • H04B2215/00Reducing interference at the transmission system level
    • H04B2215/064Reduction of clock or synthesizer reference frequency harmonics
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04BTRANSMISSION
    • H04B2215/00Reducing interference at the transmission system level
    • H04B2215/064Reduction of clock or synthesizer reference frequency harmonics
    • H04B2215/066Reduction of clock or synthesizer reference frequency harmonics by stopping a clock generator

Definitions

  • the invention relates to a method for interference-free operation of a radio and a corresponding radio, in particular a mobile radio telephone, a portable computer with an integrated mobile radio telephone or a receiving device, such as a pager device.
  • Advanced radio devices of this type have an extensive processor device or a plurality of processor devices, which are arranged in a small space and enable a simultaneous execution of a radio signal transmission and typical computer applications, such as word processing, for example. Since parts of the processor device or internal or external memory modules are supplied with a rectangular clock signal, and the data transmission between these parts takes place with steep edges, this can lead to harmonic interference in the area of the carrier frequencies, on the basis of which the radio signal transmission takes place, especially when they are received . In order to avoid mutual interference between the processor device and the high-frequency device, complex shieldings are generally arranged between the processor device or parts of the processor device and the high-frequency device. A disadvantage of such shields is their large space requirement, their high weight and the costs involved, which is another Miniaturization and weight reduction of portable radio devices stand in the way and increase the costs.
  • the invention is therefore based on the object of specifying methods for interference-free operation of radio devices and corresponding radio devices which require less shielding effort between the processor device and the radio-frequency device compared to conventional radio devices.
  • the invention is therefore based on the idea of switching off at least parts of the processor device in the case of time slot-oriented data transmission during the time slots in which the radio frequency device of the radio device receives data.
  • switching off also means “switching without a clock”, “operating at a reduced clock” or “disconnecting from the power supply”.
  • a further development of the invention provides that the digital signal processor of the radio is switched off during the reception time slots.
  • FIG. 1 simplified representation of a time slot structure
  • FIG. 2 simplified block diagram of a radio.
  • Figure 1 shows a simplified representation of the time slot structure of a GSM (Global System for Mobile Communication) transmission.
  • GSM Global System for Mobile Communication
  • This shows in the upper area a transmission time slot sts during which the radio frequency device HF of a radio device FG is active and sends data to an assigned base station.
  • a reception time slot ets is shown in the lower area, during which data transmitted by an assigned base station is received.
  • a monitor time slot mts is shown, during which signals or signal field strengths of neighboring base stations are recorded or ascertained.
  • data also means useful data, such as, for example, voice or text data, or signaling data, such as, for example, control or control data.
  • FIG. 2 shows a radio device FG which has a logic part which is essentially formed by a processor device PE (PE1, PE2).
  • First parts PE1 of this processor device control a radio frequency device HF, process signals and received by the radio frequency device HF prepare signals to be transmitted by the high-frequency device HF.
  • the high-frequency device can also include amplifiers, mixers, filters, oscillators and a synthesizer circuit.
  • An antenna ANT is used to receive and send radio signals.
  • Second parts PE2 of the processor device are generally not required in whole or in part for receiving signals at least during the reception time slots and are therefore completely or partially switched off during these time slots.
  • a transmission control line TST and a receive control line RST are provided, by means of which the high-frequency device HF at the beginning of a reception time slot ETS is switched to reception and STS is switched to transmission at the beginning of a transmission time slot.
  • the signal of the receive control line RST is also fed to the first PE1 and / or the second part PE2 of the processor device, depending on the embodiment variant, so that the second part PE2 of the processor device can always be completely or partially switched off during the reception time slot.
  • This switch-off time can be signaled to the second part PE2 of the processor device either directly via the signal of the reception control line RST or indirectly via the first part PE1 of the processor device and the interface SSI, depending on the embodiment.
  • control lines for both versions are shown.
  • An embodiment variant of the invention provides that the preparation for switching off the second part PE2 of the
  • the necessary control signals can be generated from the first part PE1 of the processor device or derived from synthesizer control signals, since the synthesizer also requires a lead time for settling.
  • the second part PE2 of the processor device is switched on analogously to the switch-off described above with or after the end of the reception time slot ets.
  • a further development of the invention provides that the switching off of the second part PE2 of the processor device during monitor time slots mts is carried out analogously to the switching off during reception time slots ets.
  • the processor device PE can be, for example, one or more microcontrollers or one or more microprocessors and memory devices or other control components in the form of microcircuits.
  • the memory device which can also be one or more RAM, ROM or flash memory modules, or parts of the memory device can be implemented as part of the processor device or as external memory device which is located outside the processor device and is connected to the processor device PE by lines or a bus system.
  • processor and memory device are not integrated in one module.
  • further components can be arranged inside or outside the processor device PE, the components of which are assigned to the processor device, belong to the processor device, are controlled by the processor device or control the processor device, and their functions are related to a processor device. tion are well known to a person skilled in the art, and which is therefore not dealt with in more detail at this point.
  • the different components can exchange data with the processor device PE via a bus system or input / output interfaces and, if appropriate, suitable controllers.
  • the processor device PE controls essential elements and functions of the radio, regulates the communication and signaling sequence, reacts to keyboard inputs and is responsible for the display or supports it.
  • the processor device can contain a multiplicity of clocked computing elements, such as A / D or D / A converters, buffers for samples of received signals, a digital signal processor, one or more microprocessors and further hardware elements for signal processing , Parts of the processor device PE are clocked by a voltage-controlled oscillator arranged in the high-frequency device HF, the signals required for the clocking having a sinusoidal shape which have no significant harmonics in the area of the carrier frequencies. Other parts of the processor device PE or external memory elements output rectangular signals, which can lead to considerable harmonics in the area of the carrier frequencies.
  • clocked computing elements such as A / D or D / A converters, buffers for samples of received signals, a digital signal processor, one or more microprocessors and further hardware elements for signal processing .
  • Parts of the processor device PE are clocked by a voltage-controlled oscillator arranged in the high-frequency device HF, the signals required for the clocking having a sinusoidal shape which have no significant harmonics in the area
  • a special development of the invention therefore provides for at least partially switching off the parts PE2 of the processor device which are not required during the reception time slots and which are supplied with rectangular signals or from which rectangular signals are output.
  • Another embodiment variant of the invention provides that during the receive time slot the switched-on part of the processor device PEI A / D converter, buffer memory for sample values output by the A / D converters and a Ti C ⁇ __ MNJ h- 1
  • H- M s ⁇ 3 CD y rt PPP H- CD ONH £ ⁇ ⁇ o er H- H ⁇ iQ H- rt «C ⁇ P CD r P t ⁇ ⁇ H- ⁇ ⁇ H- tr ⁇ ⁇ o er C ⁇ ⁇ ⁇ tNJ o ⁇ H rt rt H- C ⁇ CD H- H ⁇ rt H- N CD rt P er H- d CD * H- H- d li P rt ⁇ rt er ⁇ o H • ⁇ ⁇ C ⁇ PPOP H- ⁇ rt ⁇ ⁇ H-
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Abstract

In order to effect the interference-reduced operation of a radio transceiver, at least some parts of the processor device are switched off in receive time slots in order to avoid the occurrence of harmonic interferences.

Description

Beschreibungdescription
Verfahren zum störungsreduzierten Betreiben eines Funkgerätes und FunkgerätMethod for operating a radio with reduced interference and radio
Die Erfindung betrifft ein Verfahren zum störungsreduzierten Betreiben eines Funkgerätes und ein entsprechendes Funkgerät, insbesondere ein Mobilfunktelefon, einen tragbaren Computer mit integriertem Mobilfunktelefon oder ein Empfangsgerät, wie beispielsweise eine Pagereinrichtung.The invention relates to a method for interference-free operation of a radio and a corresponding radio, in particular a mobile radio telephone, a portable computer with an integrated mobile radio telephone or a receiving device, such as a pager device.
Die rasante technische Entwicklung auf den Gebieten der Computertechnik und Telekommunikation hat in den letzten Jahren insbesondere im mobilen Bereich zu einer Konvergenz von Sprach- und Datendiensten geführt. Im Zuge dieser Entwicklung gewinnen kompakte tragbare Kommunikationsendgeräte, mittels derer einerseits Sprach- und andererseits Datendienste ausführbar sind, zunehmend an Bedeutung.The rapid technical development in the fields of computer technology and telecommunications has led to a convergence of voice and data services, especially in the mobile sector. In the course of this development, compact portable communication terminals, by means of which voice and data services can be carried out on the one hand, are becoming increasingly important.
Fortgeschrittene Funkgeräte dieser Art weisen eine umfangreiche Prozessoreinrichtung oder mehrere Prozessoreinrichtungen auf, die auf kleinem Raum angeordnet sind, und eine gleichzeitige Ausführung einer Funksignalübertragung und typischer Computerapplikationen, wie beispielsweise Textverarbeitung, ermöglichen. Da Teilen der Prozessoreinrichtung oder internen oder externen Speicherbausteinen ein rechteckförmiges Taktsignal zugeführt wird, und die Datenübertragung zwischen diesen Teilen mit steilen Flanken erfolgt, kann dies - insbesondere beim Empfang - zu Oberwellenstörungen im Bereich der Träger- frequenzen, auf deren Basis die Funksignalübertragung erfolgt, führen. Um gegenseitige Störungen zwischen der Prozessoreinrichtung und der Hochfrequenzeinrichtung zu vermeiden, werden heute in der Regel aufwendige Schirmungen zwischen Prozessoreinrichtung oder Teilen der Prozessoreinrichtung und der Hochfrequenzeinrichtung angeordnet. Nachteilig an derartigen Schirmungen ist deren großer Platzbedarf, ihr hohes Gewicht und die dafür anfallenden Kosten, was einer weiteren Miniaturisierung und Gewichtsreduzierung von tragbaren Funkgeraten entgegensteht und die Kosten erhöht.Advanced radio devices of this type have an extensive processor device or a plurality of processor devices, which are arranged in a small space and enable a simultaneous execution of a radio signal transmission and typical computer applications, such as word processing, for example. Since parts of the processor device or internal or external memory modules are supplied with a rectangular clock signal, and the data transmission between these parts takes place with steep edges, this can lead to harmonic interference in the area of the carrier frequencies, on the basis of which the radio signal transmission takes place, especially when they are received , In order to avoid mutual interference between the processor device and the high-frequency device, complex shieldings are generally arranged between the processor device or parts of the processor device and the high-frequency device. A disadvantage of such shields is their large space requirement, their high weight and the costs involved, which is another Miniaturization and weight reduction of portable radio devices stand in the way and increase the costs.
Der Erfindung liegt daher die Aufgabe zugrunde, Verfahren zum storungsreduzierten Betrieb von Funkgeraten und entsprechende Funkgerate anzugeben, welche gegenüber herkömmlichen Funkgeraten einen geringeren Schirmungsaufwand zwischen Prozessoreinrichtung und Hochfrequenzeinrichtung erfordern.The invention is therefore based on the object of specifying methods for interference-free operation of radio devices and corresponding radio devices which require less shielding effort between the processor device and the radio-frequency device compared to conventional radio devices.
Diese Aufgabe wird durch die Merkmale der unabhängigen Ansprüche gelost. Vorteilhafte und zweckmäßige Weiterbildungen ergeben sich aus den abhangigen Ansprüchen.This task is solved by the features of the independent claims. Advantageous and expedient further developments result from the dependent claims.
Die Erfindung beruht also auf dem Gedanken, bei einer zeit- schlitzorientierten Datenübertragung wahrend der Zeitschlit- ze, in denen die Hochfrequenzeinrichtung des Funkgerätes Daten empfangt, zumindest Teile der Prozessoreinrichtung abzuschalten.The invention is therefore based on the idea of switching off at least parts of the processor device in the case of time slot-oriented data transmission during the time slots in which the radio frequency device of the radio device receives data.
"Wahrend der Zeitschlitze abzuschalten" umfaßt dabei auch"To switch off during the time slots" also includes
Falle, m denen die Prozessoreinrichtung schon vor, insbesondere kurz (beispielsweise weniger als 1 ms) vor, dem Zeit- schlitzbegmn abgeschaltet wird und erst nach, insbesondere kurz (beispielsweise weniger als 1 ms) nach, Zeitschlitzende wieder eingeschaltet wird.Cases in which the processor device is switched off before, in particular short (for example less than 1 ms) before, the time slot start and is only switched on again after, in particular short (for example less than 1 ms) after, the end of the time slot.
"Abschalten" bedeutet im Rahmen dieser Anmeldung auch "taktlos schalten", "mit reduziertem Takt betreiben" oder "von der Stromversorgung trennen" .In the context of this application, "switching off" also means "switching without a clock", "operating at a reduced clock" or "disconnecting from the power supply".
Durch die abgeschalteten Teile, und die damit verbundenen Leitungen werden keine Oberwellenschwingungen erzeugt, so daß die Schirmung dieser Teile zumindest reduziert oder vereinfacht werden kann. Dadurch ist es möglich, kleinere und leichtere Funkgerate zu realisieren, ohne eine Zunahme derNo harmonic vibrations are generated by the switched-off parts and the lines connected to them, so that the shielding of these parts can at least be reduced or simplified. This makes it possible to implement smaller and lighter radio devices without increasing the
Störungen der Hochfrequenzeinrichtung durch die Prozessorein- richtung in Kauf nehmen zu müssen bzw. bei gleichem Schirmungsaufwand, Empfangsstörungen zu reduzieren.Interference of the radio frequency device by the processor having to accept the direction or, with the same shielding effort, reducing interference.
Eine Weiterbildung der Erfindung sieht vor, dass während der Empfangszeitschlitze der Digitale Signalprozessor des Funkgerätes abgeschaltet wird.A further development of the invention provides that the digital signal processor of the radio is switched off during the reception time slots.
Die Erfindung wird im Folgenden anhand bevorzugter Ausführungsbeispiele näher beschrieben, wobei die darin enthaltenen Merkmale auch in anderen Kombinationen durch die Erfindung erfasst sein können. Zur Erläuterung dieser Ausführungsbeispiele sollen nachstehend aufgelistete Figuren dienen:The invention is described in more detail below on the basis of preferred exemplary embodiments, the features contained therein also being able to be covered by the invention in other combinations. The figures listed below are intended to explain these exemplary embodiments:
Figur 1 vereinfachte Darstellung einer Zeitschlitzstruktur;Figure 1 simplified representation of a time slot structure;
Figur 2 vereinfachtes Blockschaltbild eines Funkgerätes.Figure 2 simplified block diagram of a radio.
Figur 1 zeigt eine vereinfachte Darstellung der Zeitschlitzstruktur einer GSM- (Global System for Mobile Communication) Übertragung. Diese zeigt im oberen Bereich einen Sendezeitschlitz sts, während dessen die Hochfrequenzeinrichtung HF eines Funkgerätes FG aktiv ist und Daten zu einer zugeordneten Basisstation sendet. Im unteren Bereich ist ein Empfangszeitschlitz ets dargestellt, während dessen von einer zuge- ordneten Basisstation gesendete Daten empfangen werden. Außerdem ist ein Monitorzeitschlitz mts dargestellt, während dessen Signale bzw. Signalfeldstärken benachbarter Basissta- tionen erfasst bzw. ermittelt werden. Unter „Daten' versteht man im Rahmen dieser Anmeldung auch Nutzdaten, wie beispiels- weise Sprach- oder Textdaten, oder Signalisierungsdaten, wie beispielsweise Steuer- oder Kontrolldaten.Figure 1 shows a simplified representation of the time slot structure of a GSM (Global System for Mobile Communication) transmission. This shows in the upper area a transmission time slot sts during which the radio frequency device HF of a radio device FG is active and sends data to an assigned base station. A reception time slot ets is shown in the lower area, during which data transmitted by an assigned base station is received. In addition, a monitor time slot mts is shown, during which signals or signal field strengths of neighboring base stations are recorded or ascertained. In the context of this application, “data” also means useful data, such as, for example, voice or text data, or signaling data, such as, for example, control or control data.
Figur 2 zeigt ein Funkgerät FG, das einen Logikteil aufweist, der im Wesentlichen durch eine Prozessoreinrichtung PE (PEl, PE2) gebildet ist. Erste Teile PEl dieser Prozessoreinrichtung steuern eine Hochfrequenzeinrichtung HF, verarbeiten durch die Hochfrequenzeinrichtung HF empfangene Signale und bereiten von der Hochfrequenzeinrichtung HF zu sendende Signale auf. Die Hochfrequenzeinrichtung kann dabei auch Verstärker, Mischer, Filter, Oszillatoren und eine Synthesizer- schaltung umfassen. Zum Empfang und Senden von Funksignalen dient eine Antenne ANT . Zweite Teile PE2 der Prozessoreinrichtung werden zum Empfangen von Signalen zumindest während der Empfangszeitschlitze ets ganz oder teilweise nicht benötigt und daher während dieser Zeitschlitze ganz oder teilweise abgeschaltet.FIG. 2 shows a radio device FG which has a logic part which is essentially formed by a processor device PE (PE1, PE2). First parts PE1 of this processor device control a radio frequency device HF, process signals and received by the radio frequency device HF prepare signals to be transmitted by the high-frequency device HF. The high-frequency device can also include amplifiers, mixers, filters, oscillators and a synthesizer circuit. An antenna ANT is used to receive and send radio signals. Second parts PE2 of the processor device are generally not required in whole or in part for receiving signals at least during the reception time slots and are therefore completely or partially switched off during these time slots.
Neben Schnittstellenleitungen SSI zwischen ersten Teilen PEl der Prozessoreinrichtung und zweiten Teilen PE2 der Prozessoreinrichtung und Schnittstellenleitungen SS2 zwischen ersten Teilen PEl der Prozessoreinrichtung und der Hochfre- quenzeinrichtung HF, ist eine Sendesteuerleitung TST und eine Empfangssteuerleitung RST vorgesehen, durch welche die Hochfrequenzeinrichtung HF zu Beginn eines Empfangszeitschlitzes ETS auf Empfang geschaltet und zu Beginn eines Sendezeit- schlitzes STS auf Senden geschaltet wird.In addition to interface lines SSI between first parts PE1 of the processor device and second parts PE2 of the processor device and interface lines SS2 between first parts PE1 of the processor device and the high-frequency device HF, a transmission control line TST and a receive control line RST are provided, by means of which the high-frequency device HF at the beginning of a reception time slot ETS is switched to reception and STS is switched to transmission at the beginning of a transmission time slot.
Das Signal der Empfangssteuerleitung RST wird ausserdem je nach Ausführungsvariante dem ersten PEl und/oder dem zweiten Teil PE2 der Prozessoreinrichtung zugeführt, so dass der zweite Teil PE2 der Prozessoreinrichtung während des E p- fangszeitschlitzes ets ganz oder teilweise abgeschaltet werden kann. Dieser AusschaltZeitpunkt kann dem zweiten Teil PE2 der Prozessoreinrichtung je nach Ausführungs ariante entweder unmittelbar über das Signal der Empfangssteuerleitung RST signalisiert werden oder mittelbar über den ersten Teil PEl der Prozessoreinrichtung und die Schnittstelle SSI signalisiert werden. In der Zeichnung sind Steuerleitungen für beide Ausführungsvarianten dargestellt.The signal of the receive control line RST is also fed to the first PE1 and / or the second part PE2 of the processor device, depending on the embodiment variant, so that the second part PE2 of the processor device can always be completely or partially switched off during the reception time slot. This switch-off time can be signaled to the second part PE2 of the processor device either directly via the signal of the reception control line RST or indirectly via the first part PE1 of the processor device and the interface SSI, depending on the embodiment. In the drawing, control lines for both versions are shown.
Eine AusführungsVariante der Erfindung sieht vor, dass die Vorbereitung auf das Abschalten des zweiten Teils PE2 derAn embodiment variant of the invention provides that the preparation for switching off the second part PE2 of the
Prozessoreinrichtung kurze Zeit vor dem Beginn des Empfangszeitschlitzes ets beginnt. Die dazu notwendigen Steuersignale können von dem ersten Teil PEl der Prozessoreinrichtung erzeugt werden bzw. aus Synthesizersteuersignalen abgeleitet werden, da der Synthesizer ebenfalls eine Vorlaufzeit zum Einschwingen benötigt.Processor device shortly before the start of the reception time slot ets begins. The necessary control signals can be generated from the first part PE1 of the processor device or derived from synthesizer control signals, since the synthesizer also requires a lead time for settling.
Das Einschalten des zweiten Teils PE2 der Prozessoreinrichtung erfolgt analog zum oben beschriebenen Abschalten mit oder nach dem Ende des Empfangszeitschlitzes ets.The second part PE2 of the processor device is switched on analogously to the switch-off described above with or after the end of the reception time slot ets.
Eine Weiterbildung der Erfindung sieht vor, daß das Abschalten des zweiten Teils PE2 der Prozessoreinrichtung während Monitorzeitschlitzen mts analog zum Abschalten während Empfangszeitschlitzen ets durchgeführt wird.A further development of the invention provides that the switching off of the second part PE2 of the processor device during monitor time slots mts is carried out analogously to the switching off during reception time slots ets.
Bei der Prozessoreinrichtung PE kann es sich beispielsweise um einen oder mehrere Mikrocontroller oder einen oder mehrere Mikroprozessoren und Speichereinrichtungen oder andere in Form durch Mikroschaltungen realisierte Steuerkomponenten handeln.The processor device PE can be, for example, one or more microcontrollers or one or more microprocessors and memory devices or other control components in the form of microcircuits.
Je nach Ausführungsvariante kann die Speichereinrichtung, bei der es sich auch um einen oder mehrere RAM-, ROM- oder Flash- Speicherbausteine handeln kann, oder Teile der Speichereinrichtung als Teil der Prozessoreinrichtung oder als externe Speichereinrichtung realisiert sein, die ausserhalb der Prozessoreinrichtung lokalisiert ist und durch Leitungen oder ein Bussystem mit der Prozessoreinrichtung PE verbunden ist. Insbesondere sind bei einer Ausführungsvariante der Erfindung Prozessor und Speichereinrichtung nicht in einem Baustein in- tegriert.Depending on the embodiment variant, the memory device, which can also be one or more RAM, ROM or flash memory modules, or parts of the memory device can be implemented as part of the processor device or as external memory device which is located outside the processor device and is connected to the processor device PE by lines or a bus system. In particular, in one embodiment variant of the invention, processor and memory device are not integrated in one module.
Je nach AusführungsVariante können dabei innerhalb oder ausserhalb der Prozessoreinrichtung PE weitere - der Prozessoreinrichtung zugeordnete, zur Prozessoreinrichtung gehören- de, durch die Prozessoreinrichtung gesteuerte oder die Prozessoreinrichtung steuernde - Komponenten angeordnet sein, deren Funktionen im Zusammenhang mit einer Prozessoreinrich- tung einem Fachmann hinreichend bekannt sind, und auf welche daher an dieser Stelle nicht näher eingegangen wird. Die unterschiedlichen Komponenten können über ein Bussystem oder Ein-/Ausgabeschnittstellen und gegebenenfalls geeignete Con- troller mit der Prozessoreinrichtung PE Daten austauschen.Depending on the design variant, further components can be arranged inside or outside the processor device PE, the components of which are assigned to the processor device, belong to the processor device, are controlled by the processor device or control the processor device, and their functions are related to a processor device. tion are well known to a person skilled in the art, and which is therefore not dealt with in more detail at this point. The different components can exchange data with the processor device PE via a bus system or input / output interfaces and, if appropriate, suitable controllers.
Die Prozessoreinrichtung PE steuert wesentliche Elemente und Funktionen des Funkgerätes, regelt den Kommunikations- und Signalisierungsablauf, reagiert auf Tastatureingaben und ist für die Displaydarstellung zuständig oder unterstützt diese.The processor device PE controls essential elements and functions of the radio, regulates the communication and signaling sequence, reacts to keyboard inputs and is responsible for the display or supports it.
Je nach Ausführungsvariante der Erfindung kann die Prozessoreinrichtung eine Vielzahl getakteter Rechenelemente, wie A/D- bzw. D/A-Wandler, Puffer für Abtastwerte von Empfangs- Signalen, einen digitalen Signalprozessor, einen oder mehrere Mikroprozessoren und weitere Hardwareelemente zur Ξignalver- arbeitung enthalten. Teile der Prozessoreinrichtung PE werden dabei durch einen in der Hochfrequenzeinrichtung HF angeordneten spannungsgesteuerten Oszillator getaktet, wobei die zur Taktung nötigen Signale eine Sinusform aufweisen, welche keine wesentlichen Oberwellen im Bereich der Trägerfrequenzen aufweisen. Andere Teile der Prozessoreinrichtung PE oder externe Speicherelemente geben rechteckförmige Signale aus, was zu erheblichen Oberwellen im Bereich der Trägerfrequenzen führen kann.Depending on the embodiment variant of the invention, the processor device can contain a multiplicity of clocked computing elements, such as A / D or D / A converters, buffers for samples of received signals, a digital signal processor, one or more microprocessors and further hardware elements for signal processing , Parts of the processor device PE are clocked by a voltage-controlled oscillator arranged in the high-frequency device HF, the signals required for the clocking having a sinusoidal shape which have no significant harmonics in the area of the carrier frequencies. Other parts of the processor device PE or external memory elements output rectangular signals, which can lead to considerable harmonics in the area of the carrier frequencies.
Eine besondere Weiterbildung der Erfindung sieht daher vor, zumindest teilweise die Teile PE2 der Prozessoreinrichtung abzuschalten, die während der Empfangszeitschlitze ets nicht benötigt werden, und welchen rechteckförmige Signale zugeführt werden oder von welchen rechteckförmige Signale ausgegeben werden.A special development of the invention therefore provides for at least partially switching off the parts PE2 of the processor device which are not required during the reception time slots and which are supplied with rectangular signals or from which rectangular signals are output.
Eine andere AusführungsVariante der Erfindung sieht vor, dass während des Empfangszeitschlitzes ets der eingeschaltete Teil der Prozessoreinrichtung PEl A/D-Wandler, Pufferspeicher für von den A/D- Wandlern ausgegebene Abtastwerte und einen Ti- C <__ M N J h-1 Another embodiment variant of the invention provides that during the receive time slot the switched-on part of the processor device PEI A / D converter, buffer memory for sample values output by the A / D converters and a Ti C <__ MNJ h- 1
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Claims

Patentansprüche claims
1. Verfahren zum störungsreduzierten Betreiben eines Funkgerätes (FG), -bei dem in Empfangszeitschlitzen (ets) Daten mittels einer Hochfrequenzeinrichtung (HF) empfangen werden, -bei dem die Hochfrequenzeinrichtung (HF) durch eine Prozessoreinrichtung (PE) gesteuert wird,1. Method for the interference-reduced operation of a radio (FG), - in which data is received in reception time slots (ets) by means of a radio frequency device (HF), - in which the radio frequency device (HF) is controlled by a processor device (PE),
-bei dem zumindest Teile (PE2) der Prozessoreinrichtung (PE) , die zum Empfangen von Daten zumindest zeitweise nicht benötigt werden, während Empfangszeitschlitzen (ets) zumindest teilweise abgeschaltet werden.-in which at least parts (PE2) of the processor device (PE), which are at least temporarily not required for receiving data, while receiving time slots (ets) are at least partially switched off.
2. Verfahren nach Anspruch 1, -bei dem Teile (PE2) der Prozessoreinrichtung, die während Empfangszeitschlitzen (ets) abgeschaltet werden, einen digitalen Signalprozessor umfassen.2. The method according to claim 1, wherein parts (PE2) of the processor device which are switched off during reception time slots (ets) comprise a digital signal processor.
3. Verfahren nach einem der vorhergehenden Ansprüche, -bei dem Teile (PE2) der Prozessoreinrichtung, die auf eine Speichereinrichtung (SPE) zugreifen, welche nicht im selben Baustein integriert ist, wie dieser Teil (PE2) der Prozessoreinrichtung, während Empfangszeitschlitzen (ets) abgeschaltet werden.3. The method according to any one of the preceding claims, in which parts (PE2) of the processor device which access a memory device (SPE) which is not integrated in the same module as this part (PE2) of the processor device, during receive time slots (ets) be switched off.
4. Funkgerät (FG) , mit4. Radio (FG), with
-einer Hochfrequenzeinrichtung (HF) zum Senden und Empfangen von Daten,a radio frequency (HF) device for transmitting and receiving data,
-einer Prozessoreinrichtung (PE) zur Steuerung der Hochfre- quenzeinrichtung (HF) , die derart eingerichtet ist, daßa processor device (PE) for controlling the high-frequency device (HF), which is set up in such a way that
-Daten in Empfangszeitschlitzen (ets) empfangen werden, und -zumindest Teile (PE2) der Prozessoreinrichtung, die zum Empfangen von Daten zumindest zeitweise nicht benötigt werden, während Empfangszeitschlitzen (ets) zumindest teilweise abgeschaltet werden.Data are received in reception time slots (ets), and -at least parts (PE2) of the processor device that are at least temporarily not required for receiving data, while reception time slots (ets) are at least partially switched off.
5. Funkgerät (FG) nach Anspruch 4, bei dem Teile der Prozessoreinrichtung (PE2), die während Empfangszeitschlitzen (ets) abgeschaltet werden, einen digitalen Signalprozessor umfassen.5. radio (FG) according to claim 4, in which parts of the processor device (PE2) which are switched off during reception time slots (ets) comprise a digital signal processor.
6. Funkgerät (FG) nach einem der Ansprüche 4 oder 5, bei dem Teile (PE2) der Prozessoreinrichtung, die auf eine Speichereinrichtung (SPE) zugreifen, welche nicht im selben Baustein integriert ist, wie dieser Teil (PE2) der Prozessoreinrichtung, während Empfangszeitschlitzen (ets) abge- schaltet werden. 6. Radio (FG) according to one of claims 4 or 5, in which parts (PE2) of the processor device which access a memory device (SPE), which is not integrated in the same module as this part (PE2) of the processor device, during Receiving time slots (ets) can be switched off.
PCT/DE2000/004160 1999-11-25 2000-11-23 Method for effecting the interference-reduced operation of a radio transceiver and a radio transceiver WO2001039406A2 (en)

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EP1274174A3 (en) * 2001-07-03 2005-10-05 Microsoft Corporation System and method for reducing noise in a recording receiver
EP1274174A2 (en) * 2001-07-03 2003-01-08 Microsoft Corporation System and method for reducing noise in a recording receiver
US7437136B2 (en) 2001-07-03 2008-10-14 Microsoft Corporation System and method for reducing noise in a recording receiver
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EP1501303A2 (en) * 2003-07-23 2005-01-26 Nec Corporation Portable communication terminal with camera and a method of controlling the same
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US8472990B2 (en) 2004-07-23 2013-06-25 St Ericsson Sa Apparatus using interrupts for controlling a processor for radio isolation and associated method
WO2006039544A1 (en) * 2004-09-30 2006-04-13 Silicon Laboratories, Inc. Apparatus for controlling a digital signal processor for radio isolation and associated methods
EP1675287A1 (en) * 2004-12-22 2006-06-28 Siemens Aktiengesellschaft Managment of radio interferences in a device, method, and program product
WO2006071974A1 (en) 2004-12-29 2006-07-06 Silicon Laboratories, Inc. Communication apparatus having a sim interface compatible with radio isolation
US7778674B2 (en) 2004-12-29 2010-08-17 St-Ericsson Sa Communication apparatus having a SIM interface compatible with radio isolation
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