WO2001056168A1 - Data compression having more effective compression - Google Patents
Data compression having more effective compression Download PDFInfo
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- WO2001056168A1 WO2001056168A1 PCT/GB2001/000230 GB0100230W WO0156168A1 WO 2001056168 A1 WO2001056168 A1 WO 2001056168A1 GB 0100230 W GB0100230 W GB 0100230W WO 0156168 A1 WO0156168 A1 WO 0156168A1
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Classifications
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M7/00—Conversion of a code where information is represented by a given sequence or number of digits to a code where the same, similar or subset of information is represented by a different sequence or number of digits
- H03M7/30—Compression; Expansion; Suppression of unnecessary data, e.g. redundancy reduction
- H03M7/46—Conversion to or from run-length codes, i.e. by representing the number of consecutive digits, or groups of digits, of the same kind by a code word and a digit indicative of that kind
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M7/00—Conversion of a code where information is represented by a given sequence or number of digits to a code where the same, similar or subset of information is represented by a different sequence or number of digits
- H03M7/30—Compression; Expansion; Suppression of unnecessary data, e.g. redundancy reduction
- H03M7/55—Compression Theory, e.g. compression of random number, repeated compression
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06T—IMAGE DATA PROCESSING OR GENERATION, IN GENERAL
- G06T9/00—Image coding
- G06T9/005—Statistical coding, e.g. Huffman, run length coding
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M7/00—Conversion of a code where information is represented by a given sequence or number of digits to a code where the same, similar or subset of information is represented by a different sequence or number of digits
- H03M7/30—Compression; Expansion; Suppression of unnecessary data, e.g. redundancy reduction
- H03M7/3084—Compression; Expansion; Suppression of unnecessary data, e.g. redundancy reduction using adaptive string matching, e.g. the Lempel-Ziv method
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M7/00—Conversion of a code where information is represented by a given sequence or number of digits to a code where the same, similar or subset of information is represented by a different sequence or number of digits
- H03M7/30—Compression; Expansion; Suppression of unnecessary data, e.g. redundancy reduction
- H03M7/60—General implementation details not specific to a particular type of compression
- H03M7/6005—Decoder aspects
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M7/00—Conversion of a code where information is represented by a given sequence or number of digits to a code where the same, similar or subset of information is represented by a different sequence or number of digits
- H03M7/30—Compression; Expansion; Suppression of unnecessary data, e.g. redundancy reduction
- H03M7/60—General implementation details not specific to a particular type of compression
- H03M7/6011—Encoder aspects
Definitions
- This invention relates to a method and apparatus for the lossless compression of data.
- lossy data compression hardware has been available for image and signal processing for some years, lossless data compression has only recently become of interest, as a result of increased commercial pressure on bandwidth and cost per bit in data storage and data transmission; also, reduction in power consumption by reducing data volume is now of importance.
- the principle of searching a dictionary and encoding data by reference to a dictionary address is well known, and the apparatus to apply the principle consists of a dictionary and a coder/decoder.
- the X-Match algorithm maintains a dictionary of data previously seen, and attempts to match a current data element, referred to as a tuple, with an entry in the dictionary, replacing a matched tuple with a shorter code referencing the match location.
- the algorithm operates on partial matching, such as 2 bytes in a 4 byte data element.
- FPGA Field Programmable Gate Array
- a lossless data compression system comprising a content addressable memory dictionary and a coder, characterised by run length encoding means connected to receive the output of the coder, said encoding means being arranged to count the number of times a match consecutively occurs at a predetermined dictionary location.
- a lossless method of compressing data comprising the steps of: - comparing a search tuple of fixed length with a plurality of tuples of said fixed length stored in a dictionary; indicating the location in the dictionary of a full or partial match or matches; selecting a best match of any plurality of matches; and encoding the match location and the match type; characterised by the further steps of : - loading each search tuple in turn into the same address in the dictionary; and counting the number of times identical tuples are matched consecutively into said address.
- figure 1 illustrates the architecture of a compressor arrangement published by Nunez et al.
- FIG. 2 illustrates the architecture of the compressor hardware figure 3 illustrates the run length internal encoder figure 4 illustrates a dictionary of varying size figure 5 illustrates in detail the run length internal coder/decoder, and figure 6 illustrates the compressor/decompressor circuit schematically
- a dictionary 10 is based on Content Addressable Memory (CAM) and is searched by data 12 supplied by a search register 14.
- CAM Content Addressable Memory
- each data element is exactly 4 bytes in width and is referred to as a tuple. With data elements of standard width, there is a guaranteed input data rate during compression and output data rate during decompression, regardless of data mix.
- the dictionary stores previously seen data for a current compression; when the search register 14 supplies a new entry and a match is found in the dictionary, the data is replaced by a shorter code referencing the match location.
- CAM is a form of associative memory which takes in a data element and gives a match address of the element as its output. The use of CAM technology allows rapid searching of the dictionary 10, because the search is implemented simultaneously at every address at which data is stored, and therefore simultaneously for every stored word.
- a partial match which may be a match of 2 or 3 of the 4 bytes, is also replaced by the code referencing the match location and a match type code, with the unmatched byte or bytes being transmitted literally, everything prefixed by a single bit. This use of partial matching improves the compression ratio when compared with the requirement of 4 byte matching, but still maintains high throughput of the dictionary.
- the match type indicates which bytes of the incoming tuple were found in the dictionary and which bytes have to be concatenated in literal form to the compressed code.
- the search tuple is CAT
- the dictionary contains the word SAT at position 2
- the partial match will be indicated in the format (match/miss)
- ⁇ determine the best match location ML and the match type MT; output '0'; output Binary code for ML; output Huffman code for MT; output any required literal characters of T; ⁇ ELSE ⁇ output 'l ';
- the dictionary 10 is arranged on a Move-To-Front strategy, i.e. a current tuple is placed at the front of the dictionary and other tuples moved down by one location to make space. If the dictionary becomes full, a Least Recently Used (LRU) policy applies, i.e., the tuple occupying the last location is simply discarded.
- LRU Least Recently Used
- the dictionary is preloaded with common data.
- the coding function for a match is required to code three separate fields, i.e.
- a match type i.e. which bytes of an incoming tuple match in a dictionary location; a static Huffman code is used.
- the match, or partial match or several partial matches are output by the dictionary 10 to a match decision logic circuit 16, which supplies a main coder 18 which provides a coded signal to an output assembler 20 which provides a compressed data output signal 22.
- a shift control logic 24 connected between the match decision logic 16 and the dictionary 10 provides shift signals to the dictionary.
- the whole circuit can be provided on a single semiconductor chip.
- a dictionary 30 is based on CAM technology and is supplied with data to be searched 32 by a search register 34.
- the dictionary searches in accordance with the
- the dictionary output is connected to a match decision logic circuit 36 which is connected to a main coder 38, which provides signals to a coder 39 which will be referred to as a 'Run Length Internal' (RLI) coder, which provides signals to an output assembler 40.
- the assembler 40 provides an output stream of compressed data 42.
- run length encoder is positioned between the main coder and the output assembler in a data compression system.
- Figure 3 illustrates the coder output and dictionary adaptation processed during normal and RLI coding events. Eight steps are shown; for each step the top four dictionary addresses 0, 1, 2, 3, references 50, 52, 54, 56, are shown, with the addresses 58 shown on the left and an adaptation vector 60 shown on the right. It will be seen that each location content is exactly 4 bytes long.
- Dictionary address 3, reference 56 is a reserved location and is used to signal RLI runs; an internal run counter 62 is shown adjacent to address 3.
- a previous search tuple is loaded into address 0, reference 50, and the previously stored data is shifted down one position. This is indicated by the current adaptation vector on the right hand side of location 0 being set to 1 in all eight steps. If there is not a full match, the data in the last location is deleted to make room for a new tuple. .
- the arrows pointing downwards within the dictionary indicate rearrangement of the dictionary at the end of each step under the control of the adaptation vector 60 of that step.
- an output box 64 which indicates the output of the dictionary 30 for that step.
- step 1 the search tuple is "at_i"; a full match is found at address 1, reference 52 , and the output in box 64 indicates this.
- the first entry in the box "1" indicates that a match has been found; the next entry indicates a match address; the third entry indicates the match type, i.e. "0" because the match is a full match.
- the fourth entry is blank, because, with a full match, there are no literals to be transmitted.
- the dictionary is updated in accordance with the adaptation vector 60; a bit setting of "1" indicates “load data from previous position” and a bit setting of "0" indicates "keep current data”; therefore the entry at address 0, reference 50, is replaced by the search tuple "at_i” and the entry at address 1, reference 52, is replaced by "the”; the entry at address 2, reference 54, is unchanged.
- step 2 the search tuple is "ry "; there is no match, i.e. a miss, and the output box 64 indicates that there is no match, i.e the first entry is "0"; the address and match type entries are blank, and the literals to be sent are "ry ".
- the adaptation vector 60 updates the dictionary as indicated by the arrows A that is all entries move down one address.
- step 3 the search tuple is "this" and a partial match is found at address 2; the output box 64 indicates that there is a match, that the match is at address 2, that the match type is a partial match (i.e. the setting is "3"), and that the non-matching part - the literals to be sent, are "is”.
- the dictionary is updated.
- step 4 the search tuple is "at i", and a full match is found at address 2 as indicated in the output box 64.
- step 5 the search tuple is again "at_i”, and a match is found at address 0, this is indicated in the output box 64.
- the internal run counter 62 which has remained at a zero setting in the previous steps, is now set to 1 ; a possible run is indicated, but a normal output is still given, box 64, because a run is not yet certain.
- step 6 the search tuple is again "at_i"'; the internal run counter 62 is incremented to 2. This time a valid run is indicated, there is no output so the output box 64 is blank. Also the output corresponding to step 5 is empty from the RLI coding register since it will now be coded as part of the RLI event.
- step 7 the search tuple is once more "at i”, the internal run counter is incremented to 3, and the output box 64 remains blank.
- step 8 the search tuple is "at v"; the internal run has ended. A partial match is found at address 0; the output box 64 indicates that the match is found at address 0, that the match type is partial, and that the literal to be sent is (v) . The count of the internal run counter 62 is now sent as shown in the RLI output box 66. A match was found at address 3, reference 56, i.e. the address reserved for internal runs, and the length of the run was 3, which is sent as an 8-bit code.
- run length encoding only operates with full matches, and not with partial matches. It will also be understand that full matches of 4 bytes of data can be detected. This is in contrast to the arrangement disclosed in the publication by Kjelso referred to above in which a run length encoder sensitive only to 0s is disclosed; runs of 0 are common in coding arrangements.
- the position of the prior art encoder was such that it preceded application of the X-Match encoder, i.e. it operated on incoming data before the data was supplied to the dictionary in which the X-Match algorithm is applied.
- the run length encoding is integrated with the dictionary coding and does not precede it.
- the inventive arrangement has two distinct features; the first is that its contents can be search in a single cycle, and extra logic is added to a conventional content addressable memory to allow it to detect consecutive input sequences which are identical; this is achieved by transmission of a dictionary address which has not yet been utilised for the storage of dictionary data; this is described above.
- a second feature is that the dictionary size and the codes which indicate multiple consecutive input sequences are varied dynamically, based on the number of new data items to be entered into the dictionary; in other words, the size of the dictionary varies. This is illustrated in figure 4 which shows the same dictionary features as figure 3, but also shows 8 dictionary locations 50 - 56 and 51 - 57.
- step 1 all the dictionary locations are set to the same data value, which in effect declares invalid all the dictionary locations below the first location 50, without the need for additional "dictionary location valid" logic.
- the reason is that in the case of multiple full matches during a dictionary search, the best match decision logic always selects the match closer to the top of the dictionary, thus invalidating all locations below it.
- the locations are all set to zero in the example.
- the code word book only has 2 values, corresponding to the first location 50, and to the RLI location, which at this stage is at location 52.
- the dictionary does not grow in length, and the RLI code will be activated once to code a run of 255 tuples for the total of 1020 bytes. The run is counted by RLI counter 62 as described with reference to figure 3.
- Step 1 the search tuple is at_i, which is output as a literal.
- Step 2 "at i" has been stored in dictionary location 50, and the search tuple is "ry "; the dictionary now has three valid locations, the location reserved to signal
- Step 3 the search tuple is "this" and there are four valid locations.
- Step 4 the search tuple is "at i" and there are five valid locations, the reserved location now being at location 51.
- Steps, 5, 6, 7 & 8 indicate the effect of a repeated tuple, the dictionary remains at a length of 5 valid locations, with the reserved location at 51.
- step 8 If, after step 8, a new search tuple is presented, the dictionary will grow in size to store it.
- RLI will use to its advantage PBC as long as the dictionary is not completely full and a run of length greater than 2 takes place. If all the dictionary locations are valid using PBC or UBC (Uniform Binary Coding) gives the same results.
- Another prefix-free coding technique can be used to replace PBC and the same principles apply such as Rice coding or Phased Huffman Coding where a fraction of the dictionary is valid initially.
- ⁇ determine the best match location ML and the match type MT; output "0" output phased binary code for ML; output Huffman code for MT; output any required literal characters of T;
- Figure 5 illustrates the operation of a RLI coder and a RLI decoder.
- the counter 62 is activated by a full match at location 0; the counter remains enabled and counting while consecutive full matches at 0 are being detected.
- the count is concatenated to the rest of the RLI code formed by a 0 indicating a match and the reserved position corresponding to the last active position in the dictionary.
- the counter 62 is loaded with the count from the RLI code and then begins to count, starting at zero, until the loaded value is reached.
- the output of the RLI decoder is full match at location 0 while the count value is not reached.
- the RLI coder 39 comprises a RLI coding register 70 and RLI coding control unit 72, which is connected to RLI counter 62 (see Fig 3).
- Counter 62 is an 8-bit register and is common to both compression and decompression.
- the 8-bit counter 62 is connected to a RLI decoding control unit 74 in an RLI decoder 76 which also contains a RLI decoding register 78.
- the RLI coding register 70 buffers code before the code accesses the RLI coding control unity 72; unit 72 controls the RLI coding process and outputs the correct code/code length pair depending on whether the compression is operating normally, or whether a run length coding event is taking place.
- the RLI coder 39 When the RLI coder 39 becomes active, the RLI coding register is empty from the previous code, and output is frozen while the run takes place.
- the RLI decoding control unit 74 has a complementary function to the RLI coding control unit 72; unit 74 outputs the correct match location/match type pair depending on whether the circuit is operating normally, i.e. on individual bytes, or if run length decoding is taking place.
- the RLI decoding register 78 has the same functionality as the RLI coding register 70.
- the 8 bit RLI counter 62 does not use any specific technique to detect an overflow condition if a pattern repeats more than 255 times. The counter simply loops back to 0, the condition is detected by the RLI control logic 72 as the end of a run, and a run length code is output. The next code after an RLI code event is always a normal code, even when the pattern continues to repeat. With a continued repeat, the counter 62 exceeds the count of 1 again and the run length detection signal is reactivated.
- Uncompressed data 32 is supplied to the CAM dictionary 30, and the dictionary output, i.e. an indication of the dictionary address at which a match has been found, or the address of a partial match plus the unmatched byte or bytes, is supplied to a priority logic circuit 80, which assigns a different priority to each of the different types of possible matches in the dictionary, i.e. full, partial or miss, and supplies the result to a match decision logic circuit 82.
- Circuit 82 uses the priority types to select one of the matches as the best for compression using the priority information and supplies a signal to a main coder 38.
- the main coder 38 operates, as described in the prior art referred to above, to assign a uniform binary code to the matching location and static Huffman code to the match type, and concatenates any necessary bytes in literal form.
- the compressed output is supplied to the RLI coder 39, described with reference to figure 4. This signal is produced by the main coder but is not shown in its diagram for simplicity.
- the RLI coder output passes to a bit assembly logic 40 which writes a new 64-bit compressed output to memory whenever more than 64 bits of compressed data are valid in an internal buffer (not shown).
- the output is compressed code 42..
- the output from the priority logic circuit 80 is also supplied to an out-of-date adaptation (ODA) logic circuit 84, as described in our co-pending patent application no GB 0001711.1 filed on even date.
- ODA out-of-date adaptation
- the output of the ODA circuit 84 is connected to a move generation logic circuit 44 which generates a move vector (as the adaptation vector applied in figure 3) depending on the match type and match location.
- the move generation logic 44 also provides a feedback signal to the ODA logic circuit 84.
- compressed input 90 is supplied to a bit disassembly logic circuit 92 which reads a new 64-bit compressed vector from memory whenever fewer than 33 bits are left valid in an internal buffer (not shown) after a decompression operation.
- the compressed vector is supplied to a main decoder 94 which decodes the match location and match type, together with any required literal characters and detects any possible RLI codes.
- the decoder 94 is connected to the RLI decoder 76 which supplies its run length decoded output to the ODA logic circuit 84 and also to a tuple assembly circuit 96.
- the CAM dictionary 30 operates on the decoded input to regenerate 4 byte wide words which are supplied to the tuple assembly circuit 96; this circuit supplies uncompressed data 98, which comprises tuples assembled using information from the dictionary 30, plus any literal characters present in the code.
- Run Length Internal coding has been found to achieve the compression improvement, which may be 10%, with little or no effect on the speed of compression.
- the improvement results from the efficient run length encoding of any repeating pattern, such as a 32 bit pattern.
- the most common repeating pattern is a run of 0s, but others are possible such as the space character in a text file or a constant background colour in a picture.
- Application of the invention allows efficient, lossless coding and decoding of such non-zero characters.
- Run Length Internal coding detects and codes any vector which is fully matched at position zero twice or more.
- Such an arrangement offers a compression advantage in comparison with locating a run length encoder before the dictionary in a compression system, and since it uses the dictionary logic, complexity is kept to a minimum with a higher level of integration in the architecture.
- the CAM dictionary 30 can have 15, 31 or 63 words; one position is already reserved for RLI events. A bigger dictionary improves compression but increases complexity significantly.
- the uncompressed data-out 98 is identical to the data-in 32. There has been no loss.
- the present invention is likely to find application when small blocks of data are to be compressed.
Abstract
Description
Claims
Priority Applications (7)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US10/182,183 US6667699B2 (en) | 2000-01-25 | 2001-01-22 | Data compression having more effective compression |
KR1020027009440A KR20020075889A (en) | 2000-01-25 | 2001-01-22 | Data compression having more effective compression |
EP01901293A EP1252715A1 (en) | 2000-01-25 | 2001-01-22 | Data compression |
AU2001226952A AU2001226952A1 (en) | 2000-01-25 | 2001-01-22 | Data compression having more effective compression |
CA002398062A CA2398062A1 (en) | 2000-01-25 | 2001-01-22 | Data compression having more effective compression |
JP2001555210A JP2003521189A (en) | 2000-01-25 | 2001-01-22 | Data compression with more effective compression |
US10/693,644 US6906645B2 (en) | 2000-01-25 | 2003-10-27 | Data compression having more effective compression |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
GB0001707.9 | 2000-01-25 | ||
GBGB0001707.9A GB0001707D0 (en) | 2000-01-25 | 2000-01-25 | Data compression having more effective compression |
Related Child Applications (3)
Application Number | Title | Priority Date | Filing Date |
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US10182183 A-371-Of-International | 2001-01-22 | ||
US10/182,183 A-371-Of-International US6667699B2 (en) | 2000-01-25 | 2001-01-22 | Data compression having more effective compression |
US10/693,644 Continuation US6906645B2 (en) | 2000-01-25 | 2003-10-27 | Data compression having more effective compression |
Publications (1)
Publication Number | Publication Date |
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WO2001056168A1 true WO2001056168A1 (en) | 2001-08-02 |
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Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/GB2001/000230 WO2001056168A1 (en) | 2000-01-25 | 2001-01-22 | Data compression having more effective compression |
Country Status (8)
Country | Link |
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US (2) | US6667699B2 (en) |
EP (1) | EP1252715A1 (en) |
JP (1) | JP2003521189A (en) |
KR (1) | KR20020075889A (en) |
AU (1) | AU2001226952A1 (en) |
CA (1) | CA2398062A1 (en) |
GB (1) | GB0001707D0 (en) |
WO (1) | WO2001056168A1 (en) |
Cited By (2)
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WO2004012338A2 (en) * | 2002-07-31 | 2004-02-05 | Btg International Limited | Lossless data compression |
EP3296995A3 (en) * | 2016-09-20 | 2018-04-25 | Hewlett-Packard Enterprise Development LP | Content addressable memory with banks background |
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GB0102572D0 (en) * | 2001-02-01 | 2001-03-21 | Btg Int Ltd | Apparatus to provide fast data compression |
WO2003003584A1 (en) * | 2001-06-29 | 2003-01-09 | Netcontinuum, Inc. | System and method for data compression using a hybrid coding scheme |
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US20060184832A1 (en) * | 2005-02-11 | 2006-08-17 | International Business Machines Corporation | Method and apparatus for achieving high cycle/trace compression depth by adding width |
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WO2009022531A1 (en) | 2007-08-13 | 2009-02-19 | Nec Corporation | Data compression/decompression method |
US8417730B2 (en) * | 2008-04-14 | 2013-04-09 | Objectif Lune Inc. | Block compression algorithm |
US7870160B2 (en) * | 2008-04-14 | 2011-01-11 | Objectif Lune Inc. | Block compression algorithm |
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US9438413B2 (en) | 2010-01-08 | 2016-09-06 | Novell, Inc. | Generating and merging keys for grouping and differentiating volumes of files |
US9298722B2 (en) * | 2009-07-16 | 2016-03-29 | Novell, Inc. | Optimal sequential (de)compression of digital data |
US9292594B2 (en) | 2010-03-10 | 2016-03-22 | Novell, Inc. | Harvesting relevancy data, including dynamic relevancy agent based on underlying grouped and differentiated files |
US8782734B2 (en) * | 2010-03-10 | 2014-07-15 | Novell, Inc. | Semantic controls on data storage and access |
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DE112011104620T5 (en) * | 2010-12-28 | 2013-10-02 | International Business Machines Corporation | Apparatus and method for processing a data item sequence |
DE112011104633B4 (en) | 2010-12-28 | 2016-11-10 | International Business Machines Corporation | Unit for determining the starting point for a search |
US9798732B2 (en) | 2011-01-06 | 2017-10-24 | Micro Focus Software Inc. | Semantic associations in data |
US8732660B2 (en) | 2011-02-02 | 2014-05-20 | Novell, Inc. | User input auto-completion |
US8442986B2 (en) | 2011-03-07 | 2013-05-14 | Novell, Inc. | Ranking importance of symbols in underlying grouped and differentiated files based on content |
US9323769B2 (en) | 2011-03-23 | 2016-04-26 | Novell, Inc. | Positional relationships between groups of files |
WO2013180732A1 (en) * | 2012-06-01 | 2013-12-05 | Hewlett-Packard Development Company, L.P. | Merging data from a source location into a target location |
US8947270B2 (en) | 2013-06-29 | 2015-02-03 | Intel Corporation | Apparatus and method to accelerate compression and decompression operations |
CN104124981A (en) * | 2014-06-26 | 2014-10-29 | 陕西凯鑫源科技有限公司 | K multi-run coding method for storage and transmission of mass information of Internet of vehicles |
US11122095B2 (en) | 2019-09-23 | 2021-09-14 | Netapp, Inc. | Methods for dictionary-based compression and devices thereof |
JP2021145281A (en) | 2020-03-13 | 2021-09-24 | キオクシア株式会社 | Compression device, and decompression device and method |
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-
2000
- 2000-01-25 GB GBGB0001707.9A patent/GB0001707D0/en not_active Ceased
-
2001
- 2001-01-22 AU AU2001226952A patent/AU2001226952A1/en not_active Abandoned
- 2001-01-22 US US10/182,183 patent/US6667699B2/en not_active Expired - Fee Related
- 2001-01-22 WO PCT/GB2001/000230 patent/WO2001056168A1/en not_active Application Discontinuation
- 2001-01-22 EP EP01901293A patent/EP1252715A1/en not_active Withdrawn
- 2001-01-22 KR KR1020027009440A patent/KR20020075889A/en not_active Application Discontinuation
- 2001-01-22 JP JP2001555210A patent/JP2003521189A/en active Pending
- 2001-01-22 CA CA002398062A patent/CA2398062A1/en not_active Abandoned
-
2003
- 2003-10-27 US US10/693,644 patent/US6906645B2/en not_active Expired - Fee Related
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GB2277179A (en) * | 1993-04-13 | 1994-10-19 | Hewlett Packard Co | Data compression using small dictionaries with application to network packets |
US5701125A (en) * | 1994-06-15 | 1997-12-23 | The United States Of America As Represented By The United States Department Of Energy | Method for compression of data using single pass LZSS and run-length encoding |
WO1998004045A1 (en) * | 1996-07-24 | 1998-01-29 | Unisys Corporation | Data compression and decompression system with immediate dictionary updating interleaved with string search |
WO1999044292A1 (en) * | 1998-02-26 | 1999-09-02 | Research In Motion Limited | Block-wise adaptive statistical data compressor |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2004012338A2 (en) * | 2002-07-31 | 2004-02-05 | Btg International Limited | Lossless data compression |
WO2004012338A3 (en) * | 2002-07-31 | 2004-03-18 | Btg Int Ltd | Lossless data compression |
EP3296995A3 (en) * | 2016-09-20 | 2018-04-25 | Hewlett-Packard Enterprise Development LP | Content addressable memory with banks background |
Also Published As
Publication number | Publication date |
---|---|
US6667699B2 (en) | 2003-12-23 |
KR20020075889A (en) | 2002-10-07 |
GB0001707D0 (en) | 2000-03-15 |
CA2398062A1 (en) | 2001-08-02 |
EP1252715A1 (en) | 2002-10-30 |
JP2003521189A (en) | 2003-07-08 |
AU2001226952A1 (en) | 2001-08-07 |
US20040189494A1 (en) | 2004-09-30 |
US20030095055A1 (en) | 2003-05-22 |
US6906645B2 (en) | 2005-06-14 |
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