WO2002027080A1

WO2002027080A1 - A technique for the desired crystalline phase formation for the manufacture of integrated circuits

Info

Publication number: WO2002027080A1
Application number: PCT/SG2000/000150
Authority: WO
Inventors: Yong Keun Lee; Sean Suixiang Li; Kangsoo Lee
Original assignee: Yong Keun Lee; Sean Suixiang Li; Kangsoo Lee
Priority date: 2000-09-26
Filing date: 2000-09-26
Publication date: 2002-04-04
Also published as: AU2000278224A1

Abstract

A method of forming a crystalline phase material, the method including the steps of providing a crystalline material of a first crystalline phase, and subjecting the crystalline material to cyclical annealing between upper and lower elevated temperatures to transform first crystalline phase to a desired amount of the second crystalline phase. Ideally, the crystalline material is titanium silicide, the first crystalline phase is the C49 phase of titanium silicide, and the second crystalline phase is the C94 phase of titanium silicide.

Description

A TECHNIQUE FOR THE DESIRED CRYSTALLINE PHASE FORMATION FOR THE MANUFACTURE OF INTEGRATED CIRCUITS

Field of the Invention

The present invention relates to a method of achieving a desired phase transformation in crystalline materials for the manufacture of integrated circuits. In particular, the invention relates to the formation of metal silicides such as titanium silicides.

Background of the Invention

Silicides such as titanium silicide and tungsten silicide are electrically conductive materials that are commonly used in the fabrication of integrated

^■=» circuits. In particular, titanium silicides (TiSi_x) are crucial materials in the semiconductor industry because of their high thermal stability and low contact resistance (or sheet resistance) in the gate and source or drain areas of microelectronic devices, which allows for faster operation and superior performance.

Titanium silicide can be present as a C49 phase (a body-centered orthorhombic phase) with a relatively higher resistivity of about 60 to 90 micro-Ohm- centimetre (μΩcm). However, it also has a C54 phase (a face-centered orthorhombic phase) with a relatively lower resistivity of about 12 to 20 μΩcm. In general, the C54 phase forms by phase transformation from the C49 phase at temperatures above 800 degrees Celsius (°C).

Techniques for forming TiSi_x can rely on the deposition of titanium on the surface of a substrate and then subjecting the coated substrate to a rapid thermal annealing process. Typically, the coated substrate is heated to 600°C and annealed at 600°C for about 60 seconds to form the C49 phase. The coated substrate is then cooled to ambient temperature. Subsequently, the coated substrate (in the C49 phase) is further heated to a temperature greater than 800°C so that the desired phase transformation from the C49 phase to the C54 phase occurs.

A processing temperature of 800°C or more is often considered undesirable due to the high thermal budget that this incurs, and also due to such high processing temperatures encouraging out-diffusion of dopants in the source-drain regions in semiconductor devices, which in turn generally leads to degradation in performance. Various techniques have thus been attempted to circumvent the need for such high processing temperatures.

One such technique is the ion implantation technique. In the ion implantation technique, molybdenum (Mo) or tungsten (W) is first implanted into the silicon substrate in small doses of about 1000 ions per square centimetre before titanium is deposited on the surface of the ion implanted silicon substrate. The coated substrate is then heated to 600°C, subsequently annealed at 600°C to form the C49 phase, and thereafter annealed at 700°C for the C49 phase to transform into the desired C54 phase.

An alternative technique is the "pre-amorphisation" implantation technique. According to this technique, a high intensity ion beam is used to bombard the silicon substrate and thus render the silicon surface amorphous before titanium is deposited on that surface. As in the ion implantation technique, the coated substrate is annealed at 600°C for about 60 seconds for the formation of the C49 phase before being annealed at 700°C for transformation into the C54 phase.

Although the ion implantation technique and the pre-amorphisation implantation technique allow the process to be conducted at somewhat lower temperatures, the additional step of implantation increases manufacturing costs and complicates the manufacturing processes. A further disadvantage is the additional and high cost of acquiring and maintaining the equipment needed for ion implantation and pre-amorphisation implantation.

There is therefore a need for an improved method of forming such electronic materials at lower processing temperatures and at lower cost to the manufacturer. The present invention provides this and other advantages over the prior art, and is specifically applicable to the formulation of a preferred phase of a metal silicide, such as TiSi_x, for use in the manufacture of integrated circuits.

Summary of the Invention

The present invention provides a method of forming a crystalline phase material, the method comprising the steps of: • providing a crystalline material of a first crystalline phase; and

• subjecting the crystalline material to cyclical annealing at an upper elevated temperature and a lower elevated temperature to transform first crystalline phase to a desired amount of a second crystalline phase.

As will be described in more detail below, the adoption of differing operating parameters in the method of the present invention (such as different cycle numbers, cycle times, temperatures, and rates of change of temperature) allows for the control of the amount of the second crystalline phase produced. Thus, the present invention provides a method that allows for substantially all of the first crystalline phase to be transformed to the second crystalline phase, or as little as 50% (or less) of the first crystalline phase to be transformed, depending upon the operator's requirements. The method of the invention is capable of achieving this at lower processing temperatures.

The method of the present invention is also capable of forming extremely thin layers of the desired second crystalline phase, which is now more commonly a manufacturing constraint being forced upon operators by demands from the semiconductor wafer and integrated circuit industries. Indeed, the desired second crystalline phase may be formed in a layer that is less than about 1 micron in thickness. In a preferred form, the layer will have a thickness in the range from the thickness of a monolayer (the thickness of one atom) up to about 1 micron, although more preferably will have a thickness in the range of from 1 Angstrom to 4000 Angstrom.

Preferred forms of crystalline materials that are suitable for use with the method of the present invention are non iron-based crystalline materials, particularly those that are suitable for use as microelectronic materials. These materials include refractory and non-refractory metal silicides, particularly preferred forms of refractory metal silicides being those such as tungsten, cobalt, copper or titanium silicides. Most preferably, the material will be titanium silicide (TiSi_x).

The material of choice for use with the method of the present invention, namely titanium silicide, may be formed by deposition of elemental titanium over an underlying silicon substrate, with a subsequent high temperature anneal causing the chemical reaction of the titanium with the underlying silicon to form the silicide compound. An alternative is to deposit the silicide in situ, such as by chemical vapor deposition (CVD) or physical vapor deposition (PVD) onto a substrate.

The method of the present invention includes cyclical annealing at upper and lower elevated temperatures. Preferably, such cyclical annealing is suitable to subject the crystalline material to repeated thermal shock in order to transform first crystalline phase to a desired amount of the more preferred second crystalline phase. The lower elevated temperature is preferably within the range of 200 to 400°C (more preferably in the range of 250 to 350°C), whilst the upper elevated temperature is preferably within the range of 500 to 700°C (more preferably in the range of 550 to 650°C). These parameters are particularly preferred where the crystalline material is titanium silicide, and where it is desired to transform substantially all of the C49 phase to the C54 phase. However, it will be appreciated by those skilled in the art that the use of the method of the present invention with different crystalline materials (or with the same crystalline material, but having a different surface roughness, thickness, or overall geometry), or where different degrees of transformation are desired, may necessitate the use of temperatures that are outside (either above or below) these ranges.

It is possible that the initial stages of the cyclical annealing at upper and lower elevated temperatures may achieve the formation of the crystalline material itself. In this respect, and as mentioned above, some silicides (such as the preferred titanium silicides) can be formed by deposition of, for instance, elemental titanium over an underlying silicon substrate (producing an interface therebetween) with a subsequent high temperature anneal causing the chemical reaction of the titanium with the underlying silicon to form the silicide compound at the interface. In one form of the present invention, this high temperature anneal can be provided in an initial stage of the cyclical heating and cooling, such as in the first annealing stage at the upper elevated temperature.

The cyclical annealing at upper and lower temperatures may be provided by as many cycles as are found necessary to transform the desired amount of the crystalline material from the first crystalline phase to the second crystalline phase, and may for instance be provided by as few as two cycles of heating and cooling, or by as many as fifty such cycles. In relation to the formation of the C54 phase of titanium silicide, it has been found that as few cycles as six and as many cycles as twenty provide acceptable degrees of transformation.

While these parameters are particularly preferred where the crystalline material is titanium silicide, it will again be appreciated by those skilled in the art that the use of the method of the present invention with different crystalline materials (or with the same crystalline material, but having a different surface roughness, thickness, or overall geometry), or where different degrees of transformation are desired, may necessitate the use of cycle numbers that are outside these ranges.

Indeed, it has been determined that the first of such cycles subjects the crystalline material to a thermal shock, which creates defects at, and thus initiates phase transformation at (in the preferred form), the interface between the silicon substrate and the titanium silicide layer. In subsequent cycles, further thermal shocks create more defects, both at the interface and within the crystalline material, thus creating more nucleation sites that in turn enhance phase transformation of more of the crystalline material. Therefore, it is expected that more cycles should be required to transform 100% of the first crystalline material to the second crystalline material than would be required to transform 50% of the first crystalline material to the second crystalline material. Similarly, in the alternative where the crystalline material is deposited in situ onto a substrate, subjecting the crystalline material to multiple thermal shocks creates more nucleation sites that in turn enhance phase transformation of more of the crystalline material.

In a preferred form of the method of the present invention, the duration of holding the system at the upper elevated temperature, or at the lower elevated temperature, is carefully controlled to optimize the manufacturing parameters and to assist in providing the required thermal shock to the crystalline material. In this respect, with other parameters being maintained constant, if the duration is extended beyond a certain time, continued holding at the upper or lower elevated temperature may no longer contributes significantly to the production of the second crystalline phase

It is thus preferred for the durations of annealing at the upper and lower elevated temperatures to both be within the range of 1 to 30 seconds, although more preferably in the range of 2 to 15 seconds. While these parameters are particularly preferred where the crystalline material is titanium silicide, it will again be appreciated by those skilled in the art that the use of the method of the present invention with different crystalline materials (or with the same crystalline material, but having a different surface roughness, thickness, or overall geometry), or where different degrees of transformation are desired, may necessitate the use of durations that are outside these ranges.

Additionally, the rate of temperature increase and decrease between the annealing temperatures will ideally be carefully controlled, preferably to a rate of change within the range of 15 to 25°C/sec, although more preferably to a rate of change within the range of 18 to 22°C/sec. Again, while these parameters are particularly preferred where the crystalline material is titanium silicide, it should be appreciated by those skilled in the art that the use of the method of the present invention with different crystalline materials (or with the same crystalline material, but having a different surface roughness, thickness, or overall geometry), or where different degrees of transformation are desired, may necessitate the use of rates of temperature increase/decrease that are outside these ranges.

Therefore, in a preferred form, the present invention provides a method of forming a crystalline phase material, the method including cyclically subjecting a C49 phase titanium silicide to annealing at an upper elevated temperature within the range of 500 to 700°C for a duration of 1 to 30 seconds, and annealing at a lower elevated temperature within the range of 200 to 400°C for a duration of 1 to 30 seconds, with a rate of temperature change between cycles within the range of 15 to 25°C/sec, to transform C49 phase titanium silicide to a desired amount of the C54 phase titanium silicide.

The use of the method of the present invention is advantageous over prior art methods due to its simplicity in implementation in a manufacturing environment. With this in mind, expensive and complicated procedures such as ion implantation or pre-amorphisation implantation are not required, and lower temperatures may be used to form enhanced amounts of the desired crystalline phases, thereby avoiding out-diffusion of dopants from the source-drain regions in the integrated circuits. Indeed, it is considered a significant improvement that the processing temperatures can be lowered, whilst at the same time enhancing the presence of the desired crystalline phase in the final product.

Additionally, the integration of the method of the present invention into an existing method will not require new equipment. For instance, the heating chambers presently used will be able to be easily programmed to implement the new method.

The method of the present invention is ideally utilized to form materials that are suitable for the production of integrated circuits, particularly memory and non- memory integrated circuit devices such as SRAM and microprocessors and the like. Indeed, this patent specification thus also encompasses a process for the manufacture of an integrated circuit, where the process includes as a part thereof a method of forming a crystalline phase material in accordance with the method of the present invention. The fundamental operating steps of such processes will be understood by a skilled addressee, and thus will not be repeated here.

Detailed Description of the Invention

The method of the present invention will now be described with reference to various experimental results. Experiment I is provided for comparison with Experiments II and III, which exemplify two examples of methods that are in accordance with the method of the present invention. Figures 1 to 5 are provided for assistance in understanding the experimental results, and are as follows:

Figure 1 is a cross-sectional morphology of a 100nm titanium layer deposited on a silicon substrate;

Figure 2 is a time vs temperature profile for Experiment I; Figure 3 is an x-ray diffraction spectrum of a sample from Experiment I;

Figure 4 is the cross-sectional morphology of a sample from Experiment I;

Figure 5 is a time vs temperature profile for Experiment II;

Figure 6 is an x-ray diffraction spectrum of a sample from Experiment II;

Figure 7 is the cross-sectional morphology of a sample from Experiment II;

Figure 8 is a further cross-sectional morphology of a sample of Experiment II;

Figure 9 is a time vs temperature profile for Experiment 111;

Figure 10 is an x-ray diffraction spectrum of a sample from Experiment III;

Figure 11 is the cross-sectional morphology of a sample from Experiment III;

Figure 12 is a schematic illustration of the mechanisms of the enhancement of C54 phase formation; and

Figure 13 illustrates resistivity vs number of thermal shocks.

Detailed Description of the Experimental Results

In the following experiments, a 100 nm thick Ti layer 10 was deposited by a conventional PVD technique on the surface of a silicon wafer 12, as shown in Figure 1. Samples were prepared by cutting the Ti deposited Si wafer into small pieces and then the pieces were divided into three groups, GA, GB and Gc respectively. To investigate the effect of the thermal-shock on the phase transformation, the sample in G_A was annealed at 600°C for 60 seconds (Experiment I), and the samples in G_B and Gc were respectively annealed at 600°C for 10 seconds with 6 cycles and at 600°C for 3 seconds with 20 cycles (Experiment II and Experiment III respectively). The heating/cooling rates of 20°C/sec and the thermal-shocking treatments were performed in a manner such that the holding duration at 600°C for all samples in G_A, G_B and G_c was maintained at an aggregate of 60 seconds.

A four-point probe was employed to measure the sheet resistance of the samples for assessing the reactions. To identify the phase formation after the treatments, X-ray diffraction analysis (XRD) was carried out to evaluate the interaction between Ti and Si. XRD measurements were performed with the grazing incident angle (1°) diffractometer attachment, using Cu, K X-ray at 50 KV and 20 mA from 25° to 60° with 0.05° steps and 4 °C/min scanning rate. The percentage of C54 phase content in the mixture of C49 and C54 phases can be estimated with the following equation:

XC54 - IC54(311) /[IC49(131) ⁺ I C54(311)]

.where IC₄₉₍1₃D and lc₅₄(3_H) are the intensity of the C49 (131) and C54 (311) peaks in the XRD spectrum.

The interfaces and microstructure of TiSi₂ were characterized by Transmission Electron Microscope (TEM). The cross-sectional TEM samples were prepared with conventional "sandwich" techniques.

Experiment I (G*)

Experimental Procedure

The sample as deposited was heated at 20°C/sec to 600°C, held at 600°C for 60 seconds and cooled down at 20°C/sec to ambient temperature in high purity Ar atmosphere, as shown in Figure 2. Experimental Results

Figure 3 shows the XRD spectrum of the annealed sample of Experiment I. It can be clearly seen that the C49 (131), C49 (200) and C49 (060) were the major peaks in this XRD spectrum. The C54 (311) peak in the spectrum is very weak compared with the C49 (131) peak. The ratio of lcs4(3H) I Ic49(i3i) was only 9%. It indicates that approximately 92% of C49 phase TiSi₂ formed but remained untransformed after the treatment of Experiment I. The small percentage of C54 formed in the sample implies that the annealing temperature of 600°C just satisfied the thermodynamic requirements for the C49 to C54 phase formation. However the driving force to convert the C49 phase to C54 phase was not great enough.

Figure 4 is the cross-sectional morphology of the annealed sample of Experiment I. It shows that the initially flat and straight Ti layer in the samples as deposited had become sunken and the surface became wavy. The size of the C49 crystals was approximately 1070 nm x 180 nm with arc shape, while the grain boundaries were normal to the surface and the Ti/Si interface. The high-resolution lattice image shows that the interface between the C49 phase and the Si substrate was semi-coherent, with dislocations arrayed regularly on the interface. The dislocations were like "wedges" inserted into the C49 layer from the Si substrate, thus resulting in the sunken C49 layer and rough wavy surface.

The resistivity of the annealed sample of Experiment I was 68.5 μ cm and was attributable to the high abundance (92%) of the higher resistivity C49 phase in the sample.

Experiment II (G_B^

Experimental Procedure

The sample as deposited was treated by the following processes: (a) heating at 20°C/sec to 600°C; holding at 600°C for 10 seconds; (c) cooling at 20°C/sec from 600°C to 300°C; (d) holding at 300°C for 10 seconds; and (e) repeating the sequence of steps (a) to (d) five times, as shown in the schematic illustration in Figure 5. The whole process was performed under a high purity Ar atmosphere.

Experimental Results

The XRD spectrum for the annealed sample of Experiment II, shown in Figure 6, were similar to that shown in Figure 2(b) for Experiment I. The C49 phase was still the major phase after treatment with six thermal cycles, but the ratio of Ic54(3ii) 1 1 C₄9(₁3₁) increased slightly (16%). This implies that the percentage of C54 phase in the sample increased from 8.3% to 13.8% after 6 cycles. This result can also be evidenced by the minor reduction of the resistivity (53.26 μ cm) of the sample.

The cross-sectional morphology of the annealed sample of Experiment II as shown in Figure 7 shows that the initially flat and straight Ti layer in the samples as deposited, again was sunken and the surface again was wavy. However, the high-resolution lattice image shows that the semi-coherent interface between the C49 phase and the Si substrate was completely destroyed by thermal shock. In this experiment, the size of the C49 crystals was reduced from approximately 1070 nm x 180nm to 250 nm x 180 nm. The grain size was only one fourth of that in the annealed sample of Experiment I.

It can be clearly seen that there were a number of intergranular sliding zones with different slip directions in the C49 grains. The different slip direction is due to different orientation of C49 grains in the TiSi₂ layer. The appearance of the sliding zones implies that plastic deformation occurred during the thermal shock treatment. The deformation may be attributed to the anisotropic thermal expansion of C49 crystals and also the different thermal expansion of the C49 phase and Si substrate during the thermal cycling. However, it was observed that there was a protruding nucleus of the recrystallized C49 grain from a low strain grain (see grain 1 in Figure 8) projecting into a high strain grain (see grain 2 in Figure 8). This indicates that some of the deformed C49 grains were partially recrystallized in the subsequent holding at 600°C because of the minimization of the system energy.

The deformation extent of the C49 grains is dependent on the orientation of the grains. For the favourable orientations, the loading force induced by the different thermal expansion in the thermal shocks is greater. Generation of dislocation in these grains is much easier and they slide resulting in the sliding zones. Indeed, the more crystal defects that the thermal shock technique induced, the higher internal energy the C49 phase has. However, the recrystallization of C49 phase eliminates the defects, such as dislocations, in the C49 phase. Thus, the internal energy of the C49 phase was reduced. Therefore, the experimental results indicate that the holding duration at 600°C must be shortened to 10 seconds to restrict the recrystallization of C49 phase.

Experiment III (G^

Experimental Procedure

Based on the experimental results in Experiment II, Experiment III (a multi- thermal shock technique) was designed to avoid the recrystallization and to increase the internal energy of the C49 phase. The experimental procedure for the as deposited sample was (a) heat up the sample at 20 °C/sec to 600°C; (b) hold at 600°C for 3 seconds; (c) cool down at 20 °C/sec from 600°C to 300°C; (d) hold at 300°C for 10 seconds; and (e) repeat the sequence of steps (a) to (d) nineteen times, as shown in the schematic illustration in Figure 9. The experiment was performed in high purity Ar atmosphere. Experimental Results

Figure 10 shows the XRD spectrum for the annealed sample of Experiment III. As is evident, this is an entirely different XRD spectrum to the spectra shown in Figures 3 and 6 for Experiments I and II. In this case, the C49 peaks evident in Figures 3 and 6, such as C49 (131), (200) and (060) peaks, are not present and the C54 peaks show there to be a single phase in the sample treated by multi- thermal-shock technique of Experiment III. The low resistivity of 15.90 μΩcm also evidences the full transformation of C49 phase to C54 phase in this experiment.

The cross-sectional morphology of the samples in Figure 11 shows that the initial flat and straight Ti layer in the sample as deposited was not sunken, unlike the samples in Experiments I and II. Rather, while it was slightly distorted, it still presented a good surface profile. The sliding zones shown in the sample of Experiment II are not present, although twinned crystals are present after the multi-thermal shock process. Therefore, it can be inferred that the formation of C54 phase was based on transformation of highly deformed C49 phase.

Further thermal shock may not produce a number of crystal defects in C54 phase, possibly because there may be fewer dislocation slip systems in the face-centered orthorhombic C54 phase compared with that in the body- centered orthorhombic C49 phase. Therefore further thermal shock induces the twinned crystals in the C54 phase to absorb the deformation energy.

The enhancement mechanism of the C54 phase formation at a low temperature may be attributed to the creation of crystal defects in the C49 phase, which were intensively induced by the multi-thermal-shock process. The crystal defects caused heavy strain, thus significantly increasing the internal energy in C49 phase. Figure 12 shows a schematic illustration of the enhancement mechanism of the C54 phase formation. T_θ is the equlibrium temperature for the C49 and C54 phases. At temperature T_e the free energy Gc₄₉ of the C49 phase is equal to the free energy Gcs4 of the C54 phase. With annealing of the samples at a temperature 7_/ above T_e (Ti>T_e), the C54 phase forms because of the lower free energy, while the formation of C49 phase takes place at a lower annealing temperature T_∑ (T₂<T_β). As the internal energy of the C49 phase was increased by the multi-thermal-shock processing, the free energy of C49 phase became G'c₄ = Gc₄₉ + Eintemai where "Gc49" is the free energy of the C49 phase without deformation and "E/πtema/" is the added free energy.

It appears that the original free energy curve of the C49 phase, without the multi-thermal-shock treatment was shifted up from Gc49 to G^*c4₉ and formed the new free energy curve G The G'c49 curve is parallel to the Gc49 curve, as shown in Figure 12. This shift appears to have resulted from the equilibrium temperature of the C54 and C49 phases being decreased from T_e to T_e ^*. It is believed that this is why the phase transformation temperature was reduced significantly by multi-thermal-shock processing.

In general, temperature is the critical factor for phase transformation. However the phase transformation may not take place sufficiently when the temperature is close to that providing thermodynamic conditions at about the equilibrium state. The driving force from higher or lower temperatures is the essential factor dominating the phase transformation when the thermodynamic conditions are satisfied in the system.

In Experiment I, the small amount of C54 phase formed after annealed at 600°C for 60 seconds indicates that the T_θ is slightly lower than 600°C. Because the T_β is close to the 600°C annealing temperature for the sample, the free energy driving force from the "over-heated" temperature (600 °C - T_e) is too weak to facilitate the formation of C54 phase. However, after the T_e is reduced to T_e ^* by multi-thermal-shock processing, the driving force for the C54 phase formation from "over-heated" (600 °C - T_e becomes much greater. Therefore, the C54 phase formation can be enhanced significantly by multi-thermal-shock processing.

The resistivity versus the number of thermal shocks is plotted in Figure 13. It indicates that resistivity decreased with increasing numbers of thermal shock cycles. This result shows that the multi-thermal-shock processing is able to enhance the C54 phase formation significantly.

Having described the experimental results of Experiments I, II and III, it should be evident to a skilled addressee that, for a suitable crystalline material, it is possible to determine a suitable set of parameters for producing a preferred crystalline phase transformation thereof.

To do this, the procedure would preferably be to prepare suitable crystalline samples in a first phase, in one form by depositing a first material on a second material to form the sample, the first material and the second material having different thermal and mechanical and/or anisotropic and/or microstructural properties. A first sample may then be heated (annealed) at a selected temperature for a period of time. The sample is cooled and tested for the presence of a required second crystalline phase. If the required phase is present in the sample, the process is repeated at a lower temperature with a new sample. The process is repeated until it is found that the required second crystalline phase is not present in the annealed sample. In this manner, the lowest possible heating temperature at which the required crystalline phase will form can be determined or estimated.

Additionally, the duration of heating and cooling, the total number of cycles, and the rate of heating and cooling between cycles, will all need to be varied according to the type of material being formed. Ideally of course, the optimal duration of the first time period will be shorter than the time required for recrystallisation of any undesired crystalline phases, whilst the total number of cycles will most preferably be the minimum number that allows for the desired amount of the preferred crystalline phase to be formed. In actual manufacturing situations, other practical engineering constraints may also influence the parameters chosen for any given suitable crystalline material.

Claims

The claims defining the invention are as follows:

1. A method of forming a crystalline phase material, the method including the steps of:

- providing a crystalline material of a first crystalline phase; and

- subjecting the crystalline material to cyclical annealing at an upper elevated temperature and a lower elevated temperature to transform first crystalline phase to a desired amount of a second crystalline phase.

2. A method according to claim 1 wherein the cyclical annealing is suitable to subject the crystalline material to repeated thermal shock in order to transform first crystalline phase to the desired amount of the second crystalline phase.

3. A method according to claim 1 wherein an extremely thin layer of the desired second crystalline phase is formed.

4. A method according to claim 3 wherein the extremely thin layer is less than about 1 micron in thickness.

5. A method according to claim 3 wherein the extremely thin layer has a thickness in the range from the thickness of a monolayer (the thickness of one atom) up to about 1 micron.

6. A method according to claim 3, wherein the extremely thin layer has a thickness in the range of from 1 Angstrom to 4000 Angstrom.

7. A method according to claim 1 wherein the crystalline material is a non iron-based crystalline material suitable for use as an electronic material.

8. A method according to claim 1 wherein the crystalline material is a refractory or non-refractory metal silicide, such as a tungsten, cobalt, copper or titanium silicide.

9. A method according to claim 1 wherein the crystalline material is titanium silicide (TiSi_x).

10. A method according to claim 1 wherein the first of the annealing cycles subjects the crystalline material to a thermal shock, which creates defects at, and thus initiates phase transformation from the first crystalline phase to the second crystalline phase at the interface between a substrate and the crystalline material, and wherein, in subsequent cycles, further thermal shocks create more defects, both at the interface and within the crystalline material, thus creating more nucleation sites and increasing the internal energy of the crystalline material, which in turn enhances phase transformation of more of the crystalline material from the first crystalline phase to the second crystalline phase.

11. A method according to claim 1 wherein the lower elevated temperature is within the range of 200 to 400°C.

12. A method according to claim 1 wherein the lower elevated temperature is within the range of 250 to 350°C.

13. A method according to claim 1 wherein the upper elevated temperature is within the range of 500 to 700°C.

14. A method according to claim 1 wherein the upper elevated temperature is within the range of 550 to 650°C.

15. A method according to claim 1 wherein the crystalline material is subjected to from 2 to 50 cycles of annealing at upper and lower elevated temperatures.

16. A method according to claim 1 wherein the duration of annealing at the upper temperature is within the range of 1 to 30 seconds.

17. A method according to claim 1 wherein the duration of annealing at the upper temperature is within the range of 2 to 15 seconds.

18. A method according to claim 1 wherein the duration of annealing at the lower temperature is within the range of 1 to 30 seconds.

19. A method according to claim 1 wherein the duration of annealing at the lower temperature is within the range of 2 to 15 seconds.

20. A method according to claim 1 wherein the rate of temperature increase and decrease between the annealing at upper and lower elevated temperatures is within the range of 15 to 25°C/sec.

21. A method according to claim 1 wherein the rate of temperature increase and decrease between the annealing at upper and lower elevated temperatures is within the range of 18 to 22°C/sec.

22. A method according to claim 1 wherein the crystalline material of the first crystalline phase is provided by deposition of the material on a substrate by chemical vapor deposition or physical vapor deposition.

23. A method according to claim 1 wherein the crystalline material of the first crystalline phase is provided by forming a layer of a suitable metal on a suitable substrate, and annealing the substrate and layer thereon under conditions suitable to form the material by a reaction between the substrate and the layer.

24. A method according to claim 23 wherein the annealing to form the material by said reaction is provided by an initial stage of the cyclical annealing.

25. A method according to claim 1 wherein the crystalline material is titanium silicide, the first crystalline phase is the C49 phase, and the second crystalline phase is the C54 phase.

26. A method according to claim 25 wherein the crystalline material is subjected to from 6 to 20 cycles of annealing at upper and lower elevated temperatures.

27. A method according to claim 25 wherein the lower elevated temperature is about 300°C.

28. A method according to claim 25 wherein the upper elevated temperature is about 600°C.

29. A method according to claim 25 wherein the rate of temperature increase and decrease between the annealing at upper and lower elevated temperatures is about 20°C/sec.

30. A method of forming a crystalline phase material, the method including cyclically subjecting C49 phase titanium silicide to annealing at upper and lower elevated temperatures to transform C49 phase titanium silicide to a desired amount of C54 phase titanium silicide.

31. A method of forming a crystalline phase material, the method including cyclically subjecting a C49 phase titanium silicide to annealing at an upper elevated temperature within the range of 500 to 700°C for a duration of 1 to 30 seconds, and annealing at a lower elevated temperature within the range of 200 to 400°C for a duration of 1 to 30 seconds, with a rate of temperature change between cycles within the range of 15 to 25°C/sec, to transform C49 phase titanium silicide to a desired amount of C54 phase titanium silicide.

32. An integrated circuit comprising a crystalline phase material formed by the method of claim 1.

33. An integrated circuit comprising a crystalline phase material formed by the method of claim 30.

34. An integrated circuit comprising a crystalline phase material formed by the method of claim 31.

35. A process for the manufacture of an integrated circuit, the process including as a part thereof a method in accordance with claim 1.

36. A process for the manufacture of an integrated circuit, the process including as a part thereof a method in accordance with claim 30.

37. A process for the manufacture of an integrated circuit, the process including as a part thereof a method in accordance with claim 31.