WO2002071410A3 - Higher program threshold voltage and faster programming rates based on improved erase methods - Google Patents

Higher program threshold voltage and faster programming rates based on improved erase methods Download PDF

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Publication number
WO2002071410A3
WO2002071410A3 PCT/US2001/045700 US0145700W WO02071410A3 WO 2002071410 A3 WO2002071410 A3 WO 2002071410A3 US 0145700 W US0145700 W US 0145700W WO 02071410 A3 WO02071410 A3 WO 02071410A3
Authority
WO
WIPO (PCT)
Prior art keywords
programming
threshold voltage
rates based
program threshold
programming rates
Prior art date
Application number
PCT/US2001/045700
Other languages
French (fr)
Other versions
WO2002071410A2 (en
Inventor
Darlene G Hamilton
Narbeh Derhacobian
Janet S Y Wang
Kulachet Tanpairoj
Original Assignee
Advanced Micro Devices Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Advanced Micro Devices Inc filed Critical Advanced Micro Devices Inc
Priority to JP2002570242A priority Critical patent/JP3955530B2/en
Priority to EP01273929.8A priority patent/EP1366497B1/en
Priority to AU2002218010A priority patent/AU2002218010A1/en
Publication of WO2002071410A2 publication Critical patent/WO2002071410A2/en
Publication of WO2002071410A3 publication Critical patent/WO2002071410A3/en

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Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C16/00Erasable programmable read-only memories
    • G11C16/02Erasable programmable read-only memories electrically programmable
    • G11C16/06Auxiliary circuits, e.g. for writing into memory
    • G11C16/34Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
    • G11C16/3404Convergence or correction of memory cell threshold voltages; Repair or recovery of overerased or overprogrammed cells
    • G11C16/3409Circuits or methods to recover overerased nonvolatile memory cells detected during erase verification, usually by means of a "soft" programming step
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/56Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
    • G11C11/5671Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency using charge trapping in an insulator
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C16/00Erasable programmable read-only memories
    • G11C16/02Erasable programmable read-only memories electrically programmable
    • G11C16/04Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
    • G11C16/0466Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells with charge storage in an insulating layer, e.g. metal-nitride-oxide-silicon [MNOS], silicon-oxide-nitride-oxide-silicon [SONOS]
    • G11C16/0475Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells with charge storage in an insulating layer, e.g. metal-nitride-oxide-silicon [MNOS], silicon-oxide-nitride-oxide-silicon [SONOS] comprising two or more independent storage sites which store independent data
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C16/00Erasable programmable read-only memories
    • G11C16/02Erasable programmable read-only memories electrically programmable
    • G11C16/06Auxiliary circuits, e.g. for writing into memory
    • G11C16/10Programming or data input circuits
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C16/00Erasable programmable read-only memories
    • G11C16/02Erasable programmable read-only memories electrically programmable
    • G11C16/06Auxiliary circuits, e.g. for writing into memory
    • G11C16/34Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
    • G11C16/3404Convergence or correction of memory cell threshold voltages; Repair or recovery of overerased or overprogrammed cells
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C16/00Erasable programmable read-only memories
    • G11C16/02Erasable programmable read-only memories electrically programmable
    • G11C16/06Auxiliary circuits, e.g. for writing into memory
    • G11C16/34Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
    • G11C16/3436Arrangements for verifying correct programming or erasure
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C16/00Erasable programmable read-only memories
    • G11C16/02Erasable programmable read-only memories electrically programmable
    • G11C16/06Auxiliary circuits, e.g. for writing into memory
    • G11C16/34Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
    • G11C16/3436Arrangements for verifying correct programming or erasure
    • G11C16/344Arrangements for verifying correct erasure or for detecting overerased cells
    • G11C16/3445Circuits or methods to verify correct erasure of nonvolatile memory cells
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C16/00Erasable programmable read-only memories
    • G11C16/02Erasable programmable read-only memories electrically programmable
    • G11C16/06Auxiliary circuits, e.g. for writing into memory
    • G11C16/34Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
    • G11C16/3436Arrangements for verifying correct programming or erasure
    • G11C16/3454Arrangements for verifying correct programming or for detecting overprogrammed cells
    • G11C16/3459Circuits or methods to verify correct programming of nonvolatile memory cells
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C29/00Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/04Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
    • G11C29/50Marginal testing, e.g. race, voltage or current testing
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C29/00Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/04Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
    • G11C29/50Marginal testing, e.g. race, voltage or current testing
    • G11C29/50004Marginal testing, e.g. race, voltage or current testing of threshold voltage
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C16/00Erasable programmable read-only memories
    • G11C16/02Erasable programmable read-only memories electrically programmable
    • G11C16/04Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS

Abstract

A method and system for programming of the normal bits of a memory array of dual bit memory cells (68) is accomplished by programming at a substantially high delta VT. The substantially higher VT assures that stresses and/or customer operation over substantial periods of time. Furthermore, by utilizing substantially high gate and drain voltages during programming, programming times are kept short without degrading charge loss. A methodology is provided that determines the charge loss for single bit operation during program and erase cycles. The charge losses over cycling and stress are then utilized to determine an appropriate delta VT to be programmed into a command logic (64) and state machine (65).
PCT/US2001/045700 2001-02-28 2001-11-01 Higher program threshold voltage and faster programming rates based on improved erase methods WO2002071410A2 (en)

Priority Applications (3)

Application Number Priority Date Filing Date Title
JP2002570242A JP3955530B2 (en) 2001-02-28 2001-11-01 Higher program VT and faster program speed based on improved erase method
EP01273929.8A EP1366497B1 (en) 2001-02-28 2001-11-01 Higher program threshold voltage and faster programming rates based on improved erase methods
AU2002218010A AU2002218010A1 (en) 2001-02-28 2001-11-01 Higher program threshold voltage and faster programming rates based on improved erase methods

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US09/796,282 2001-02-28
US09/796,282 US6456533B1 (en) 2001-02-28 2001-02-28 Higher program VT and faster programming rates based on improved erase methods

Publications (2)

Publication Number Publication Date
WO2002071410A2 WO2002071410A2 (en) 2002-09-12
WO2002071410A3 true WO2002071410A3 (en) 2003-05-01

Family

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Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/US2001/045700 WO2002071410A2 (en) 2001-02-28 2001-11-01 Higher program threshold voltage and faster programming rates based on improved erase methods

Country Status (6)

Country Link
US (2) US6456533B1 (en)
EP (1) EP1366497B1 (en)
JP (1) JP3955530B2 (en)
AU (1) AU2002218010A1 (en)
TW (1) TW541535B (en)
WO (1) WO2002071410A2 (en)

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Also Published As

Publication number Publication date
AU2002218010A1 (en) 2002-09-19
EP1366497A2 (en) 2003-12-03
US6590811B1 (en) 2003-07-08
WO2002071410A2 (en) 2002-09-12
US6456533B1 (en) 2002-09-24
JP3955530B2 (en) 2007-08-08
EP1366497B1 (en) 2014-06-04
TW541535B (en) 2003-07-11
JP2004529448A (en) 2004-09-24
US20020159293A1 (en) 2002-10-31

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