WO2003015111A1 - Stacked capacitor with aluminium electrodes separated by conductive polymer - Google Patents
Stacked capacitor with aluminium electrodes separated by conductive polymer Download PDFInfo
- Publication number
- WO2003015111A1 WO2003015111A1 PCT/US2002/024674 US0224674W WO03015111A1 WO 2003015111 A1 WO2003015111 A1 WO 2003015111A1 US 0224674 W US0224674 W US 0224674W WO 03015111 A1 WO03015111 A1 WO 03015111A1
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- capacitor
- aluminum foil
- layer
- polymer
- layers
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01G—CAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES OR LIGHT-SENSITIVE DEVICES, OF THE ELECTROLYTIC TYPE
- H01G9/00—Electrolytic capacitors, rectifiers, detectors, switching devices, light-sensitive or temperature-sensitive devices; Processes of their manufacture
- H01G9/004—Details
- H01G9/008—Terminals
- H01G9/012—Terminals specially adapted for solid capacitors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01G—CAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES OR LIGHT-SENSITIVE DEVICES, OF THE ELECTROLYTIC TYPE
- H01G9/00—Electrolytic capacitors, rectifiers, detectors, switching devices, light-sensitive or temperature-sensitive devices; Processes of their manufacture
- H01G9/15—Solid electrolytic capacitors
Definitions
- the invention relates generally to electronic capacitors, and more specifically to foil stacked capacitors using aluminum and polymer.
- Electrical circuits often include capacitors for various purposes such as filtering, bypassing, power decoupling, and to perform other functions.
- High-speed digital integrated circuits such as processors and computer chipsets in particular typically perform best when the power supplied to the integrated circuit is filtered with a capacitor placed physically close to the integrated circuit.
- Such power decoupling capacitors function to smooth out irregularities in the voltage supplied to the integrated circuits, and so serve to provide the integrated circuits with a more ideal voltage supply.
- decoupling capacitors By placing the decoupling capacitors near the integrated circuit, parasitic impedances such as printed circuit board path resistance or inductance are minimized, allowing easy and efficient transfer of energy from the decoupling capacitor to the integrated circuit. Minimization of series resistance and inductance in the capacitor itself is also desirable for the same purposes, and results in a more efficient and desirable decoupling or bypass capacitor.
- the internal series resistance of the capacitor is typically known as the Equivalent Series Resistance, or ESR.
- ESR Equivalent Series Resistance
- ESL Equivalent Series Inductance
- capacitors it is also desirable for capacitors to have a physically small size, so that they do not take an unduly large amount of printed circuit board space. This is why space efficient capacitor technologies such as tantalum and electrolytic capacitors are often implemented in circuits despite typically having relatively high inductance, resistance, dielectric absorption, and other unfavorable characteristics. Mitigation of unfavorable capacitor characteristics of electrolytic or tantalum capacitors often also requires use of parallel capacitors with more favorable characteristics as secondary or supplemental decoupling capacitors.
- Figure 1 shows a side view of a aluminum foil and polymer capacitor with opposing connected layers, consistent with an embodiment of the present invention.
- Figure 2 shows a surface mount capacitor package, consistent with an embodiment of the present invention.
- FIG. 3 shows multitermination surface mount technology (SMT) capacitor package, consistent with an embodiment of the present invention.
- SMT surface mount technology
- Figure 4 shows an aluminum foil and polymer capacitor having multiple conductive aluminum foil strips per layer, consistent with an embodiment of the present invention.
- Figure 5 shows an aluminum foil and polymer capacitor having multiple conductive aluminum foil strips per layer and further having alternate orientation of adjacent layers of aluminum foil strips, consistent with an embodiment of the present invention.
- the present invention eliminates in some applications the need to use multiple capacitors in parallel to achieve the desired level of performance, and is therefore also more easily located near a processor or other device for bypass applications.
- Figure 1 illustrates a stacked capacitor configuration, as may be used to practice the present invention.
- Electrical terminal 101 is connected to a first set of aluminum foil layers, each of which is separated from an aluminum foil layer in a second set connected to a second electrical terminall02 by a polymer 103.
- the polymer 103 may be an organic polymer, and in embodiments of the invention where aluminum foil layers of at least one pole are oxidized to form a dielectric barrier may be conductive polymers that are applied in contact with the foil layers. Because the polymer and foil construction of some embodiments of the invention does not have any polarity-specific features, the polarity of the first and second electrical terminals or poles of these embodiments is not determined by the capacitor design. These capacitors may therefore be electrically connected without regard to terminal polarity, unlike tantalum, electrolytic, and some other capacitor technologies commonly used in bypass or decoupling applications.
- FIG. 2 shows a surface mount capacitor package, as may be used to implement some embodiments of the present invention.
- the capacitor is encased in a package 201 that may be a solid polymer, an epoxy, or other material that physically holds or supports the capacitive elements such as shown in Figure 1.
- the capacitor is connected to external circuitry via electronic leads or terminations 202 and 203.
- electronic leads or terminations 202 and 203 typically, such a capacitor will be placed on a printed circuit board and soldered via reflow soldering or a similar method to conductive pads and traces on the circuit board.
- the leads 202 and 203 in the present invention need not be polarized such that one particular lead must be connected to a positive voltage with respect to the other, but nevertheless may in some embodiments of the invention be polarized.
- FIG. 3 illustrates an advanced implementation of the present invention using a multiterminal surface mount technology (SMT) package to house and connect the capacitor.
- SMT surface mount technology
- the eight-terminal SMT package is commonly used for housing multilayer ceramic capacitors, and so is a common form factor and easily integrated into printed circuit board designs.
- Other variations of such a package exist and are within the scope of this invention, such as a package having terminations on more than two sides of such a device.
- larger packages such as a standard dual in-line package (DIP) may be used to house and connect the capacitor.
- DIP dual in-line package
- the multiterminal SMT package 301 contains a conductive sheet of aluminum foil 302.
- the aluminum foil for any given layer is connected either to the positive terminals or to the negative terminals of the multiterminal SMT package, as shown at 301 and 305.
- the aluminum foil 302 is connected only to negative terminals such as shown at 303, and not to the positive terminals 304.
- an aluminum sheet of opposite polarity in the capacitor is connected only to positive terminals and not to negative terminals. Alternating positive and negative layers of aluminum foil are stacked on top of each other in alternating fashion, each separated by a polymer layer, forming a capacitor similar to the capacitor illustrated in Figure 1.
- the design of the capacitor of Figure 3 is calculated to reduce the equivalent series inductance (ESL) of the capacitor, allowing it to provide current flow as a bypass capacitor more rapidly than other higher ESL designs. More specifically, the use of multiple terminals for the positive and negative connections to the corresponding alternating layers of aluminum foil in the capacitor reduces ESL, as does driving the alternating layers of foil in the capacitor in an opposite physical direction to the layers immediately above and below each layer of aluminum.
- ESL equivalent series inductance
- the aluminum foil may be etched to increase the surface area of the aluminum foil.
- Application of a conductive polymer or organic polymer to the etched foil provides a conductive path between the alternating etched aluminum foil capacitive plates, and therefore facilitates a higher capacitance than would be possible using other technologies.
- Formation of aluminum oxide (AI2O3) or other dielectric on the aluminum foil layers of at least one pole of the capacitor provides the dielectric component of the capacitor, and the organic polymer effectively acts as an extension of a conductive pole of the capacitor.
- such a capacitor configuration has the desirable property of self-healing, or self-forming a dielectric barrier in places within the capacitor where the dielectric is damaged or has imperfections and electricity is conducted between the poles of the capacitor.
- the polymer of the present invention is deposited in some embodiments onto very thin aluminum foil, which may be cut into strips or other shapes such as shown in Figure 3. These strips or shapes can be stacked in alternating layers, such that the alternating layers are attached alternately to a first or second terminal of the capacitor.
- the capacitors of the present invention need not be polarized, but in some embodiments may be polarized such that a positive terminal or anode must be connected to a higher voltage than a negative terminal or cathode.
- the capacitor of the present invention is configured in a flat package configuration with multiple layers of foil connected to each pole, it may be packaged in a number of other common format packages traditionally used for other purposes. Examples include EIA spec MLCC or tantalum format capacitor-style packages, which are typically used for various other capacitor technologies such as stacked ceramic and tantalum capacitors. Other multiterminal packages having more than two terminals may again be utilized to provide multiple connections to each pole of the capacitor, providing potential benefits in realized ESL and ESR reduction.
- Figure 4 illustrates another possible configuration consistent with the present invention, including separating aluminum strips and driving alternating strips within a single layer from different pole connection points, further reducing ESL over configurations such as are shown in Figure 1. For each strip of a certain layer and pole such as 401, which is connected here to positive pole 402, at least one neighboring strip 403 is connected to a pole of the same polarity but on the opposite side of the capacitor such as 403 is connected to pole 404.
- the layer immediately above or below the layer having strips 401 and 403 connected to positive poles comprises similarly alternating strips connected to negative poles.
- strip 405 is directly under strip 401, and is separated only by the organic polymer and by the aluminum oxide dielectric on at least one of the strips.
- Strip 405 is opposite in polarity from strip 401, and is connected to a pole at the strip end opposite the end to which strip 401 is connected to its respective opposite pole.
- the terminals and alternating foil layers are not restricted to only two sides of a package or to two orientations using this format.
- alternating and electrically opposing strips may be arranged or woven into a four- sided format such as is illustrated generally in Figure 5 to further reduce ESL.
- Use of a conductive polymer, etched aluminum foil layers, and aluminum oxide on a surface of the aluminum foil layers of at least one pole as a dielectric in some embodiments further increases the capacitance and volumetric efficiency of the present invention, making it particularly desirable for bypass applications in high power, high speed circuits.
Abstract
Description
Claims
Priority Applications (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE60232339T DE60232339D1 (en) | 2001-08-06 | 2002-08-01 | STACKING CONDENSER WITH ALUMINUM ELECTRODES ISOLATED BY A CONDUCTIVE POLYMER |
EP02794656A EP1415313B1 (en) | 2001-08-06 | 2002-08-01 | Stacked capacitor with aluminium electrodes separated by conductive polymer |
AT02794656T ATE431614T1 (en) | 2001-08-06 | 2002-08-01 | STACKED CAPACITOR WITH ALUMINUM ELECTRODES SEPARATED BY A CONDUCTIVE POLYMER |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US09/922,965 US6590762B2 (en) | 2001-08-06 | 2001-08-06 | Layered polymer on aluminum stacked capacitor |
US09/922,965 | 2001-08-06 |
Publications (1)
Publication Number | Publication Date |
---|---|
WO2003015111A1 true WO2003015111A1 (en) | 2003-02-20 |
Family
ID=25447883
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/US2002/024674 WO2003015111A1 (en) | 2001-08-06 | 2002-08-01 | Stacked capacitor with aluminium electrodes separated by conductive polymer |
Country Status (7)
Country | Link |
---|---|
US (2) | US6590762B2 (en) |
EP (1) | EP1415313B1 (en) |
CN (1) | CN100565734C (en) |
AT (1) | ATE431614T1 (en) |
DE (1) | DE60232339D1 (en) |
MY (1) | MY129379A (en) |
WO (1) | WO2003015111A1 (en) |
Families Citing this family (14)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6980414B1 (en) * | 2004-06-16 | 2005-12-27 | Marvell International, Ltd. | Capacitor structure in a semiconductor device |
US6590762B2 (en) * | 2001-08-06 | 2003-07-08 | Intel Corporation | Layered polymer on aluminum stacked capacitor |
TWI279080B (en) * | 2001-09-20 | 2007-04-11 | Nec Corp | Shielded strip line device and method of manufacture thereof |
US7365963B2 (en) * | 2003-03-17 | 2008-04-29 | Tdk Corporation | Capacitor element, solid electrolytic capacitor, processes for their production and capacitor element combination |
US6906907B2 (en) * | 2003-04-15 | 2005-06-14 | Kemet Electronics Corporation | Monolithic multi-layer capacitor with improved lead-out structure |
JP4354227B2 (en) | 2003-07-23 | 2009-10-28 | Tdk株式会社 | Solid electrolytic capacitor |
US7218504B2 (en) * | 2004-03-02 | 2007-05-15 | Intel Corporation | Capacitor device and method |
US7116548B2 (en) * | 2004-04-23 | 2006-10-03 | Kemet Electronics Corporation | Fluted anode with minimal density gradients and capacitor comprising same |
US20050237698A1 (en) * | 2004-04-23 | 2005-10-27 | Postage Bradley R | Reduced ESR through use of multiple wire anode |
US7342775B2 (en) * | 2004-04-23 | 2008-03-11 | Kemet Electronics Corporation | Fluted anode with minimal density gradients and capacitor comprising same |
US8094430B2 (en) * | 2006-12-22 | 2012-01-10 | Horowitz Harvey J | Capacitors, couplers, devices including same and methods of manufacturing same |
JP5293971B2 (en) * | 2009-09-30 | 2013-09-18 | 株式会社村田製作所 | Multilayer ceramic electronic component and method of manufacturing multilayer ceramic electronic component |
US11264449B2 (en) | 2020-03-24 | 2022-03-01 | Intel Corporation | Capacitor architectures in semiconductor devices |
CN113725008A (en) * | 2021-09-01 | 2021-11-30 | 中国振华(集团)新云电子元器件有限责任公司(国营第四三二六厂) | Non-polar capacitor and manufacturing method thereof |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4852227A (en) * | 1988-11-25 | 1989-08-01 | Sprague Electric Company | Method for making a multilayer ceramic capacitor with buried electrodes and terminations at a castellated edge |
US4947286A (en) * | 1988-08-11 | 1990-08-07 | Murata Manufacturing Co., Ltd. | Multilayer capacitor device |
EP0936642A2 (en) * | 1998-02-09 | 1999-08-18 | Matsushita Electric Industrial Co., Ltd. | Four-terminal capacitor |
Family Cites Families (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5626729A (en) * | 1996-02-01 | 1997-05-06 | Motorola, Inc. | Modified polymer electrodes for energy storage devices and method of making same |
JP2991175B2 (en) * | 1997-11-10 | 1999-12-20 | 株式会社村田製作所 | Multilayer capacitors |
JP3476127B2 (en) * | 1999-05-10 | 2003-12-10 | 株式会社村田製作所 | Multilayer capacitors |
US6590762B2 (en) * | 2001-08-06 | 2003-07-08 | Intel Corporation | Layered polymer on aluminum stacked capacitor |
-
2001
- 2001-08-06 US US09/922,965 patent/US6590762B2/en not_active Expired - Lifetime
-
2002
- 2002-07-31 MY MYPI20022881A patent/MY129379A/en unknown
- 2002-08-01 DE DE60232339T patent/DE60232339D1/en not_active Expired - Lifetime
- 2002-08-01 CN CNB028153375A patent/CN100565734C/en not_active Expired - Fee Related
- 2002-08-01 WO PCT/US2002/024674 patent/WO2003015111A1/en not_active Application Discontinuation
- 2002-08-01 EP EP02794656A patent/EP1415313B1/en not_active Expired - Lifetime
- 2002-08-01 AT AT02794656T patent/ATE431614T1/en not_active IP Right Cessation
-
2003
- 2003-02-24 US US10/373,154 patent/US6751087B2/en not_active Expired - Fee Related
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4947286A (en) * | 1988-08-11 | 1990-08-07 | Murata Manufacturing Co., Ltd. | Multilayer capacitor device |
US4852227A (en) * | 1988-11-25 | 1989-08-01 | Sprague Electric Company | Method for making a multilayer ceramic capacitor with buried electrodes and terminations at a castellated edge |
EP0936642A2 (en) * | 1998-02-09 | 1999-08-18 | Matsushita Electric Industrial Co., Ltd. | Four-terminal capacitor |
Also Published As
Publication number | Publication date |
---|---|
DE60232339D1 (en) | 2009-06-25 |
EP1415313B1 (en) | 2009-05-13 |
ATE431614T1 (en) | 2009-05-15 |
US6751087B2 (en) | 2004-06-15 |
US20030137800A1 (en) | 2003-07-24 |
CN1539151A (en) | 2004-10-20 |
EP1415313A1 (en) | 2004-05-06 |
US20030026058A1 (en) | 2003-02-06 |
US6590762B2 (en) | 2003-07-08 |
MY129379A (en) | 2007-03-30 |
CN100565734C (en) | 2009-12-02 |
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