WO2003019515A1 - Circuit arrangement for controlling a monochrome flat screen - Google Patents
Circuit arrangement for controlling a monochrome flat screen Download PDFInfo
- Publication number
- WO2003019515A1 WO2003019515A1 PCT/DE2002/003009 DE0203009W WO03019515A1 WO 2003019515 A1 WO2003019515 A1 WO 2003019515A1 DE 0203009 W DE0203009 W DE 0203009W WO 03019515 A1 WO03019515 A1 WO 03019515A1
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- converter
- voltage
- digital signal
- signal
- circuit arrangement
- Prior art date
Links
Classifications
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G5/00—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
- G09G5/003—Details of a display terminal, the details relating to the control arrangement of the display terminal and to the interfaces thereto
- G09G5/005—Adapting incoming signals to the display format of the display terminal
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/2007—Display of intermediate tones
- G09G3/2074—Display of intermediate tones using sub-pixels
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G5/00—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
- G09G5/003—Details of a display terminal, the details relating to the control arrangement of the display terminal and to the interfaces thereto
- G09G5/006—Details of the interface to the display terminal
Definitions
- the invention relates to a circuit arrangement according to the preamble of claim 1 for controlling a monochrome flat screen, which has at least two partial pixels per pixel, each of which is activated by a digital signal having a width of several bits, each digital signal using an analog-digital signal.
- Converter A / D converter
- a / D converter is formed from an analog video signal.
- the pixels consist regularly of three partial pixels, which can be activated separately. Due to the activation, the partial pixels either emit more or less colorless light or let more or less colorless light pass through. To generate a colored image, either a red, blue or green light-permeable color filter is assigned to the partial pixels.
- the red signal, the green signal and the blue signal of an analog video signal are each applied to an analog-digital converter, which regularly emit an eight-bit wide digital signal.
- the digital signals corresponding to the color components red, green and blue are then sent to an image processor, by means of which a so-called gamma correction, interpolation or scaling is carried out, for example.
- the signals are fed to the flat screen for controlling the partial pixels.
- the described screen As a monochrome screen.
- the color filters are omitted, so that a color differentiation of the three sub-pixels is no longer present.
- the inputs of the A / D converters are connected in parallel, so that the three partial pixels are activated in parallel.
- a disadvantage of the known control of the monochrome screens is that the gray level resolution is limited to 256 gray levels due to the eight bit wide digital signal. If you want a higher resolution, as is required in particular in medical technology, you have to switch to analog screens. However, this means that you either have to do without digital video signal processing and use analog video signal processing or that you use complex digital ten-bit video signal processing with subsequent digital-analog processing.
- a circuit arrangement for controlling a monochrome flat screen which has at least two partial pixels per pixel, each of which is activated by a digital, multi-bit wide signal, each digital signal being formed from an analog video signal by means of an analog-digital converter , characterized in that an offset voltage applied to the signal input of one of the a / D converter IRD ', the value of the part formed by the reciprocal number of the a / D converter can be represented by the least significant bit (LSB) of the digital signal Voltage corresponds.
- LSB least significant bit
- an offset voltage is applied to the signal input of one of the A / D converters, the value of which corresponds to the fraction formed by the reciprocal number of A / D converters of the voltage which can be represented by the LSB of the digital signal, is different Output signals from the A / D converter by the corresponding fraction of the LSB.
- the offset signal ensures that the “switching threshold * of the A / D converter differs by the corresponding fraction of the voltage that can be represented by the LSB. This in turn means that the “switching times * of the LSB of the A / D converter differ by the corresponding fraction of the voltage that can be represented by the LSB.
- the offset signal thus subdivides the voltage that can be represented by the LSB.
- the partial pixels of the flat screen are controlled with the digital signals output by the A / D converters, it is achieved that the controls of the partial pixels differ by a corresponding fraction of the LSB, which results in the desired increased gray level resolution.
- An embodiment of the invention is particularly advantageous in which there are three A / D converters, each of which emits an eight-bit wide digital signal, the offset voltage given to the signal input of the first A / D converter being positive and a third of the corresponds to the voltage which can be represented by the last significant bit of the digital signal, no offset voltage is applied to the signal input of the second A / D converter and the offset voltage given to the signal input of the third A / D converter is negative and corresponds to a third of the voltage that can be represented by the last significant bit of the digital signal.
- Such a circuit arrangement can be used directly in a conventional flat screen. Furthermore, such a circuit arrangement can be produced by a slight modification of a conventional circuit arrangement for controlling a conventional monochrome flat screen. Only one summation amplifier has to be arranged in front of the first A / D converter and the last A / D converter. An offset voltage is applied to the first input of the first summation amplifier, which corresponds to a third of the voltage that can be represented by the LSB of the corresponding A / D converter. The same voltage as for the first summation amplifier, but with the opposite polarity, is applied to the first input of the second summation amplifier. The monochrome video signal to be displayed on the flat screen is applied to the respective second input of the summation amplifier and the input of the third A / D converter.
- the single figure shows a schematic arrangement of a block diagram of a circuit arrangement according to the invention.
- the digital signals are eight bits wide.
- the first digital signal 2 corresponds to the red channel present on a color screen and is used to control the first partial pixels.
- the second digital signal 3 corresponds to the green channel present on a color screen and is used to control the second partial pixels.
- the third digital signal 4 corresponds to the blue channel present in a color screen and is used to control the third partial pixels.
- the digital signals 2, 3, 4 are obtained by processing in an image processor 5 from output signals 6, 7, 8 output by A / D converters 9, 10, 11.
- image processor 5 conventional processing of the output signals output by the A / D converters 9, 10, 11, such as scaling, interpolation or gamma correction, is carried out.
- a first summation amplifier 12 is located at the input of the first A / D converter 9.
- a second summation amplifier 13 is located at the input of the third A / D converter 11.
- a first offset voltage 14 is applied to the first input of the first summation amplifier 12. The value of the first offset voltage 14 is positive and corresponds to a third of the voltage that can be represented by the LSB of the first A / D converter 9.
- a second offset voltage 15 is applied to the first input of the second summation amplifier 13. The value of the second offset voltage 15 is negative and corresponds to a third of the voltage that can be represented by the LSB of the third A / D converter 11.
- the video signal 16 to be displayed on the flat screen 1 is applied to the second input of the first summation amplifier 12 and to the second input of the second summation amplifier 13 and also to the input of the second A / D converter 10.
- the amount thereof corresponds to the third part of the voltage value output by the LSB from the A / D converters 9, 10, 11, it is achieved that the A / D converters are each shifted by a third LSB have thresholds.
- the respective sub-pixels controlled by the output signals of the A / D converters 9, 10, 11 are controlled differently in accordance with the different switching thresholds.
- the offset Voltage 14 at the first summation amplifier 12 reaches that the input value of the first A / D converter 9 corresponds to the switching threshold of the first A / D converter 9.
- the first partial pixel of the flat screen 1 is activated accordingly.
- the video signal 16 increases by a value which is one third of that which can be represented by the LSB of the A / D converter 9, 10, 11
- the switching threshold of the second A / D converter 10 is reached.
- the second partial pixel of the flat screen 1 is controlled accordingly.
- the input voltage of the third A / D converter 11 reaches the switching threshold.
- the third sub-pixel of the flat screen 1 is controlled accordingly.
- the video signal 16 rises by a value which corresponds to a third of the voltage which can be represented by the LSB of the A / D converters 9, 10, 11, the brightness of the corresponding pixel of the flat screen 1
- the grayscale resolution of 256 grayscale that can be achieved with a conventional circuit arrangement achieves a grayscale resolution that is three times as high. In other words, a gray level resolution of 768 gray levels is achieved by means of the circuit arrangement according to the invention.
- control concepts with three times eight bits that are present by means of the present invention can be used for color displays. All properties of the analog interface board such as scaling, interpolation or gamma correction are retained.
Abstract
Description
Claims
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE10140738.6 | 2001-08-20 | ||
DE2001140738 DE10140738B4 (en) | 2001-08-20 | 2001-08-20 | Circuit arrangement for controlling a monochrome flat screen |
Publications (1)
Publication Number | Publication Date |
---|---|
WO2003019515A1 true WO2003019515A1 (en) | 2003-03-06 |
Family
ID=7695999
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/DE2002/003009 WO2003019515A1 (en) | 2001-08-20 | 2002-08-16 | Circuit arrangement for controlling a monochrome flat screen |
Country Status (2)
Country | Link |
---|---|
DE (1) | DE10140738B4 (en) |
WO (1) | WO2003019515A1 (en) |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5189406A (en) * | 1986-09-20 | 1993-02-23 | Thorn Emi Plc | Display device |
US5815641A (en) * | 1996-06-27 | 1998-09-29 | Texas Instruments Incorporated | Spatial light modulator with improved peak white performance |
Family Cites Families (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4733216A (en) * | 1986-10-29 | 1988-03-22 | Allied Corporation | N+1 bit resolution from an N bit A/D converter |
-
2001
- 2001-08-20 DE DE2001140738 patent/DE10140738B4/en not_active Expired - Fee Related
-
2002
- 2002-08-16 WO PCT/DE2002/003009 patent/WO2003019515A1/en not_active Application Discontinuation
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5189406A (en) * | 1986-09-20 | 1993-02-23 | Thorn Emi Plc | Display device |
US5815641A (en) * | 1996-06-27 | 1998-09-29 | Texas Instruments Incorporated | Spatial light modulator with improved peak white performance |
Also Published As
Publication number | Publication date |
---|---|
DE10140738A1 (en) | 2003-03-06 |
DE10140738B4 (en) | 2006-07-13 |
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