WO2003021656A3 - Improved material for use with ferroelectrics - Google Patents

Improved material for use with ferroelectrics Download PDF

Info

Publication number
WO2003021656A3
WO2003021656A3 PCT/EP2002/009259 EP0209259W WO03021656A3 WO 2003021656 A3 WO2003021656 A3 WO 2003021656A3 EP 0209259 W EP0209259 W EP 0209259W WO 03021656 A3 WO03021656 A3 WO 03021656A3
Authority
WO
WIPO (PCT)
Prior art keywords
tio2
sro
ferroelectrics
improved material
pzt
Prior art date
Application number
PCT/EP2002/009259
Other languages
French (fr)
Other versions
WO2003021656A2 (en
Inventor
Rainer Bruchhaus
Original Assignee
Infineon Technologies Ag
Rainer Bruchhaus
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Infineon Technologies Ag, Rainer Bruchhaus filed Critical Infineon Technologies Ag
Publication of WO2003021656A2 publication Critical patent/WO2003021656A2/en
Publication of WO2003021656A3 publication Critical patent/WO2003021656A3/en

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02172—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides
    • H01L21/02197—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides the material having a perovskite structure, e.g. BaTiO3
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/0226—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
    • H01L21/02263—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
    • H01L21/02266—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by physical ablation of a target, e.g. sputtering, reactive sputtering, physical vapour deposition or pulsed laser deposition
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02296—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer
    • H01L21/02318—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment
    • H01L21/02356—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment treatment to change the morphology of the insulating layer, e.g. transformation of an amorphous layer into a crystalline layer
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L28/00—Passive two-terminal components without a potential-jump or surface barrier for integrated circuits; Details thereof; Multistep manufacturing processes therefor
    • H01L28/40—Capacitors
    • H01L28/55—Capacitors with a dielectric comprising a perovskite structure material
    • H01L28/56—Capacitors with a dielectric comprising a perovskite structure material the dielectric comprising two or more layers, e.g. comprising buffer layers, seed layers, gradient layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L28/00—Passive two-terminal components without a potential-jump or surface barrier for integrated circuits; Details thereof; Multistep manufacturing processes therefor
    • H01L28/40—Capacitors
    • H01L28/60—Electrodes
    • H01L28/75—Electrodes comprising two or more layers, e.g. comprising a barrier layer and a metal layer

Abstract

A liner layer comprising TiO2 enriched SRO is disclosed. The TiO2 enriched SRO liner improves the reliability of ferroelectric materials such as PZT without adversely impacting or degrading the ferroelectric properties of the PZT. The SRTO, in one embodiment is sputtered using an SRO target doped with 1-10% TiO2.
PCT/EP2002/009259 2001-08-31 2002-08-19 Improved material for use with ferroelectrics WO2003021656A2 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US94491801A 2001-08-31 2001-08-31
US09/944,918 2001-08-31

Publications (2)

Publication Number Publication Date
WO2003021656A2 WO2003021656A2 (en) 2003-03-13
WO2003021656A3 true WO2003021656A3 (en) 2003-11-20

Family

ID=25482286

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/EP2002/009259 WO2003021656A2 (en) 2001-08-31 2002-08-19 Improved material for use with ferroelectrics

Country Status (2)

Country Link
TW (1) TW558726B (en)
WO (1) WO2003021656A2 (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7129196B2 (en) * 2003-07-21 2006-10-31 Los Alamos National Security, Llc Buffer layer for thin film structures
JP2005108876A (en) * 2003-09-26 2005-04-21 Toshiba Corp Semiconductor device and its manufacturing process

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6096434A (en) * 1997-06-30 2000-08-01 Tdk Corporation Film structure, electronic device, recording medium, and method for forming conductive oxide thin films
US6128178A (en) * 1998-07-20 2000-10-03 International Business Machines Corporation Very thin film capacitor for dynamic random access memory (DRAM)
US6194228B1 (en) * 1997-10-22 2001-02-27 Fujitsu Limited Electronic device having perovskite-type oxide film, production thereof, and ferroelectric capacitor
US6218233B1 (en) * 1997-11-04 2001-04-17 Nec Corporation Thin film capacitor having an improved bottom electrode and method of forming the same
US20010007364A1 (en) * 2000-01-12 2001-07-12 Fujitsu Limited Semiconductor device

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6096434A (en) * 1997-06-30 2000-08-01 Tdk Corporation Film structure, electronic device, recording medium, and method for forming conductive oxide thin films
US6194228B1 (en) * 1997-10-22 2001-02-27 Fujitsu Limited Electronic device having perovskite-type oxide film, production thereof, and ferroelectric capacitor
US6218233B1 (en) * 1997-11-04 2001-04-17 Nec Corporation Thin film capacitor having an improved bottom electrode and method of forming the same
US6128178A (en) * 1998-07-20 2000-10-03 International Business Machines Corporation Very thin film capacitor for dynamic random access memory (DRAM)
US20010007364A1 (en) * 2000-01-12 2001-07-12 Fujitsu Limited Semiconductor device

Also Published As

Publication number Publication date
WO2003021656A2 (en) 2003-03-13
TW558726B (en) 2003-10-21

Similar Documents

Publication Publication Date Title
WO2005081676A3 (en) Electroactive polymer pre-strain
WO2004099068A3 (en) Nanofiber surfaces for use in enhanced surface area applications
WO2003080693A3 (en) Impact resistant polyureaurethane and polyureaurethane prepolymer having low nco/oh ratio
EP1329307A4 (en) Transparent laminate having low emissivity
WO2006023594A3 (en) High strain glass/glass-ceramic containing semiconductor-on-insulator structures
EP1637225A4 (en) Photocatalyst member
AU2003295524A1 (en) Bgl7 beta-glucosidase and nucleic acids encoding the same
EP1449642A4 (en) Ultra-water-repellent substrate
WO2004041998A3 (en) Nanomechanichal energy, force, and mass sensors
AU2001249090A1 (en) Laminate comprising barrier layers on a substrate
EP1780315A3 (en) Boron doped diamond
AU2002343619A1 (en) Process, composition and coating of laminate material
EP1295965A3 (en) Article protected by thermal barrier coating having a sintering inhibitor, and its fabrication
AU2002319320A1 (en) Substituted isoxazoles and the use thereof as antibiotics
WO2006008239A3 (en) Luminescent silicon oxide flakes
CA2359998A1 (en) Nail gun spacer
WO2006127221A3 (en) Sputtering target tiles having structured edges separated by a gap
WO2004015016A3 (en) Flame-retardant composition, preparation method and use thereof
WO2008152976A1 (en) Semiconductor ceramic material
AU2002350325A1 (en) Low firing temperature thick film dielectric layer for electroluminescent display
WO2004040665A3 (en) Etch-stop material for improved manufacture of magnetic devices
AU2003211255A1 (en) Method of manufacturing glass panel, and glass panel manufactured by the method
AU2003272923A1 (en) Surface-treated calcium carbonate and resin composition comprising the same
EP1362831A3 (en) Ion conductor
WO2002084779A3 (en) Strain-relieved tunable dielectric thin films

Legal Events

Date Code Title Description
AK Designated states

Kind code of ref document: A2

Designated state(s): CN JP KR US

Kind code of ref document: A2

Designated state(s): CN JP KR

AL Designated countries for regional patents

Kind code of ref document: A2

Designated state(s): AT BE BG CH CY CZ DE DK EE ES FR GB GR IE IT LU MC NL PT SE SK TR

Kind code of ref document: A2

Designated state(s): AT BE BG CH CY CZ DE DK EE ES FI FR GB GR IE IT LU MC NL PT SE SK TR

121 Ep: the epo has been informed by wipo that ep was designated in this application
122 Ep: pct application non-entry in european phase
NENP Non-entry into the national phase

Ref country code: JP

WWW Wipo information: withdrawn in national office

Country of ref document: JP