WO2003021679A2

WO2003021679A2 - Integrated circuit structure and a method of making an integrated circuit structure

Info

Publication number: WO2003021679A2
Application number: PCT/IE2002/000128
Authority: WO
Inventors: Alan Mathewson; John Alderman; Julie Donnelly
Original assignee: National Microelectronic Research Centre University College Cork - National University Of Ireland Cork
Priority date: 2001-09-03
Filing date: 2002-08-30
Publication date: 2003-03-13
Also published as: WO2003021679A3; AU2002330718A1

Abstract

A mechanically flexible integrated circuit structure is disclosed. The circuit structure comprises a plurality of microelectronic elements (20) that are separate fabrications interconnected by a flexible interconnect system. The interconnect system includes electrical interconnections (22) formed, for example, of copper wire and a mechanical interconnection element (24) formed, for example, of a flexible polymer, such as polyimide. The circuit structure can be formed as an elongate fibre and such a fibre can be incorporated into a fabric. Such a fabric can be used to make fabric articles that incorporate an electronic circuit. The circuit elements can include basic electronic components, sensors, light emitters and so forth.

Description

INTEGRATED CIRCUIT STRUCTURE AND A METHOD OF MAKING AN INTEGRATED CIRCUIT STRUCTURE

BACKGROUND TO THE INVENTION

Field of the invention

This invention relates to an integrated circuit structure. In particular, but not exclusively, it relates to an integrated circuit structure that can be employed to create circuits of an elongate configuration, for example, in the form of fibres using Silicon on insulator (Sol) construction.

A problem facing the semiconductor industry today is that the limits of CMOS technology are being reached so the continuing reduction of the size of devices, as predicted by Moore's law, is expected to cease in a few more generations of CMOS technology. Therefore, there is now an interest in technology that can add more functionality to a device using the concept of a "system on a chip" (SoC) where many different microelectronics technologies are integrated into one chip, instead of using separate technologies to make various components of a system. However, this approach still limits the density with which components can be packed onto a chip, and conventional SoC configurations are unlikely to meet future demand because of interactions between various circuit components.

Summary of the prior art

In "Silicon Process Technology Innovations For Low Power RP Applications",

R. Dekker Proc. IEDM 98, there is disclosed a structure known as "silicon-on-anything" (SOA). In this disclosure, a thin silicon circuit that constitutes an entire integrated circuit is made using a silicon-on-insulator process. The circuit is floated off its substrate, and can then be bonded onto a plastic or ceramic substrate to build multi-chip modules. This structure minimises RF losses that inevitably occur in the presence of a semiconducting or conducting substrates. This approach is intended for RF applications and deals only with floating off whole extremely thin integrated circuits from silicon- on-insulator material.

US-A-5 674 758 discloses a circuit structure in which several electronic devices are interconnected by a mechanical and electrically conductive system on an essentially arbitrary substrate. Circuit elements are formed on a silicon wafer and then bonded to the substrate prior to removal of parts of the wafer that are not functional in the final circuit. The manufacturing process disclosed in that specification requires application of a glue layer to bond the circuit elements to the substrate. This is a difficult operation to perform, there being a risk that air will be trapped between the circuit elements and the substrate, which can lead to failure of the circuit. Moreover, the versatility of the process is limited in that the shape of the final circuit being limited to the shape of the circuit as originally constructed on the wafer.

SUMMARY OF THE INVENTION

An aim of this invention is to provide a structure and a method of its fabrication that can be used to fabricate System on a Chip (SoC) devices that are more versatile and have greater applicability and that suffer fewer manufacturing complications than known SoC structures.

From a first aspect, this invention provides an integrated circuit structure comprising a plurality of separate microelectronic circuit elements interconnected by a flexible interconnect system.

Preferably, the microelectronic circuit elements comprise separate devices, cells or structures.

The invention thereby provides an integrated circuit of arbitrary complexity that is, on a large scale, mechanically flexible. Such a device can be very versatile and can be suitable for use in a wide range of applications in which a traditional rigid circuit would be inconvenient or inapplicable.

This invention may be compared with other thinned Si flexible circuits in that these known technologies utilise a single monolithic block of thin material to construct an integrated circuit. In systems embodying the present invention, individual active components are completely isolated from each other (i.e. no longer in a monolithic Si block) and are made flexible by interconnection scheme.

The interconnect system typically includes electrical interconnect elements. These serve to create a functional electrical interconnection between the circuit elements. The electrical interconnection elements most typically include thin films of metal such as aluminium, copper, gold, platinum or platinum alloys combined with insulating dielectrics. The interconnect system may also serves to provide a flexible mechanical interconnect supporting element. The mechanical interconnecting element serves to provide a relatively strong mechanical support of the electrical interconnection between the elements. The mechanical supporting element (which may only be part of a multilevel metalisation scheme, may comprise a body of thin polymer film such as polyimide) along with the metal interconnects. Most typically, the electrical interconnection elements are embedded within the mechanical connecting element. The electrical interconnection elements can thereby be protected from mechanical stresses by the mechanical interconnecting element.

The starting material for the integrated circuit structure may be a silicon on insulator (SOI) wafer. In such embodiments, the elements may typically be formed as spaced islands of single crystal silicon on the oxide on top of the handle wafer, for example. Each of such islands may constitute an element of the circuit. Elements constituting a wide range of electronic devices may be included in embodiments of the invention. For example, the elements may include basic electronic components such as any or all of the following: transistors, diodes, resistors, capacitors and inductors as well as small sub units or cells. The range of elements may include a wide range of further components. For example, these may include photovoltaic elements (solar cells), light-emitting elements, and elements responsive to environmental conditions, such as temperature, light, heat, radiation, and so forth. The elements may further include physical, chemical or biological sensing elements. Such elements might be used to monitor functions of a person or animal in proximity to the circuit, particularly but not exclusively in cases where the circuit is incorporated into an article carried on a person such as a garment.

An integrated circuit structure embodying the invention may be of an arbitrary shape dissimilar to the shape of a substrate upon which circuit elements are formed. Specifically, where the circuit is formed on a handle wafer, the shape of the final circuit structure is not predetermined by the shape of the handle wafer. In particularly preferred embodiments, the integrated circuit structure is elongate. For example, it may be an elongate fibre, although this does not preclude other shapes being fabricated. Thus, the invention can also provide a textile comprising such a fibre. Such a textile might, for example, include a woven fabric, the fibre being incorporated into the weave. Such a fabric may be used in the manufacture of an article such as a garment to implement so- called wearable electronics.

From a second aspect, the invention provides a method of manufacturing an integrated circuit structure comprising fabricating a plurality of elements on a substrate, interconnecting the elements with a flexible interconnect system, and removing the interconnected elements from the substrate.

The substrate may be a silicon handle wafer. In such embodiments, the elements may be formed as spaced islands of single crystal silicon on the handle wafer.

The substrate may include an insulating layer (e.g. a layer of silicon oxide) upon which the elements are formed. In the step of removing the elements from the substrate, the elements may be completely separated from the handle wafer and dielectric film by removing the handle wafer below them and may be completely released by removing the insulating layer beneath the active devices.

The interconnect system may be formed by use of a lithographic technique, which defines interconnect between the device islands and may take the form of polymer based multilevel schemes. This takes the elongate shape of a fibre of a specific height and to cover a part of the of the wafer surface. The shape of the interconnect system can be arbitrary and defined by the functional requirements of the circuit. It is not restricted to the shape of the substrate.

The interconnect system is formed by a process including deposition of a layer of interconnect material onto the substrate. This avoids the need to use a bonding agent to bond the substrate to the interconnect material. Typically, the interconnect material includes a polymer such as polyimide.

BRIEF DESCRIPTION OF THE DRAWINGS

Figure 1 shows an embodiment of the invention constructed on a silicon wafer;

Figure 2 shows a silicon-on-insulator structure suitable for use in the construction of the embodiment of Figure 1 ;

Figure 3 shows the structure of Figure 2 having had device regions formed in its active layer;

Figure 4 is a plan view of an interconnect support structure, being part of an embodiment of the invention.

Figure 5 shows a section of a woven fabric material incorporating fibres embodying the invention; and

Figure 6 is a schematic illustration of embodiments of the invention before and after release form a silicon fabrication wafer.

DETAILED DESCRIPTION OF A PREFERRED EMBODIMENT

An embodiment of the invention will now be described in detail, by way of example, and with reference to the accompanying drawings.

An embodiment of the invention implements a system on a chip (SoC) integrated circuit device. The device of this embodiment is constructed as a flexible elongate fibre 10, suitable for incorporation into a textile for example by weaving or knitting. Applications of such a textile might include wearable electronics (e.g. electronic systems incorporated into garments), or a shelter structure such as a tent of woven material incorporating solar cells to make a large area power supply.

This embodiment could be constructed on any sized silicon wafer substrate 12 (at present, a typical size is 300 mm or nominally 12 inches). Such a wafer has a surface area of 706cm². If the fibre height is chosen to be 50μm, resulting in a theoretical maximum fibre length of 1.4 km, although the actual length will be less than this because of the need to ensure that there is a separation between strands of the fibre.

Experiments can be performed to determine the minimum practicable spacing between strands of the fibre would need to be in practice. It is expected that approximately 10% of the area of the wafer may be unusable, but a figure greater or less than this may be established by experiment.

A dielectric layer 14 of silicon oxide is formed on the substrate 12, and an active device layer 16 is formed on the dielectric layer 14 as part of the SOI manufacturing process. Electronic circuit elements 20 are formed by defining single crystal islands of silicon on the insulating layer 14 in a manner similar to that used in silicon-on-insulator fabrication. Each circuit element 20 is therefore a discrete structure electrically isolated from other circuit elements 20. As with any integrated circuit, specific elements are constructed to implement the functionality required of the circuit. Substantially any active element that can be constructed on the substrate can be used in embodiments of the invention to construct a circuit.

Subsequently, insulating materials are deposited on the substrate, which act to isolate each individual wire and prevent unwanted connections to other devices. This material is patterned with a lithography step, which defines the required contacts to the individual transistors. Electrical interconnection elements 22 are deposited on the substrate to form electrical interconnections between the individual circuit elements 20 in order to implement the circuit. Such interconnection elements 22 are formed, in this typical embodiment, of aluminium metal, but they might otherwise be copper or other metal or alloy. Once all of the electrical interconnection elements 22 are in place, the electrical circuit elements 20 and the interconnection elements 22 are covered by a layer of polymer film (e.g. polyimide) 24, the shape of which is defined by a further lithographic process which defines the outline of the fibre and the polymer is etched down to the dielectric layer (note that the same polymer film can be used to act as a contact mask as described above or could be patterned to take the form of the fibre). The polymer film 24 acts as a flexible mechanical interconnection between circuit elements 20 of the circuit to ensure that the electrical interconnects 22 are not subject to undue stress in the completed circuit. Thus, the circuit is formed as a track that extends to cover at least a region of the surface of the wafer 12.

The entire circuit, including the elements and interconnection system (comprising the electrical interconnection elements 22 and the polyimide layer 24), is then removed from the substrate 10, together with a portion of the underlying oxide layer. This can be done by removing, by etching, the underlying oxide layer. This method produces an integrated circuit in the form of a system of mechanically and electrically interconnected circuit elements in a flexible unitary body of polyimide.

The shape and topology of the circuit is essentially arbitrary, and can be selected to be well suited to its intended application. At its simplest, the circuit may be formed as a linear element, having properties of a fibre 10, as described above. Such a fibre 10 can be woven (or otherwise incorporated) into a textile, as shown in Figure 5. In most applications, such a textile will include warp and weft fibres 30 of normal material, with one or more fibres 10, 10' embodying the invention being interspersed between them. Where more than one fibre embodying the invention is incorporated into a textile, they may operate independently or they may be electrically interconnected as required to implement the desired functionality. For example, individual fibres 10 could be made each with a single functionality. These could then be interconnected at relevant places, for example, as shown at 32 in a weave of the textile. This allows a great deal of sophistication and/or multiple redundancy to be incorporated into an electronic system within the textile material. In designing the layout of the electronic elements within the fibre, a designer has considerable freedom to choose which of the elements are close to one another and which are remote from one another. This permits a designer to space apart components, perhaps by as much as several metres, that might interfere if they were placed near to one another.

The textile material can be used to construct a textile article, such as a garment or a textile structure. Indeed, embodiments of this invention would enable a supplier to incorporate electronics into flexible materials for use in a very wide range of circumstances in which flexible materials (such as cloth) are used. The electronic functionality of such circuits could be similar to that of existing electronic apparatus, or might be entirely new.

For example, embodiments of this invention can implement wearable computing or electronic systems by incorporating a flexible SoC structure into a garment. Any clothing might incorporate communications systems. A garment might also incorporate a solar cell array to provide power to electronic apparatus either embodying the invention or of a conventional nature, such as a mobile telephone or a portable computer. A sheet of textile (e.g. part of a garment) might readily include a very powerful electronic system. Several different SoC fibres embodying the invention could be used in the make up of the material. For example, material might include a sensing fibre, which includes biometric elements that could detect biological or physical parameters, a power supply fibre comprising a string of solar cells joined together, a computer fibre to analyse the information provided, and so forth.

As a specific example, sports clothing might incorporate health-monitoring electronics. Sports wear manufacturers could utilise this technology to build smart training suits that could monitor progress of athletes in the course of their daily training. Similarly, a garment could provide constant health monitoring of its wearer that could be used in diagnosis of health problems. It could even be configured to contact the emergency services in the event that the wearer suffers a medical emergency. Many variations on the above embodiments are possible. Several of these will now be described.

The shape of the outer defining regions does not need to be linear. This could be used to provide the capability of designing blocks of circuitry which are interconnected by flexible regions that are formed in a folded or serpentine configuration at 'A' in Figure 6. This facilitates the complete manufacture of entire systems that can be inserted directly into different shaped 3 -dimensional enclosures. This structure can be removed from the handle wafer (at 'B' in Figure 6). The structure can then be expanded to a working configuration by straightening the interconnection elements, as shown at 'C.

An example of this might, for example, be provided in the assembly of mobile phones or cameras. In such appliances, PCBs are used to join different components together in the system. The three dimensional structure and shape of the enclosure requires that the board be flexible. In this embodiment the flexible interconnect and complex devices could be incorporated in the same integrated circuit, which, after release would be mountable directly into the enclosure. This might reduce the manufacturing cost of systems that used this approach.

A second additional variant can be used to extend the realm of flexible active PCB technology. In this variant, prior to the release process, complementary components (e.g. electrical connectors, optical components, sensors, further electrical circuits including micro-controllers etc.) could be added at specific locations to the surface of the wafer by flip chip or surface mount or an appropriate prevailing die attach methodology. Such complementary components enhance system functionality. By way of this variant, entire systems could be built and assembled prior to the insertion into an enclosure.

Claims

1. An integrated circuit structure comprising a plurality of microelectronic circuit elements that are separate fabrications interconnected by a flexible interconnect system.

2. An integrated circuit structure according to claim 1 in which the interconnect system includes electrical interconnect elements that create a functional electrical interconnection between the components.

3. An integrated circuit structure according to claim 1 in which the electrical interconnection elements include wire of aluminium, copper, gold, platinum or platinum alloys.

4. An integrated circuit structure according to any preceding claim in which the interconnect system includes a physical interconnecting element that provides a mechanical interconnection between the elements.

5. An integrated circuit structure according to claim 4 in which the physical interconnecting element comprises a body of polymer material .

6. An integrated circuit structure according to claim 4 or claim 5 in which the electrical interconnection elements are embedded within the physical connecting element.

7. An integrated circuit structure according to any preceding claim in which the elements are formed as spaced islands on a substrate.

8. An integrated circuit structure according to claim 7 in which the elements are formed as spaced islands of single crystal silicon on a silicon handle wafer.

9. An integrated circuit structure according to claim 8 in which the elements are formed upon an insulating layer of the wafer.

10. An integrated circuit structure according to claim 8 or claim 9 in which each of such islands constitutes a device of the circuit.

11. An integrated circuit structure according to any preceding claim in which the elements include basic electronic components such as any or all of the following: transistors, diodes, resistors, capacitors and inductors.

12. An integrated circuit structure according to any preceding claim further including one or more complementary components from a group including electrical connectors, optical components, sensors and micro-controllers.

13. An integrated circuit structure according to any preceding claim in which elements include any or all of photovoltaic elements (solar cells), light-emitting elements, and elements responsive to environmental conditions, such as temperature, light, and radiation.

14. An integrated circuit structure according to any preceding claim in which the elements include biometric elements.

15. An integrated surface structure according to any preceding claim being of an arbitrary shape dissimilar to the shape of a substrate upon which circuit elements are formed.

16. An integrated circuit structure according to any preceding claim that is elongate.

17. An integrated circuit structure according to claim 16 that is an elongate fibre.

18. A textile incorporating a fibre according to claim 17.

19. A textile according to claim 18 being a woven fabric, the fibre being incorporated into the weave.

20. A method of manufacturing an integrated circuit structure comprising fabricating a plurality of elements on a substrate, interconnecting the elements with a flexible interconnect system, and removing the interconnected elements from the substrate.

21. A method according to claim 20 in which the substrate is a silicon handle wafer.

22. A method according to claim 21 in which the elements are formed as spaced islands of single crystal silicon on the handle wafer.

23. A method according to any one of claims 20 to 22 in which the substrate includes an insulating layer upon which the elements are formed.

24. A method according to claim 23 in which, in the step of removing the elements from the substrate, the elements are removed together with a portion of the underlying insulating layer.

25. A method according to claim 24 further comprising the step of mounting one or more complementary components from a group including electrical connectors, optical components, sensors and micro-controllers to said substrate.

26. A method according to claim 26 wherein said complementary components are mounted to said substrate prior to removing the elements from the substrate.

27. A method according to claim 27 wherein said complementary components are flip chip or surface mounted to said substrate.

28. A method according to any one of claims 20 to 27 in which one or both of the interconnect system and the circuit elements is shaped by a lithographic technique.

29. A method according to claim 28 in which the lithographic technique defines interconnect between the device islands.

30. A method according to claim 28 or claim 29 in which the lithographic technique is a plastic based multilevel scheme.

31. A method according to any one of claims 20 to 30 in which the shape of the interconnect system is arbitrary.

32. A method according to any one of claims 20 to 31 in which the interconnect system is formed by a' process including deposition of a layer of interconnect material onto the substrate.

33. A method according to claim 32 in which the interconnect material includes a polymer.

34. A method according to claim 32 in which the interconnect material is polyimide.