WO2003052812A3 - Non volatile memory cell with a trench transistor - Google Patents

Non volatile memory cell with a trench transistor Download PDF

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Publication number
WO2003052812A3
WO2003052812A3 PCT/DE2002/004523 DE0204523W WO03052812A3 WO 2003052812 A3 WO2003052812 A3 WO 2003052812A3 DE 0204523 W DE0204523 W DE 0204523W WO 03052812 A3 WO03052812 A3 WO 03052812A3
Authority
WO
WIPO (PCT)
Prior art keywords
trench
area
memory cell
drain
volatile memory
Prior art date
Application number
PCT/DE2002/004523
Other languages
German (de)
French (fr)
Other versions
WO2003052812A2 (en
Inventor
Frank Lau
Dezsoe Takacs
Josef Willer
Original Assignee
Infineon Technologies Ag
Frank Lau
Dezsoe Takacs
Josef Willer
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US10/022,654 external-priority patent/US6661053B2/en
Priority claimed from DE10162261A external-priority patent/DE10162261B4/en
Application filed by Infineon Technologies Ag, Frank Lau, Dezsoe Takacs, Josef Willer filed Critical Infineon Technologies Ag
Priority to KR1020047009444A priority Critical patent/KR100554647B1/en
Priority to CNB028254058A priority patent/CN100382254C/en
Priority to JP2003553610A priority patent/JP4081445B2/en
Priority to EP02791622A priority patent/EP1456876A2/en
Publication of WO2003052812A2 publication Critical patent/WO2003052812A2/en
Publication of WO2003052812A3 publication Critical patent/WO2003052812A3/en

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/792—Field effect transistors with field effect produced by an insulated gate with charge trapping gate insulator, e.g. MNOS-memory transistors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B69/00—Erasable-and-programmable ROM [EPROM] devices not provided for in groups H10B41/00 - H10B63/00, e.g. ultraviolet erasable-and-programmable ROM [UVEPROM] devices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B99/00—Subject matter not provided for in other groups of this subclass

Abstract

A memory cell with a trench transistor which is arranged in a trench embodied on an upper side of a semi-conductor body. An oxide-nitride-layer sequence is provided between the gate-electrode arranged in the trench and between the source area laterally bordering thereon and between the drain area bordering on the other side thereof. Said sequence layer is provided for capturing charge carriers on the source and drain. Said type of transistors are especially suitable for NVM-memory cell devices (Non-Volatile Memory).The depth of the trench is optimised in such a way that the locations for the injection of electrons and holes coincide in the memory layer (11) disposed between the walls of the trench and the gate electrode (4) in defining layers (10,12). The junctions (14) where the doping of the source area (2) and the drain area (3) switches to an opposite polarity sign of conductivity type of the semiconductor body (1), and which define the channel area (5), abut against a curved area of the bottom (7) of the trench or a lower curved area of the side walls (6,8) of the trench.
PCT/DE2002/004523 2001-12-18 2002-12-10 Non volatile memory cell with a trench transistor WO2003052812A2 (en)

Priority Applications (4)

Application Number Priority Date Filing Date Title
KR1020047009444A KR100554647B1 (en) 2001-12-18 2002-12-10 Memory cell with a trench transistor
CNB028254058A CN100382254C (en) 2001-12-18 2002-12-10 Memory cell with a trench transistor
JP2003553610A JP4081445B2 (en) 2001-12-18 2002-12-10 Nonvolatile memory cell having trench transistor
EP02791622A EP1456876A2 (en) 2001-12-18 2002-12-10 Memory cell with a trench transistor

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
US10/022,654 US6661053B2 (en) 2001-12-18 2001-12-18 Memory cell with trench transistor
DE10162261A DE10162261B4 (en) 2001-12-18 2001-12-18 Memory cell with trench transistor
DE10162261.9 2001-12-18
US10/022,654 2001-12-18

Publications (2)

Publication Number Publication Date
WO2003052812A2 WO2003052812A2 (en) 2003-06-26
WO2003052812A3 true WO2003052812A3 (en) 2003-11-06

Family

ID=26010800

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/DE2002/004523 WO2003052812A2 (en) 2001-12-18 2002-12-10 Non volatile memory cell with a trench transistor

Country Status (6)

Country Link
EP (1) EP1456876A2 (en)
JP (1) JP4081445B2 (en)
KR (1) KR100554647B1 (en)
CN (1) CN100382254C (en)
TW (1) TW575960B (en)
WO (1) WO2003052812A2 (en)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6965143B2 (en) * 2003-10-10 2005-11-15 Advanced Micro Devices, Inc. Recess channel flash architecture for reduced short channel effect
US7317222B2 (en) * 2006-01-27 2008-01-08 Freescale Semiconductor, Inc. Memory cell using a dielectric having non-uniform thickness
CN101908488B (en) * 2009-06-08 2012-11-21 尼克森微电子股份有限公司 Ditching type metal-oxide semiconductor assembly manufacturing method
KR102002942B1 (en) * 2013-04-18 2019-07-24 에스케이하이닉스 주식회사 Nonvolatile memory device and method of fabricating the same

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1998013878A1 (en) * 1996-09-23 1998-04-02 Siemens Aktiengesellschaft Self-aligned non-volatile storage cell
US5854501A (en) * 1995-11-20 1998-12-29 Micron Technology, Inc. Floating gate semiconductor device having a portion formed with a recess

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2662076B2 (en) * 1990-05-02 1997-10-08 松下電子工業株式会社 Nonvolatile semiconductor memory device and method of manufacturing the same

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5854501A (en) * 1995-11-20 1998-12-29 Micron Technology, Inc. Floating gate semiconductor device having a portion formed with a recess
WO1998013878A1 (en) * 1996-09-23 1998-04-02 Siemens Aktiengesellschaft Self-aligned non-volatile storage cell

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
PATENT ABSTRACTS OF JAPAN vol. 0161, no. 62 (E - 1192) 20 April 1992 (1992-04-20) *

Also Published As

Publication number Publication date
TW575960B (en) 2004-02-11
KR20040065288A (en) 2004-07-21
JP4081445B2 (en) 2008-04-23
CN100382254C (en) 2008-04-16
WO2003052812A2 (en) 2003-06-26
TW200302571A (en) 2003-08-01
EP1456876A2 (en) 2004-09-15
KR100554647B1 (en) 2006-02-24
JP2005513778A (en) 2005-05-12
CN1605120A (en) 2005-04-06

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