WO2003058683A3 - Method for fabricating a high voltage power mosfet having a voltage sustaining region that includes doped columns formed by rapid diffusion - Google Patents

Method for fabricating a high voltage power mosfet having a voltage sustaining region that includes doped columns formed by rapid diffusion Download PDF

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Publication number
WO2003058683A3
WO2003058683A3 PCT/US2002/041808 US0241808W WO03058683A3 WO 2003058683 A3 WO2003058683 A3 WO 2003058683A3 US 0241808 W US0241808 W US 0241808W WO 03058683 A3 WO03058683 A3 WO 03058683A3
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WO
WIPO (PCT)
Prior art keywords
fabricating
region
power mosfet
rapid diffusion
sustaining region
Prior art date
Application number
PCT/US2002/041808
Other languages
French (fr)
Other versions
WO2003058683A2 (en
Inventor
Richard A Blanchard
Original Assignee
Gen Semiconductor Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Gen Semiconductor Inc filed Critical Gen Semiconductor Inc
Priority to EP02792552A priority Critical patent/EP1468439B1/en
Priority to JP2003558902A priority patent/JP4833517B2/en
Priority to DE60234715T priority patent/DE60234715D1/en
Priority to AU2002358312A priority patent/AU2002358312A1/en
Priority to KR1020047010419A priority patent/KR100912995B1/en
Publication of WO2003058683A2 publication Critical patent/WO2003058683A2/en
Publication of WO2003058683A3 publication Critical patent/WO2003058683A3/en

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/0603—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
    • H01L29/0607—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration
    • H01L29/0611—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices
    • H01L29/0615—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE]
    • H01L29/063—Reduced surface field [RESURF] pn-junction structures
    • H01L29/0634—Multiple reduced surface field (multi-RESURF) structures, e.g. double RESURF, charge compensation, cool, superjunction (SJ), 3D-RESURF, composite buffer (CB) structures
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/7801—DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
    • H01L29/7802—Vertical DMOS transistors, i.e. VDMOS transistors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/10—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
    • H01L29/1004—Base region of bipolar transistors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
    • H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409—Unipolar field-effect transistors
    • H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/66674—DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
    • H01L29/66712—Vertical DMOS transistors, i.e. VDMOS transistors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/0603—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
    • H01L29/0642—Isolation within the component, i.e. internal isolation
    • H01L29/0649—Dielectric regions, e.g. SiO2 regions, air gaps
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/10—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
    • H01L29/1095—Body region, i.e. base region, of DMOS transistors or IGBTs

Abstract

A method of fabricating a high voltage power MOSFET having a voltage-sustaining region that includes doped columns (410) formed by rapid diffusion. A semiconductor device having a substrate (402), an epitaxial layer (401) and a voltage-sustaining region formed in the epitaxial layer (401), the voltage-sustaining region including columns (410) formed along at least outer sidewalls of a filled trench, the column (410) including first, second and third diffused regions, the first diffused region having a deeper junction depth than the second diffused region and the third diffused region extends from the surface of the epitaxial layer (401) to intersect one of the first and second diffused regions.
PCT/US2002/041808 2001-12-31 2002-12-30 Method for fabricating a high voltage power mosfet having a voltage sustaining region that includes doped columns formed by rapid diffusion WO2003058683A2 (en)

Priority Applications (5)

Application Number Priority Date Filing Date Title
EP02792552A EP1468439B1 (en) 2001-12-31 2002-12-30 Method of forming a high voltage semiconductor device having a voltage sustaining region
JP2003558902A JP4833517B2 (en) 2001-12-31 2002-12-30 Method of manufacturing a high voltage power MOSFET having a voltage sustaining region including a doped column formed by rapid diffusion
DE60234715T DE60234715D1 (en) 2001-12-31 2002-12-30 LADDER ASSEMBLY WITH A VOLTAGE MAINTENANCE RANGE
AU2002358312A AU2002358312A1 (en) 2001-12-31 2002-12-30 Method for fabricating a high voltage power mosfet having a voltage sustaining region that includes doped columns formed by rapid diffusion
KR1020047010419A KR100912995B1 (en) 2001-12-31 2002-12-30 Method for fabricating a high voltage power mosfet having a voltage sustaining region that includes doped columns formed by rapid diffusion

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US10/039,068 2001-12-31
US10/039,068 US6566201B1 (en) 2001-12-31 2001-12-31 Method for fabricating a high voltage power MOSFET having a voltage sustaining region that includes doped columns formed by rapid diffusion

Publications (2)

Publication Number Publication Date
WO2003058683A2 WO2003058683A2 (en) 2003-07-17
WO2003058683A3 true WO2003058683A3 (en) 2003-11-13

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PCT/US2002/041808 WO2003058683A2 (en) 2001-12-31 2002-12-30 Method for fabricating a high voltage power mosfet having a voltage sustaining region that includes doped columns formed by rapid diffusion

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US (2) US6566201B1 (en)
EP (1) EP1468439B1 (en)
JP (1) JP4833517B2 (en)
KR (1) KR100912995B1 (en)
CN (1) CN100342505C (en)
AU (1) AU2002358312A1 (en)
DE (1) DE60234715D1 (en)
TW (1) TWI272679B (en)
WO (1) WO2003058683A2 (en)

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Also Published As

Publication number Publication date
JP4833517B2 (en) 2011-12-07
US6710400B2 (en) 2004-03-23
KR100912995B1 (en) 2009-08-20
US20040009643A1 (en) 2004-01-15
CN1610964A (en) 2005-04-27
TWI272679B (en) 2007-02-01
CN100342505C (en) 2007-10-10
WO2003058683A2 (en) 2003-07-17
US6566201B1 (en) 2003-05-20
EP1468439A4 (en) 2009-01-07
TW200301526A (en) 2003-07-01
JP2005514786A (en) 2005-05-19
AU2002358312A8 (en) 2003-07-24
DE60234715D1 (en) 2010-01-21
EP1468439B1 (en) 2009-12-09
AU2002358312A1 (en) 2003-07-24
KR20040069214A (en) 2004-08-04
EP1468439A2 (en) 2004-10-20

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