WO2004028438A2

WO2004028438A2 - Analog packaging device and content use monitoring system

Info

Publication number: WO2004028438A2
Application number: PCT/CA2003/001419
Authority: WO
Inventors: Michael Petersen; Allan Wilson
Original assignee: Intelligent Devices Inc.
Priority date: 2002-09-24
Filing date: 2003-09-17
Publication date: 2004-04-08
Also published as: CA2404805A1; AU2003266890A8; AU2003266890A1; WO2004028438A3

Abstract

A packaging device is provided for monitoring use of packaged contents using analog methodology. The packaging device comprises a package (12), an electrically conducting path (18) and a central processing unit (CPU) (14) with associated analog-to-digital converter embedded in the package. The package has one or more sealable receptacles (20) for accommodating contents. The electrically conducting path is associated with each receptacle in such a way that the receptacles and their associated paths comprise either resistances in parallel or resistances in series within the circuit. Opening the sealed receptacle and expelling its content causes changes in the electrical characteristics of the circuit. The central processing unit (CPU) and its analog-to-digital converter monitor the electrical characteristics of the conducting path for changes, and generate content use data when changes in the electrical characteristics of the circuit are detected.

Description

ANALOG PACKAGING DEVICE AND CONTENT USE MONITORING SYSTEM

This invention relates to an improvement on an analog method for monitoring the use of blister packaged contents, especially but not limited to patient compliance in taking blister- packaged medication.

BACKGROUND TO THE INVENTION

Blister (form-fill-seal) packaging is an increasingly common means of packaging individual units of many types. Blister packaging is particularly relevant to the packaging of unit doses of medications.

Medications comprise a large component of health care. A limiting factor to the effectiveness of many medications is patient compliance with the prescription. It is well known that increasing patient compliance will improve treatment outcomes and reduce undesirable side effects. Devices to increase patient compliance with prescribed medication date to 1968 as found, for example, in United States Patent No. 3,410,450 issued to Fortenberry on November 12, 1968. Such devices may keep a record of the time at which the patient removed the medication from its container.

To increase patient compliance with prescribed medication the pharmaceutical packaging industry is increasingly using blister-packaged medication. Electronic devices designed to record the time at which a patient takes medication out of a blister date to United States Patent No. 4,616,316 issued to Hanpeter et. al. on October 7, 1986. The disadvantage of early devices is the necessity to plug the blister pack into bulky external devices, defeating the convenience of the blister package. More recent inventions integrate a central processing unit (CPU) into a blister package for monitoring the use of the package contents. For example, Canadian Patent Application No. 2,353,350 (Wilson and Petersen) of July 20, 2001 "Packaging Device and Content Monitoring System" describes an invention designed to monitor the use of blister-packaged medication. . That invention relies on a system of electrically conducting traces communicating with a central processing unit (CPU) in the form of an electronic chip (EC). Expelling the contents from its blister breaks the trace, and the time and other characteristics of the event are recorded in the CPU's memory. Such data can later be retrieved and utilized. One significant limitation of the above-mentioned invention is that an electrically conducting trace is required for each blister to be monitored. This results in some complexity of design and production. In addition, each trace has to be attached to the CPU, further increasing the complexity of production, requiring the use of multiple pin CPUs, and thus limiting the number of blisters that can be monitored in a given system.

Canadian Patent Application No. 2,366,687 of December 31, 2001 (Wilson and Petersen) "Replicate Incorporating and Electronic Content Monitoring System for Use in Form-Fill-Seal Applications" describes the application of a similar device to the lidstock prior to it being incorporated into a blister package via a form-fill-seal machine. One variation of that device uses analog circuitry to reduce the number of input pins required for the CPU, reducing the cost of the CPU and the complexity of attaching the traces to the CPU inputs, as well as simplifying the system of electrically conducting traces.

To improve on the invention of Application No. 2,366,687 there is provided an analog packaging device for monitoring use of packaged contents. The packaging device comprises a blister package, a central processing unit (CPU), and electrically conducting paths integrated in the package. The package has one or more sealable receptacles, compartments or blisters for accommodating contents. Two analog methodologies are described. In both, a number of receptacles can be accommodated on one electrically conducting path to the CPU, with each receptacle having its own associated electrically conducting path. Expelling the contents of the receptacle results in the conducting path associated with that particular receptacle being broken, changing the electrical characteristics of the circuit in accordance with Ohm's Law. The CPU monitors one or more of the electrical characteristics (voltage, resistance, current) of the conducting path, and generates content use data when changes of a predetermined magnitude are detected. In one described embodiment the receptacles and their associated electrically conducting paths are arranged as resistances in parallel. In the second described embodiment they act as resistances in series.

The content use monitoring system comprises a CPU with an anaiog-to-digital converter (ADC), programmable or reprogrammable procedure memory, volatile or nonvolatile data memory, power source, and a system of traces or electrically conductive paths as described hereinbelow such that each receptacle corresponds to one electrically conducting path in the circuit. Expelling the contents of the receptacle interrupts the corresponding path, causing a change in the electrical characteristics of the circuit (voltage, resistance, current). The CPU monitors one or any combination of these characteristics for a change of predetermined magnitude, and if such a change occurs it is considered to represent a content use event and the time is recorded in the CPU's data memory. The time of expulsion (and other data of interest) can later be retrieved from the memory by an interested party. The system may incorporate its own antenna, infrared port, or other means to permit active downloading of data when required, as described in Applications Nos. 2,353,350 and 2,366,687. The present invention may also be enhanced by the provision of one or more reference resistors in the conducting path or paths to accommodate variations in the paths that are printed on the substrate of the blister pack. Such reference resistors would provide a baseline resistance value for the circuit in question, which baseline would be based on the circuit as printed. The CPU would initially check to see whether the resistance across the reference resistor(s) has changed from the baseline value and if there is any change it would be taken into consideration by the CPU as it decides whether a recordable event has taken place.

Another enhancement would be the provision off a voltage divider circuit, printed on the substrate, which circuit would permit the CPU to enter a power-conserving "sleep" mode during periods of inactivity. Only when a recordable event takes place would the CPU "wake up" to take cognizance of the event.

Other aspects and features of the present invention will be readily apparent to those skilled in the art from a review of the following detailed description of preferred embodiments in conjunction with the accompanying drawings.

BRIEF DESCRIPTION OF THE DRAWINGS

The invention will be further understood from the following description with reference to the drawings in which: FIG. 1 schematically illustrates a blister package with an electrically conducting analog path (circuit) laid out in such a way that the blisters and their associated electrically conducting paths act as resistances in parallel in the circuit, and a central processing unit (CPU) with analog-to-digital converter (ADC), in accordance with a first embodiment of the present invention; FIG. 2 schematically illustrates a blister package with an electrically conducting analog path (circuit) laid out in such a way that the blisters and their associated electrically conducting paths act as resistances in series in the circuit, and a central processing unit (CPU) with analog-to-digital converter (ADC), in accordance with a second embodiment of the present invention; FIGS. 3 and 3A schematically illustrate a unit dose blister packaged medication with analog monitoring system using longitudinally arranged blisters (roll format) and their associated electrically conducting paths as resistances in parallel;

FIG. 4 illustrates the provision of a voltage divider option for the present invention.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

FIG. 1 schematically illustrates a package device 10 in accordance with a first embodiment of the present invention. The package device 10 comprises a package 12 and a content use monitoring system 14. The monitoring system 14 comprises an embedded central processing unit (CPU) 16 in the form of an electronic chip with an analog-to-digital converter (ADC) and an electrically conducting path or circuit 18 provided on the package.

The package defines one or more receptacles, compartments or blisters 20 to accommodate contents. <Each receptacle 20 is sealed to the package backing or lidstock after the contents are inserted. The backing can be a sheet of a rupturable foil or film and the sheet-backed receptacles can be adhered to the lidstock in a separate operation. Once sealed, the user breaks the receptacle 20 by pushing the contents out through the lidstock or backing. This type of package is generally referred to as a form-fill-seal or blister package. The receptacles 20 may be arranged in any configuration on the package depending on the desired use. The electrically conducting circuit 18 is connected to the two input pins 22 of the CPU 16. The conducting elements of the conducting path 18 may be of wire, metal foil, conducting printed (ink) path, or other suitable electrically conducting material. Across each receptacle 20 is arranged a further electrically conducting path or element 24 such that the receptacles and their corresponding paths comprise a plurality of resistances in parallel between the inputs 22 of the CPU 16. Expelling the contents of the receptacle breaks the associated parallel trace, path or element, thereby changing the electrical characteristics of the circuit in accordance with Ohm's Law.

The conducting path may be applied or printed to either surface of the lidstock or to either surface of the backing sheet if such is provided.

The CPU 16 and its associated ADC monitor the electrical characteristics of the circuit either continuously or at intervals of interest. Voltage, resistance, current, or any combination of these characteristics can be monitored. In the program memory of the CPU are stored predetermined changes or thresholds that are to be considered as representing content expulsion events. When the CPU detects such changes, the time and other characteristics of interest are stored in the data memory. The data memory can be either volatile or nonvolatile with the latter being preferred.

In FIG. 1, the two traces 18' leading to the input pins of the CPU are shown as low resistance, and the traces 24 forming the parallel resistance connections across the blisters are shown as being of higher resistance. In its application, this embodiment can equally be used with ail electrically conducting paths having the same resistance. Increasing the resistance across the blisters can be used to increase the magnitude of changes in the electrical characteristics of the circuit caused by breaking a blister, thus facilitating accurate detection of content expulsion events. FIG. 1 shows a single electrically conducting circuit connected to two input pins of the

CPU. Multiple such circuits can be used according to the same principles, permitting the monitoring of larger numbers of blisters. Multiple circuits can also be used to obtain data specific to a given blister or subset of blisters.

FIG. 2 depicts an analog methodology using resistances in series. In some applications it may prove superior to the embodiment using parallel resistances shown in FIG. 1 as it is a means of improving on the design in FIG. 1 to increase the sensitivity and accuracy of detecting changes in the electrical characteristics of the circuit caused by content expulsions. Depending on whether the electrically conducting paths are printed on the blister package backing, its associated cardboard over-packaging or lidstock, or on the plastic of the blister, there may be process variations due to different manners of expelling contents or small differences in locations of the paths in reference to their associated blisters. For example, if the path is printed across a perforated area in the cardboard backing, the resistance change occasioned by expelling the content will depend on the extent to which the perforation may have cut into the conducting path. Further, it may be desirable to monitor a large number of blister contents using a single analog circuit (requiring only two connections to the CPU). This may be dictated by a desire to save on the cost of manufacturing such a device as the costs of the CPU and of assembling the device increase with the number of attachments required. The number of blister contents that can be monitored by a single analog circuit is a function of: the range of electrical changes that can be detected by the CPU, which in turn depends on the voltage that can be applied; and the signal-to-noise ratio required to detect reliably a change in the electrical characteristics of the circuit representative of an expulsion event. Any variability in the resistances across the blisters will introduce noise into the system, requiring a larger signal to be used as the criterion for an expulsion event. This reduces the number of steps or events that can be detected reliably for a given voltage, and the number of steps determines the number of blisters that can be monitored by the circuit. FIG. 2 shows a means of increasing the accuracy of detecting content expulsion events. The resistances associated with the blisters 20 are arranged in series in the circuit. For each blister there is an associated low resistance conducting path 26 and an associated high resistance path 28. The high resistance path can be located anywhere on the package, as long as it remains connected to the grid after the expulsion event has occurred. Expelling a blister's contents breaks the associated low resistance path 26, redirecting the current through the associated high resistance path 28 and thus altering the electrical characteristics of the circuit. This embodiment allows for more accurate printing or other application of resistors as they can be located at the best place for this according to the production process used. In addition, there will be less process variability due to varied means of expelling blister contents, or having the path resistances altered by such production variability as location of perforations or bleed through of inks and other conductive materials into other package substrates.

The use of resistances in series is preferable to using resistances in parallel because of the linear nature of series resistance as compared to the exponential nature of resistances in parallel. This may permit the use of lower signal to noise ratios, increasing the range of changes (steps) that can be detected in a circuit of a given voltage. This in turn may allow monitoring the content of larger numbers of blisters by a single analog circuit.

The embodiment shown in FIG. 2 has a further advantage. A different resistance can be associated with each blister, or a subset of blisters, allowing collection of data specific to an individual blister or subset of blisters.

The analog aspects of this invention using resistances in parallel and resistances in series can both be adapted to monitoring specific areas of a package by adding additional electrical circuits terminating on other input pins of the CPU.

The CPU can be disposable or reusable and requires an associated ADC, either internal or external, to permit monitoring of the electrical characteristics of the circuits), the CPU can be secured directly to the lidstock close to, or separated from, the blister zone of the package. It could even be mounted within its own blister.

FIGS. 3 and 3A depict a roll or strip 30 of unit dose medication provided in blisters or receptacles 40, such as is often used by hospital pharmacies to package patient medications, but which can be used to package other unit contents. In use, the user tears the end package 32 off the roll along the perforations 34. In FIGS. 3 and 3A a circuit 36 of electrically conducting paths is arranged so that the package and its associated conducting paths form resistances in parallel within the electrical circuit monitored by the CPU 38. Tearing one or more packages from the roll causes changes in the electrical characteristics of the circuit 36, which is monitored by the ADC and CPU for such changes. When changes in the electrical characteristics of the circuit meet criteria stored in the procedure memory of the CPU, the time and other characteristics of the event are stored in the CPU's data memory, to be retrieved later by an interested party, as described above.

The analog methodology in which blisters and their associated electrically conducting traces are arranged as resistances in series within the circuit being monitored can also be used with rolls or strips of unit dose packaged contents.

Other formats for unit dose packaging of medications or other contents can equally be monitored by the analog arrangement of resistances in parallel and resistance in series, such as sheets of packages or fan-fold packages.

The foregoing has described the features of the basic invention and the benefits to be realized therewith. It should be also realized that the basic invention itself is subject to improvements and enhancements which improve or enhance the functionality thereof. Some such enhancements will now be described.

One such enhancement involves the printing of one or more reference resistors on the package substrate. In the proposed analog device, the CPU is required to detect changes in the electrical characteristics of a circuit comprising in whole or part paths printed with electrically conductive ink. As described, the number of steps or events that a CPU, via its ADC, can differentiate is a function of the variability inherent in the circuitry. For an ideal circuit with no variability the number of steps is limited only by the ability of the CPU and ADC to discriminate changes in the electrical characteristics of the circuit. Circuits involving paths of conductive ink are subject to many sources of variation. The printing process can be imprecise, possibly giving rise to variations in thickness and width of the printed paths. This affects resistance in a variable way, effectively reducing the number of steps (events) that the CPU can detect (i.e. changes in resistance that it can reliably differentiate). The electrical characteristics of printed conductive ink circuitry may change over the course of a print run due to changes in the ink over time. For example, suspended conductive particles may settle, or the viscosity of the ink may change, affecting the electrical characteristics of the resulting printed circuitry.

Further, flexible substrates such as paper and paperboard are subject to dimensional changes resulting from changes in their water content as a result of environmental humidity. Such changes affect the physical dimensions and electrical characteristics of any adherent conductive ink paths.

The fibrous nature of paper products and the use of coating agents to offset this can result in variable contact between the printed conductive ink path and the surface of the paper, introducing electrical variability into the circuit.

Reference resistors can be used to control for such variability. These resistors are printed as part of the printing process, using the same conductive ink as the circuitry. They are of fixed size, with dimensions that can be adjusted according to the concerns of interest, and they can be located anywhere on the substrate, including at multiple locations, to control for positional effects on the printed substrate. The resistors are subject to the same effects described above for the printed circuitry.

Before the analog system begins its operating life, the CPU via its ADC measures the resistance across the printed reference resistor(s) through a separate circuit, establishing an initial reference resistance baseline for each printed sample. At a later time, when the CPU is in its operating mode and is monitoring the printed circuit for changes in resistance, it first checks to see if the resistance across the reference resistor(s) has changed from the baseline value. The resistance measured across the printed electrical circuit is then adjusted by the CPU to account for changes in the reference resistor circuit.

Reference resistors printed on each sheet of substrate reflect the variability in electrical characteristics of the printed circuitry at that point in the printing process, allowing the CPU monitoring that sheet of circuitry to be tuned initially to its precise electrical characteristics.

Similarly, changes across a single printed sheet can be monitored by reference resistors printed, for example, in the four corners of the sheet. Such multiple resistors could have their resistances averaged for the given sheet or they could be monitored individually.

In the first case, the average resistance over the multiple resistors could be used to adjust changes in resistance detected across the printed conductive ink circuitry.

This adjustment process could be made more precise by monitoring the four reference resistors described above individually, and using changes in resistance from their baselines to adjust the resistances across the four respective quadrants of the sheet of printed circuitry.

In a further enhancement of the present invention a voltage divider is used to allow the

CPU to operate in a power-conserving "sleep" mode and to wake to its full operating mode only when a change in resistance occurs. As shown in FIG. 4, a voltage divider circuit is formed by a reference resistor R_ref and the resistance offered by the printed conductive ink path R-r between logic 1 and logic 0 potentials. The middle of the voltage divider circuit is connected to an input of the CPU and can interrupt the CPU's sleep mode when a specified change in potential occurs. This allows the CPU to operate in two modes. During sleep mode the CPU draws minimal current, preserving battery power. The voltage divider allows the CPU to be awakened to full operating mode by a change in resistance in the circuit such as might be occasioned by a user expelling a medication dose from its blister.

Additional functionality can be added to the system by adding light-emitting diodes (LEDs), speakers, or other warning devices to alert the user about use or misuse of the package and/or its contents. Functionality can also be increased by adding sensors or other devices to monitor exposure of the package to other environmental variables such as, but not limited to, temperature, humidity, light, radiation, shock, and vibration.

Functionality can further be increased by varying the method of data transmission to and from the CPU's procedure and/or data memories by an interested party, for example by radiofrequency (RF) or infrared (IR) transmission, direct contact interface, or other methods, that do not affect the function of the analog methods previously described, according to the requirements of the user or the package system.

While particular embodiments of the present invention have been shown and described, changes and modifications may be made to such embodiments without departing from the true scope of the invention. The foregoing has described the present invention and several means of putting the invention into effect. It is understood that the invention can be effected in a multitude of different ways without departing from the spirit of the invention. Accordingly the protection to be afforded this invention is to be determined from the scope of the claims appended hereto.

Claims

WHAT IS CLAIMED IS:

1. A packaging device for analog monitoring use of packaged contents, comprising: a package having at least one sealable receptacle for accommodating contents; an electrically conducting path associated with said package and said at least one receptacle, which path will be broken when said at least one receptacle is opened, thereby changing electrical characteristics of said path; and central processing unit (CPU) means embedded in said package, having analog-to- digital converter (ADC) means, and connected to said electrically conducting path, for monitoring the electrical characteristics of said electrically conducting path for changes thereto, and generating content use data when changes in said electrical characteristics are detected.

2. The packaging device of claim 1 wherein said ADC means are internal to said CPU means.

3. The packaging device of claim 1 wherein said ADC means are external to said CPU means.

4. The packaging device of any one of claims 1 to 3 wherein said package includes a plurality of said receptacles and said electrically conducting path extends to said plurality of receptacles by way of parallel circuitry.

5. The packaging device of any one of claims 1 to 3 wherein said package includes a plurality of said receptacles and said electrically conducting path extends to said plurality of receptacles byway of series circuitry.

6. The packaging device of claim 4 or claim 5 wherein said plurality of receptacles is connected to said CPU means by a single electrically conducting path.

7. The packaging device of claim 4 or claim 5, wherein said packaging device includes a plurality of electrically conducting paths, each one of which is associated with at least one such receptacle, each of said plurality of electrically conducting paths being individually connected to said CPU means.

8. The packaging device of claim 4, wherein said parallel circuitry includes electrically conducting traces of lesser and greater resistance, the traces of greater resistance being directly associated with said receptacles and the traces of lesser resistance connecting said traces of greater resistance to said CPU means.

9. The packaging device of claim 5, wherein said series circuitry includes an electrically conducting trace of lesser resistance associated with each of said receptacles and connected to said CPU means, as well as, for each receptacle, an electrically conducting trace of greater resistance through which current will pass when the lesser resistance trace is broken on opening of the associated receptacle.

10. The packaging device of claim 9 wherein the traces of greater resistance have different resistances, and specific paths having different resistances are associated with specific receptacles or groups of receptacles to permit monitoring of individual receptacle contents and recording of data associated with specific receptacles or groups of receptacles.

11. The packaging device of any one of claims 1 to 10 including one or more reference resistors connected to said CPU for providing a baseline reference resistance for said packaging device.

12. The packaging device of claim 11 wherein each said reference resistor is provided in its own circuit associated with said package, separate from said electrically conducting path.

13. The packaging device of claim 11 wherein one of said reference resistors is provided at each corner of said package and each is connected to said CPU by a separated circuit.

14. The packaging device of claim 13 wherein the resistance of said reference resistors can be monitored individually by said CPU or the monitored resistances thereof may be averaged by said CPU.

15. The packaging device of any one of claims 1 to 14 including a voltage divider circuit connected to said CPU to permit the CPU to power down during periods of inactivity.

16. A packaged product having an analog monitoring system for monitoring use of packaged contents, the packaged product comprising: contents; a package having at least two sealed receptacles accommodating the contents; an electrically conducting path associated with said package and said at least two sealed receptacles, arranged so as to define an electrical circuit which acts as resistances in parallel, and which path will be broken when one of the receptacles is opened thereby changing the electrical characteristics of said path; and central processing unit (CPU) means including associated analog-to-digital converter (ADC) means and procedure and data memory means, embedded in said package and connected to said electrically conducting path, said CPU means monitoring the electrical characteristics of the electrically conducting path, and generating content use data when changes in the electrical characteristics of the conducting path are detected.

17. A packaged product having an analog monitoring system for monitoring use of packaged contents, the packaged product comprising: contents; a package having at least two sealed receptacles accommodating the contents; an electrically conducting path associated with said package and said at least two sealed receptacles, arranged so as to define an electrical circuit which acts as resistances in series, and which path will be broken when one of the receptacles is opened thereby changing the electrical characteristics of said path; and central processing unit (CPU) means including associated analog-to-digital converter

(ADC) means and procedure and memory means, embedded in said package and connected to said electrically conducting path, said CPU means monitoring the electrical characteristics of the electrically conducting path, and generating content use data when changes in the electrical characteristics of the conducting path are detected.

18. The packaged product of claim 16 or claim 17 featuring warning means to alert a user regarding use or misuse of the package contents.

19. The packaged product of claim 18 wherein said warning means is of the audible, visible or tactile type.

20. The packaged product of any one of claims 16 to 19 including means associated with said CPU means for monitoring and recording environmental variables including but not limited to one or more of temperature, humidity, light, radiation, shock, and vibration.

21. The packaged product of any one of claims 16 to 20 including means associated with said CPU means for transmitting data to and from the CPU's memory including but not limited to radio frequency (RF), infra-red (IR), and direct contact.

22. The packaged product of any one of claims 16 to 21 including one or more reference resistors connected to said CPU by circuitry separate from said conducting path for providing a baseline reference resistance for said monitoring system.

23. The packaged product of any one of claims 16 to 22 including a voltage divider circuit connected to said CPU to permit the CPU to power down during periods of inactivity.

24. A packaging device for analog monitoring use of packaged contents, comprising: a package having a plurality of longitudinally adjacent sealable receptacles; said package being severable between adjacent receptacles; an electrically conducting path associated with said package and said receptacles, which path will be broken when one receptacle is severed from said package, thereby changing the electrical characteristics of said path; and central processing unit (CPU) means embedded in said package, having analog-to- digital converter (ADC) means, and connected to said electrically conducting path, for monitoring the electrical characteristics of said electrically conducting path for changes thereto, and generating content use data when changes in said electrical characteristics are detected.

25. The packaging device of claim 24 wherein said package comprises a plurality of sealable receptacles arranged on a flexible backing, with said backing being perforated between receptacles for ease of severance, said electrically conducting path traversing the perforations.

26. The packaged product of claim 16 or claim 17 wherein said receptacles are sealed by a sheet of a rupturable material and said electrically conducting path is applied to said sheet.

27. The packaging device of any one of claims 1 to 15, 24 or 25 featuring warning means to alert a user regarding use or misuse of the package contents.

28. The packaging device of claim 27 wherein said warning means is of the audible, visible or tactile type.

29. The packaging device of any one of claims 1 to 15 or claims 24, 25, 27 or 28 including means associated with said CPU means for monitoring and recording environmental variables including but not limited to one or more of temperature, humidity, light, radiation, shock, and vibration.

30. The packaging device of any one of claims 1 to 15, 24, 25 or 27 to 29 including means associated with said CPU means for transmitting data to and from the CPU's memory including but not limited to radio frequency (RF), infra-red (IR), and direct contact.