WO2004053978A1 - Method for cleaning a metal surface by a dry-etching step - Google Patents

Method for cleaning a metal surface by a dry-etching step Download PDF

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Publication number
WO2004053978A1
WO2004053978A1 PCT/EP2002/014022 EP0214022W WO2004053978A1 WO 2004053978 A1 WO2004053978 A1 WO 2004053978A1 EP 0214022 W EP0214022 W EP 0214022W WO 2004053978 A1 WO2004053978 A1 WO 2004053978A1
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WIPO (PCT)
Prior art keywords
copper
oxygen
etching
hydrogen
metal
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PCT/EP2002/014022
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French (fr)
Inventor
Karsten Schneider
Susan Weiher-Telford
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Applied Materials, Inc.
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Publication date
Application filed by Applied Materials, Inc. filed Critical Applied Materials, Inc.
Priority to AU2002363866A priority Critical patent/AU2002363866A1/en
Priority to PCT/EP2002/014022 priority patent/WO2004053978A1/en
Publication of WO2004053978A1 publication Critical patent/WO2004053978A1/en

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3205Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
    • H01L21/321After treatment
    • H01L21/3213Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer
    • H01L21/32133Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only
    • H01L21/32135Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only by vapour etching only
    • H01L21/32136Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only by vapour etching only using plasmas
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105After-treatment
    • H01L21/311Etching the insulating layers by chemical or physical means
    • H01L21/31105Etching inorganic layers
    • H01L21/31111Etching inorganic layers by chemical means
    • H01L21/31116Etching inorganic layers by chemical means by dry-etching
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors

Definitions

  • the present invention relates generally to the fabrication of integrated circuits on substrates. More particularly, the invention relates to a method for cleaning a metal surface by a dry-etching step, especially for removing copper modifications comprising copper and oxygen from a copper surface.
  • VLSI very large scale integration
  • ULSI ultra large scale integration
  • high scaled multilevel interconnects demand careful and exact processing of high aspect ratio features, such as vias and conductive metal lines.
  • a commonly used method for forming multilevel interconnects is the so-called damascene technique (US 6,174,810 BI; US 6,352,917 BI; 6,429,128 BI; US 6,444,568 BI).
  • damascene technique US 6,174,810 BI; US 6,352,917 BI; 6,429,128 BI; US 6,444,568 BI.
  • an insulating layer covering interconnect lines of a metallization level is etched to define both openings for the contacts/vias and trenches for the interconnect lines in the insulating layer.
  • the contacts or vias electrically connect interconnect lines of the metallization levels with the interconnect lines of the next metallization level.
  • Metal plating and back planarization is an indirect structuring method in comparison to the direct structuring method of the insulating layer by means of etching.
  • Indirect structuring of metal has some advantages over direct structuring. The main reason is that there are a variety of established etching processes for insulating materials such as silicon oxide and silicon nitride in contrast to metals which need special chemistry. Another reason concerns the accuracy of the etching (steepness of the etching flanks, formation of etch residues) which is far better for insulating materials. Therefore, for the formation of very small sized features, an indirect structuring of metals is preferred.
  • oxides from the surface of the interconnect lines may be formed during the etching of openings into insulating layers or due to the exposure of uncovered interconnect lines to an oxygen containing atmosphere.
  • care is taken to avoid any exposure of metal surfaces to oxygen, even in a chamber well purged with inert gases, traces of oxygen or oxygen containing gases may be found.
  • the insulating layer may comprise an etch stop layer covering interconnect lines to protect them during etching of the insulating layer.
  • the etch stop layer remains on the interconnect lines, a reliable protection against the etching gas is ensured.
  • the etch stop layer must finally be opened. Even if the etch process to open the etch stop layer is cut short, a slight over-etching (a prolonged etching time) of the etch stop layer is required to remove any material of the etch stop layer. At this moment, the etching gas may affect the metal surface of interconnect lines. In addition to that, it has been found that etch residues of the etch stop open process remain on the metal surface of the interconnect lines which should be removed by an subsequent clean step.
  • copper is the material of choice for the formation of metal interconnects, due to its lower electrical resistance and higher current carrying capacity in comparison to aluminum.
  • copper tends to corrode if it comes into contact with an oxygen-containing atmosphere.
  • copper modifications have been observed at the via bottom after etching of the etch stop layer. These copper modifications appear to be a structural change of the copper surface of the underlying copper interconnect. This structural change may result in a topography at the via bottom which causes a non-conform barrier/seed layer deposition required for the deposition/filling of vias with copper.
  • ammonia might be used as a cleaning agent in plasma assistant dry-cleaning (U.S. patent application 2001/0049181) since a pure ammonia atmosphere is compatible with a copper metallization (U.S. patent application 2002/0111041 Al).
  • copper oxide might be removed by physical treatment such as Ar ion sputtering. Although the latter treatment provides a sufficient cleaning of planar copper surface, difficulties arise when cleaning the bottom of high aspect openings required for vias of advanced multilevel metal interconnects.
  • the present invention provides a method for cleaning a metal surface by a dry- etching step, the method comprising the steps of: providing a substrate comprising a metal having a metal surface; supplying an etching gas comprising hydrogen- and oxygen-containing species; ionizing the hydrogen- and oxygen-containing species by a plasma to produce hydrogen and oxygen radicals in a predetermined ratio; and cleaning the metal surface by dry-etching using the hydrogen and oxygen radicals.
  • a predetermined ratio between hydrogen and oxygen radicals was found to be essential for an effective cleaning of metal surfaces. Without restricting the invention, the mechanism of cleaning the metal surface is assumed to be a balanced process of oxide and polymer removal. Typically, metal surfaces might be covered by oxides and other etch contaminants such as polymeric residues.
  • Oxides are removed by hydrogen radicals.
  • the hydrogen radicals may cause the formation of polymeric residues which themselves are quite resistant to the hydrogen radical attack and therefore impede or reduce the cleaning efficiency of the hydrogen radicals.
  • oxygen radicals are added to a predetermined amount to etch the polymeric residues.
  • oxygen might oxidize the metal surface but this is leveled out by the hydrogen radicals. Therefore, due to a balanced removal of both oxides and polymers or other etching residues achieved by a predetermined ratio between hydrogen and oxygen radicals, metal surfaces are cleaned without any remaining residues. The such cleaned metal surfaces appear smooth. No ripples or other topographical changes are visible any more.
  • Figures la to lh show different steps of an damascene process including the invented method.
  • Figure 2 shows an example of copper modifications at via bottom.
  • Figure 3 shows cross-section SEM of vias with and without copper modifications.
  • Figure 4 shows copper modifications after an extended nitride open etch step.
  • Figure 5 shows cleaned copper surfaces.
  • Figure 6 shows cross-section SEM of via after removal of copper modification.
  • Figure 7 shows a comparison between optical spectra of standard O 2 - flash and dry-etching of the present invention.
  • Integrated circuits use dielectric layers, which have typically been formed from silicon dioxide, SiO 2 or undoped silicon glass, to insulate interconnect lines such as metal interconnects on various layers of a semiconductor structure. Such layers are often called “metallization levels" to indicate the stacked arrangement of the interconnect lines. Each metallization level comprises multiple metal interconnects which substantially run horizontally with respect to the main surface of the semiconductor substrate. As integrated circuits become faster and more compact, operating frequencies increase and the distance between the metal interconnects within the integrated circuits decreases. Correlated with this is a permanent decrease in feature size. To decrease the capacitive coupling between metal interconnects, insulating materials having a low dielectric constant are used. Until now, silicon dioxide has been the material of choice due to its versatility.
  • the dielectric constant of silicon dioxide is about 4 which is too high for a significant reduction of capacitive coupling. Therefore, many so-called "low k materials” have been developed such as spin-on polymers, carbon-containing silicon oxides such as Black DiamondTM or CoralTM, or FSG such as fluorinated silicon glass (for instance F-TEOS, fluor-containing silicon oxide).
  • Metal interconnects of adjacent metallization levels must be electrically connected with each other.
  • openings extending through the insulating layers are formed and subsequently filled with conductive material. Such electrical connections are called vias.
  • the openings are formed by etching, using a mask. The etching is typically selective to the material underlying the insulating layer, in order to securely stop the etching on the surface of the underlying material.
  • the underlying materials are often aluminum or copper. Copper is chosen due to its lower electrical resistance and higher current carrying capacity in comparison to aluminum.
  • the etching of insulating material should not affect the underlying metal, surface modifications of the metal have been observed. It is assumed that the plasma and the reactive species of the etching gas attack the metal surface to a given degree. Etch residue might be formed as well. Further, standard oxygen cleaning steps might cause the formation of metal modifications.
  • FIG. 2 shows top-view SEM- images (Scanning Electron Microscopy).
  • the insulating layer covering the metal appears black in these images.
  • Each example represents differently pronounced metal modifications.
  • a copper interconnect was investigated covered by an insulating layer into which via openings were etched. At via bottoms, a structural change of the copper surface appears. This structural change results in a topography at via bottom which may cause a non-conformal barrier/seed layer deposition.
  • a barrier layer comprising for instance transition metals such as tungsten, tantalum and titanium, nitrides of transition metals such as TaN or TiSiN might be used.
  • a thin copper seed layer is deposited onto the barrier layer to promote copper plating.
  • the conformity of such layers becomes even more important.
  • a different thickness of high-reflective "rings" at the via sidewalls can be seen. It is assumed that these rings consist of remaining polymers which have not been removed during the in-situ dry-clean step (standard oxygen flash) immediately following the etching of the insulating layer.
  • Figure 3 is a cross-section SEM with tilted images, where the insulating layer has been partially removed. Note that also vias with a smooth surface have a different reflection than the copper which had not been exposed to the etch plasma and the etching gas used to etch the insulating layer. This indicates a surface modification even if no residues or oxides were formed.
  • AES analysis of oxygen distribution shows significant oxygen content in copper modifications.
  • the ratio of oxygen to copper varies but indicates that there is significantly more copper than oxygen.
  • Stoichiometric copper oxide was not found, which suggests that oxygen might be implanted into the copper surface during the etching of the insulating layer or the following standard cleaning step.
  • etch stop layers covering the metal surface are employed for many reasons.
  • One reason is that a long over- etch time for thick insulating layers is required.
  • the etch stop layer protects the underlying metal surface against any attack by the etching gas or plasma.
  • the over-etch time which is required for the etch stop layer too is much shorter than the over- etch required for the thick insulating layer. Hence, time of exposure to etching gas or plasma is significantly reduced.
  • silicon dioxide as insulating material
  • silicon nitride or carbon-containing silicon nitrides such as BLoKTM are often used as the material for the etch stop layer.
  • the present invention allows a simple and complete removal of metal modifications comprising metal and oxygen by an dry-etching process using hydrogen and oxygen radicals.
  • Hydrogen radicals reduce stoichiometric and non-stoichiometric oxides, whereas oxygen radicals etch polymers which might already be present or formed during the removal step. Any metal oxide which might be formed due to the presence of oxygen radicals is immediately removed by the hydrogen radicals. It is assumed that each type of radical levels out the negative side effect of the other one.
  • a predetermined ratio of oxygen to hydrogen radicals is required. The ratio might be between 0.8 to 1.5 and in particular the ratio is about 1.
  • Ammonia and pure oxygen is for instance used as hydrogen- and oxygen- containing etching gas fed into a reaction chamber equipped with an induction coil to set up a plasma.
  • the chamber is evacuated to 2 to 50 mTorr.
  • a set of experiments were performed to obtain suitable values for the removal of copper modifications.
  • a substrate comprising a copper layer partially covered by an silicon oxide layer was introduced into a standard dielectric etch chamber, such as the IPS Dielectric Etch Chamber of Applied Materials, and chucked by a substrate carrier.
  • Source and bias power and the pressure within the chamber were adjusted to the desired values.
  • the temperature of the substrate to be cleaned was maintained by back side cooling using helium as cooling medium having a pressure of about 7 Torr.
  • the cathode temperature was about 10 °C.
  • Ammonia and oxygen were supplied into the chamber with a predetermined flow rate. After igniting the plasma, ammonia and oxygen were decomposed and oxygen- and hydrogen radicals formed.
  • Typical emission lines for hydrogen and oxygen were used to calculate the oxygen-hydrogen ratio.
  • the spectra was recorded by multi-channel spectroscopy using a CCD-array sensor.
  • For oxygen the determined intensity values at 314.5, 436.8, 615.7, 645.4, and 777.5 nm were summed up.
  • For hydrogen the intensity values at 434.0, 486.1, and 656.3 nm were summed up as well. The quotient of these two sums represents the ratio of oxygen to hydrogen radicals.
  • the ratio between oxygen and hydrogen radicals is calculated by
  • a oxygen and A hydrogen are the spectrographically determined values at the chosen wavelength.
  • the intensity values obtained for each emission line and the calculated sums given above in the table are typical for this particular experiment. If other equipment is used to determine the intensity at the given wavelength the obtained values might differ from those indicated in the table. However, if other equipment is used to determine the intensity values for hydrogen and oxygen, other intensity values might be obtained but the calculated ratios can be directly compared with the ratios given above.
  • the dry-cleaning process with the best copper modification removal performance is flowing 125 seem O 2 , 25 seem NH 3 with throttle valve fully open (pressure ⁇ 5 mTorr), 1600 W source power and 175 W bias power, cathode (substrate carrier) temperature + 10 °C and 7 Torr He backside cooling.
  • the temperature of the substrate to be cleaned was about 40 to 80°C due to heating by the impacting radicals.
  • This gas flow ratio, pressure and source power setting create the highest level of O and H radicals among all the various dry-clean regimes investigated. Higher NH 3 -flows and pressure changes the ratio between O and H based on the optical emission data. Lower source power creates less overall dissociation, while higher source power creates more.
  • the reason for a worse performance of the higher source power is supposed to be the lower DC-Bias i.e. lower ion energy related to higher source power settings. This however might be able to be compensated by higher bias power.
  • This same process step run for 15 and 30 sec shows no occurrence of copper modifications for both times i.e. this dry-cleaning does not lose its effect with some "over-cleaning" being applied.
  • Bias power is used to control the ion energy (i.e. DC bias). Higher pressure decreases the DC bias at a predetermined bias power fed into the plasma, thus higher bias power than the described 175 W will be needed for processes running at higher pressures than 10 mTorr.
  • the lower level of bias power is given by the activation energy needed for the chemical reaction (reduction of copper oxide) and an upper level due to the fact that sputtering of the exposed copper needs to be prevented by any means (sputtered copper will be partly deposited on the sidewalls of the etched structures and therefore "poison" the dielectric material.)
  • a substrate 2 comprising a dielectric layer 3 made of USG, FSG, SiCOH (e.g. Black DiamondTM), or spin- on polymer into which a plurality of copper interconnects 4 defining a first metallization level is embedded.
  • a barrier layer 6 encapsulating the copper interconnects 4 on their sidewalls prevents copper diffusion into surrounding dielectric material.
  • An insulating layer 14 comprising a silicon nitride layer 8, a first layer 10 of F-TEOS (fluorine-containing silicon oxide deposited using Tetra-Ortho-Silicate), and a second layer 12 of e.g. Black DiamondTM covers both the copper interconnects 4 and the first insulating layer 3.
  • the silicon nitride layer 8 serves as an etch stop layer during subsequent etching of the first and second layer.
  • a first resist mask 16 having a first pattern defining vias is formed as shown in Figure lb.
  • the insulating layer 14 is etched down to the etch stop layer 8 using a two step procedure to form via openings 15.
  • second layer 12 is etched with CF 4 /A1 followed by the second step to selectively etch first layer 10 by C 4 Fg/Ar. Due to a sufficient etch selectivity between the etching of the material of the second layer 12 and the etch stop layer 8, the etching stops on the surface of the etch stop layer 8, even if over-etching is carried out.
  • the resulting structure is shown in Figure lb.
  • a second resist mask 18 is deposited on the second layer 12 after removal of the first resist mask 16.
  • the second resist mask 18 comprises a pattern defining trenches for copper interconnects. During the deposition of the resist mask, some resist may be deposited into vias 15 as well, filling them up to a certain degree as indicated in Figure lc.
  • the second layer 12 is subsequently etched selectively to the resist and the material of the first layer 10 to form trenches 20 for copper interconnects.
  • the etch chemicals used are for instance CF ⁇ Ar. This etching is controlled by end-point detection to stop the etching on top of first layer 10, as can be seen in Figure Id.
  • the resist filling the vias 15 protects the etch stop layer from being attacked by the etching gas.
  • etch stop layer 8 is removed using CH 2 F 2 /O 2 /Ar chemistry.
  • the oxygen contained in the etching gas might contribute to the formation of copper modifications.
  • the surface of the copper interconnects 4 gets exposed to the plasma and the etch stop layer etching chemistry which might affect the copper.
  • the observed copper modifications result from the attack of the copper surface by this etch chemistry or a standard oxygen cleaning step (oxygen flash) which typically follows to remove unwanted etch residues such as polymers.
  • the observed copper modifications are removed by the invented cleaning procedure using hydrogen and oxygen radicals in a predetermined ratio.
  • the invented cleaning procedure might replace the standard oxygen cleaning step or follow it.
  • a double layer 24 comprising a thin tantalum layer forming a barrier layer and a thin copper layer forming a seed layer is deposited by sputtering both layers.
  • copper 26 ( Figure lg) is plated by ECP (electro-chemical plating) to fill the vias 15 and the trenches 20.
  • the barrier layer 24 promotes adhesion of the copper to be plated, and pro-vides a diffusion barrier to prevent any copper diffusion into surrounding material.
  • Another suitable barrier layer is for instance Ta TaN.
  • any sur-plus copper is removed by chemical mechanical polishing, which removes the barrier/seed layer 24 from the top surface of second layer 12 as * well.
  • the final structure comprising copper interconnects 30 and vias 32 is shown in Figure lh.
  • metal modifications appear to comprise metal and oxygen and might be formed during an preceding etching step or due to exposure to oxygen containing atmosphere.
  • Such metal modification which could be considered as stoichiometric or non-stoichiometric metal oxides as well, are also removed by the invention besides the other etch contaminants or etch residue, such as polymeric etch residues.
  • the invented method can be used as a universal cleaning method to clean any metal surface irrespective of the nature of the contamination of the metal surface.
  • the invented cleaning method is suitable for removing polymeric residues and/or metal oxides.
  • a predetermined ratio of oxygen to hydrogen radicals of about 0.8 to 1.5, and in particular of about 1, has been found to be very effective for virtually the complete removal of any contaminants such as metal modifications, metal oxides, polymeric residues and other etch contaminants.
  • the desired predetermined ratio between oxygen and hydrogen radicals is primarily determined on the basis of observed spectrum of plasma emission.
  • hydrogen and oxygen radicals should be understood in its broadest sense. Not only pure hydrogen (H + ) and oxygen (O ) are considered to be comprised but also other radicals which contain hydrogen and oxygen as effective reducing or oxidizing agents.
  • the etching gas comprises NH 3 and O 2 as hydrogen- and oxygen-containing species supplied in a certain flow ratio.
  • NH 3 is a proven effective hydrogen source.
  • a suitable flow ratio of NH to O 2 is between 1 :2 and 1:10 and in particular 1 :5, in order to obtain the predetermined ratio between oxygen and hydrogen radicals of about 0.8 to 1.5 and in particular of about 1.
  • the flow ratio between these sources might differ from those given above for ammonia and oxygen. Irrespective of which hydrogen and oxygen sources are used, their flow ratio should be adjusted to obtain the desired ratio of oxygen and hydrogen radicals. Examples of other hydrogen sources are H and H /N 2 .
  • the etching gas is typically supplied into an etching chamber in which the etching gas is decomposed (ionized) by a plasma. In order to maintain a sufficient density of hydrogen and oxygen radicals (ion density), the plasma is fed by a minimum source power which should be for instance greater than 1200 W. In the plasma, the species of the etching gas becomes decomposed or dissociated, giving free ions or radicals.
  • the source power fed into the plasma influences the ratio of oxygen to hydrogen radicals as well, since different species of the etching gas might be decomposed to a different degree. For instance, NH 3 can be easily decomposed even by a weak plasma, whereas O 2 needs a stronger plasma to become decomposed. However, the source power should for instance not exceed a maximum value such as 3000 W. 1600 W has turned out to be a suitable value. Any chamber with a decoupled plasma source such as inductively or capacitively plasma sources is considered to be most suitable.
  • the values for the source power given above are exemplary for a IPS-Dielectric Etch Chamber commercially available from Applied Materials. When using other etch chambers, the values might differ from those given above. However, a skilled person will easily find the correct values to obtain the predetermined ratio of oxygen to hydrogen radicals.
  • hydrogen and oxygen radicals should have a certain energy. Chemical reactions may need some activation energy to get initiated or to be maintained. Activation energy can be provided by various mechanisms. Raising the substrate temperature at values higher than about 300°C is for instance a common activation source. However, this may be disadvantageous if the substrate comprises temperature sensitive components. Therefore, hydrogen and oxygen radicals are optionally accelerated in an electrical field. In particular, the reduction of metal oxides is enhanced by energized hydrogen radicals. In addition to that, the radicals are directed and partially focused by the electrical field toward the substrate which is advantageous for cleaning the bottom of high aspect openings.
  • the electrical field is maintained by a predetermined bias power, wherein the predetermined bias power is between 100 and 500 W, and in particular 175 W.
  • Source and bias power can be independently controlled, which allows individual adjusting of density and activation or energy level of the radicals. Again, these values are true for the IPS-Dielectric Etch Chamber of Applied Materials and may have to be adjusted when using other etch chambers.
  • the inventive process will therefore be suitable for any integrated devices which are susceptible to high temperatures.
  • resist is very temperature sensitive. At higher temperatures, resist becomes runny and loses any pattern which might be already formed therein. In addition to that, high temperatures induce mechanical stress which can lead to fractures or cracks of the integrated devices. Figuratively speaking, the available thermal budget is restricted.
  • the substrate might be therefore maintained at a low temperature during the dry-etching, in particular below 100°C, to reduce the thermal stress.
  • the ratio between hydrogen and oxygen radicals might be further controlled by the pressure within the etching chamber.
  • the dry-etching of the metal modifications is performed under a predetermined pressure.
  • a suitable range of the pressure is between 2 and 50 mTorr and in particular 5 mTorr.
  • the invented method is in particular suitable for cleaning copper surfaces.
  • the substrate to be cleaned may comprise a copper layer covered at least partially by copper modifications comprising copper and oxygen.
  • Hydrogen radicals are very effective in removing copper oxides and copper modifications.
  • oxygen radicals etch polymers which are already present or which might be formed due to the reaction of hydrogen radicals with other compounds of the substrate. Although unwanted copper oxide might be formed under the influence of oxygen radicals, it will be immediately removed by the hydrogen radicals. Hence, the balanced reaction of hydrogen and oxygen radicals continuously removes copper modifications and polymers.
  • the substrate may further comprise an insulating layer partially covering the copper layer, whereby the uncovered part of the copper layer forms the copper surface covered with the copper modifications.
  • Metal interconnects are an example of such a structure.
  • the etching comprises an over-etching step which prolongs the overall etching duration to ensure complete removal of any insulating material and to level out any inhomogeneous etching which may occur.
  • the surface of the underlying material is exposed to the etching gas for at least a short time.
  • the etching gas is normally chosen such that it exhibits a sufficient selectivity to the underlying material, a certain attack of the underlying material by the etching gas cannot be excluded. In the case of copper as underlying material, such an exposure significantly modifies the copper surface.
  • the etching procedure for etching the insulating layer and the dry-etching for removing the copper modifications are performed in-situ. Any polymeric residues remaining from the preceding etching procedure might be removed during the dry-etching of the copper modifications as well. Hence, no other cleaning step is required.
  • first resist mask second resist mask trench double layer comprising a barrier and a seed layer copper copper interconnects of the second metallization level via

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Abstract

A metal surface covered by metal modifications comprising metal such as copper and oxygen is cleaned by an etching process using oxygen and hydrogen radicals preferably in a ratio of 0.8 to 1.5. Hydrogen and oxygen radicals reduce any metal oxides and polymeric residuals in a balanced reaction. The cleaning effect is enhanced by energizing the radicals in an electrical field. Ammonia and oxygen are suitable sources for the hydrogen and oxygen radicals, respectively.

Description

Method for cleaning a metal surface by a dry-etching step
FIELD OF THE INVENTION
The present invention relates generally to the fabrication of integrated circuits on substrates. More particularly, the invention relates to a method for cleaning a metal surface by a dry-etching step, especially for removing copper modifications comprising copper and oxygen from a copper surface.
BACKGROUND OF THE INVENTION
Reliably producing sub-half micron and smaller features is one of the key technologies for the next generation of very large scale integration (VLSI) and ultra large scale integration (ULSI) integrated circuits. In particular, high scaled multilevel interconnects demand careful and exact processing of high aspect ratio features, such as vias and conductive metal lines.
A commonly used method for forming multilevel interconnects is the so- called damascene technique (US 6,174,810 BI; US 6,352,917 BI; 6,429,128 BI; US 6,444,568 BI). Briefly, in a typical damascene process, an insulating layer covering interconnect lines of a metallization level is etched to define both openings for the contacts/vias and trenches for the interconnect lines in the insulating layer. The contacts or vias electrically connect interconnect lines of the metallization levels with the interconnect lines of the next metallization level. Metal is then inlaid into the defined pattern (openings and trenches) and any excess metal is typically removed from the top of the insulating layer in a planarization process, such as CMP. Metal plating and back planarization is an indirect structuring method in comparison to the direct structuring method of the insulating layer by means of etching. Indirect structuring of metal has some advantages over direct structuring. The main reason is that there are a variety of established etching processes for insulating materials such as silicon oxide and silicon nitride in contrast to metals which need special chemistry. Another reason concerns the accuracy of the etching (steepness of the etching flanks, formation of etch residues) which is far better for insulating materials. Therefore, for the formation of very small sized features, an indirect structuring of metals is preferred.
Another issue that still needs improvement is the reduction of oxides from the surface of the interconnect lines to form reliable electrical contacts. These oxides may be formed during the etching of openings into insulating layers or due to the exposure of uncovered interconnect lines to an oxygen containing atmosphere. Although in semiconductor process technology care is taken to avoid any exposure of metal surfaces to oxygen, even in a chamber well purged with inert gases, traces of oxygen or oxygen containing gases may be found.
In the damascene technique, the insulating layer may comprise an etch stop layer covering interconnect lines to protect them during etching of the insulating layer. As long as the etch stop layer remains on the interconnect lines, a reliable protection against the etching gas is ensured. However, the etch stop layer must finally be opened. Even if the etch process to open the etch stop layer is cut short, a slight over-etching (a prolonged etching time) of the etch stop layer is required to remove any material of the etch stop layer. At this moment, the etching gas may affect the metal surface of interconnect lines. In addition to that, it has been found that etch residues of the etch stop open process remain on the metal surface of the interconnect lines which should be removed by an subsequent clean step.
In modern semiconductor devices, copper is the material of choice for the formation of metal interconnects, due to its lower electrical resistance and higher current carrying capacity in comparison to aluminum. However, copper tends to corrode if it comes into contact with an oxygen-containing atmosphere. Moreover, "copper modifications" have been observed at the via bottom after etching of the etch stop layer. These copper modifications appear to be a structural change of the copper surface of the underlying copper interconnect. This structural change may result in a topography at the via bottom which causes a non-conform barrier/seed layer deposition required for the deposition/filling of vias with copper.
In order to remove copper oxide, ammonia might be used as a cleaning agent in plasma assistant dry-cleaning (U.S. patent application 2001/0049181) since a pure ammonia atmosphere is compatible with a copper metallization (U.S. patent application 2002/0111041 Al). Alternatively, copper oxide might be removed by physical treatment such as Ar ion sputtering. Although the latter treatment provides a sufficient cleaning of planar copper surface, difficulties arise when cleaning the bottom of high aspect openings required for vias of advanced multilevel metal interconnects.
Further investigations have revealed that copper modifications might be correlated with the over-etching of the etch stop layer. Although desirable, a reduction of the over-etching time to zero is in principle not possible, since over-etching is required to ensure a complete removal of any material of the etch stop layer.
Therefore, there is still a need for improving cleaning processes of copper to reduce oxides and other etching residues formed on the metal surface.
SUMMARY OF THE INVENTION
The present invention provides a method for cleaning a metal surface by a dry- etching step, the method comprising the steps of: providing a substrate comprising a metal having a metal surface; supplying an etching gas comprising hydrogen- and oxygen-containing species; ionizing the hydrogen- and oxygen-containing species by a plasma to produce hydrogen and oxygen radicals in a predetermined ratio; and cleaning the metal surface by dry-etching using the hydrogen and oxygen radicals. A predetermined ratio between hydrogen and oxygen radicals was found to be essential for an effective cleaning of metal surfaces. Without restricting the invention, the mechanism of cleaning the metal surface is assumed to be a balanced process of oxide and polymer removal. Typically, metal surfaces might be covered by oxides and other etch contaminants such as polymeric residues. Oxides are removed by hydrogen radicals. However, the hydrogen radicals may cause the formation of polymeric residues which themselves are quite resistant to the hydrogen radical attack and therefore impede or reduce the cleaning efficiency of the hydrogen radicals. To level out this undesired side effect, oxygen radicals are added to a predetermined amount to etch the polymeric residues. On the other hand, oxygen might oxidize the metal surface but this is leveled out by the hydrogen radicals. Therefore, due to a balanced removal of both oxides and polymers or other etching residues achieved by a predetermined ratio between hydrogen and oxygen radicals, metal surfaces are cleaned without any remaining residues. The such cleaned metal surfaces appear smooth. No ripples or other topographical changes are visible any more.
BRIEF DESCRIPTION OF THE DRAWINGS
For a more complete understanding of the present invention, reference is made to the accompanying drawing in the following Detailed Description of the Invention. In the drawings:
Figures la to lh show different steps of an damascene process including the invented method.
Figure 2 shows an example of copper modifications at via bottom.
Figure 3 shows cross-section SEM of vias with and without copper modifications. Figure 4 shows copper modifications after an extended nitride open etch step.
Figure 5 shows cleaned copper surfaces.
Figure 6 shows cross-section SEM of via after removal of copper modification.
Figure 7 shows a comparison between optical spectra of standard O2- flash and dry-etching of the present invention.
DETAILED DESCRIPTION OF THE DRAWINGS
Before explaining the method for cleaning a metal surface and in particular for removing metal modifications from a surface in more detail, the nature and formation of the metal modification shall be outlined to a greater extent.
Integrated circuits use dielectric layers, which have typically been formed from silicon dioxide, SiO2 or undoped silicon glass, to insulate interconnect lines such as metal interconnects on various layers of a semiconductor structure. Such layers are often called "metallization levels" to indicate the stacked arrangement of the interconnect lines. Each metallization level comprises multiple metal interconnects which substantially run horizontally with respect to the main surface of the semiconductor substrate. As integrated circuits become faster and more compact, operating frequencies increase and the distance between the metal interconnects within the integrated circuits decreases. Correlated with this is a permanent decrease in feature size. To decrease the capacitive coupling between metal interconnects, insulating materials having a low dielectric constant are used. Until now, silicon dioxide has been the material of choice due to its versatility. However, the dielectric constant of silicon dioxide is about 4 which is too high for a significant reduction of capacitive coupling. Therefore, many so-called "low k materials" have been developed such as spin-on polymers, carbon-containing silicon oxides such as Black Diamond™ or Coral™, or FSG such as fluorinated silicon glass (for instance F-TEOS, fluor-containing silicon oxide).
Metal interconnects of adjacent metallization levels must be electrically connected with each other. To this end, openings extending through the insulating layers are formed and subsequently filled with conductive material. Such electrical connections are called vias. Typically, the openings are formed by etching, using a mask. The etching is typically selective to the material underlying the insulating layer, in order to securely stop the etching on the surface of the underlying material. In the case of metal interconnects, the underlying materials are often aluminum or copper. Copper is chosen due to its lower electrical resistance and higher current carrying capacity in comparison to aluminum. Although the etching of insulating material should not affect the underlying metal, surface modifications of the metal have been observed. It is assumed that the plasma and the reactive species of the etching gas attack the metal surface to a given degree. Etch residue might be formed as well. Further, standard oxygen cleaning steps might cause the formation of metal modifications.
Examples of the surface structure of metal surfaces at via bottom after forming via openings are given in Figure 2, which shows top-view SEM- images (Scanning Electron Microscopy). The insulating layer covering the metal appears black in these images. Each example represents differently pronounced metal modifications. In this particular example, a copper interconnect was investigated covered by an insulating layer into which via openings were etched. At via bottoms, a structural change of the copper surface appears. This structural change results in a topography at via bottom which may cause a non-conformal barrier/seed layer deposition. For good adhesion of plated copper to underlying material and as a copper diffusion barrier layer, a barrier layer comprising for instance transition metals such as tungsten, tantalum and titanium, nitrides of transition metals such as TaN or TiSiN might be used. In addition to that, a thin copper seed layer is deposited onto the barrier layer to promote copper plating. With further progress of shrinking the feature size in semiconductor technology, the conformity of such layers becomes even more important. Also in Figure 2, a different thickness of high-reflective "rings" at the via sidewalls can be seen. It is assumed that these rings consist of remaining polymers which have not been removed during the in-situ dry-clean step (standard oxygen flash) immediately following the etching of the insulating layer. These rings give a huge variation in CD-SEM (Critical Dimension) measurement but this is not only a measurement artifact; electrical results (via chain resistance) prove this variation.
Several analysis techniques have been applied to determine the nature of the copper modifications. Figure 3 is a cross-section SEM with tilted images, where the insulating layer has been partially removed. Note that also vias with a smooth surface have a different reflection than the copper which had not been exposed to the etch plasma and the etching gas used to etch the insulating layer. This indicates a surface modification even if no residues or oxides were formed.
AES analysis of oxygen distribution shows significant oxygen content in copper modifications. The ratio of oxygen to copper varies but indicates that there is significantly more copper than oxygen. Stoichiometric copper oxide was not found, which suggests that oxygen might be implanted into the copper surface during the etching of the insulating layer or the following standard cleaning step.
In advanced semiconductor technology, thin etch stop layers covering the metal surface are employed for many reasons. One reason is that a long over- etch time for thick insulating layers is required. The etch stop layer protects the underlying metal surface against any attack by the etching gas or plasma. Although the etch stop layer must be finally removed as well, the over-etch time which is required for the etch stop layer too is much shorter than the over- etch required for the thick insulating layer. Hence, time of exposure to etching gas or plasma is significantly reduced. In the case of silicon dioxide as insulating material, silicon nitride or carbon-containing silicon nitrides such as BLoK™ are often used as the material for the etch stop layer. Further investigations have shown that the occurrence of metal modifications is very sensitive to Nitride Open over-etch time to completely remove the etch stop layer made of silicon nitride. During a set of experiments on material stacks comprising copper, silicon nitride as etch stop layer, and silicon dioxide as insulating layer, it was confirmed that reduced over-etch time of the etch stop layer removal step might reduce the observed metal modifications. Other parameters contributing to the metal modifications are for instance the chemistry used for etch stop layer removal (a process using CH2F2/O2/Ar). Chemicals containing no hydrogen tend to create less metal modifications. Further, it was observed that even a final oxygen cleaning step (20 sec low biased Oxygen-"flash") does not reduce but rather contributes to the observed copper modifications. Such an oxygen cleaning step sometimes follows an preceding etching step to remove polymeric residues.
Examples of copper modifications after an extended nitride open etch step are given in Figure 4. Note the pronounced rippled structure of the copper surface and the thick high-reflective ring at via sidewalk
However, all these studies showed some improvements but no major break-through. For obvious reasons it is impossible to reduce the etch stop layer over-etch to zero, which would possibly prevent copper modifications.
For that, it can be postulated that copper modifications will appear during plasma etching and that a subsequent cleaning step is desired to remove them.
Although there are known solvents for a post-etch wet cleaning of exposed copper surfaces, the use of such solvents adds costs and complexity to the wafer fabrication and raises other questions like compatibility to the various dielectric materials - undoped silicon glass (USG), fluorine-doped silicon glass
(FSG), carbon-containing silicon oxide such as SiCOH (Black Diamond™) and polymeric Low-K dielectrics. Therefore, the desire for a dry-clean solution is increased even further.
The present invention allows a simple and complete removal of metal modifications comprising metal and oxygen by an dry-etching process using hydrogen and oxygen radicals. Hydrogen radicals reduce stoichiometric and non-stoichiometric oxides, whereas oxygen radicals etch polymers which might already be present or formed during the removal step. Any metal oxide which might be formed due to the presence of oxygen radicals is immediately removed by the hydrogen radicals. It is assumed that each type of radical levels out the negative side effect of the other one. To ensure a well-balanced reduction of both oxides and polymers, a predetermined ratio of oxygen to hydrogen radicals is required. The ratio might be between 0.8 to 1.5 and in particular the ratio is about 1.
Ammonia and pure oxygen is for instance used as hydrogen- and oxygen- containing etching gas fed into a reaction chamber equipped with an induction coil to set up a plasma. The chamber is evacuated to 2 to 50 mTorr.
A set of experiments were performed to obtain suitable values for the removal of copper modifications. To this end, a substrate comprising a copper layer partially covered by an silicon oxide layer was introduced into a standard dielectric etch chamber, such as the IPS Dielectric Etch Chamber of Applied Materials, and chucked by a substrate carrier. Source and bias power and the pressure within the chamber were adjusted to the desired values. The temperature of the substrate to be cleaned was maintained by back side cooling using helium as cooling medium having a pressure of about 7 Torr. The cathode temperature was about 10 °C. Ammonia and oxygen were supplied into the chamber with a predetermined flow rate. After igniting the plasma, ammonia and oxygen were decomposed and oxygen- and hydrogen radicals formed. In this particular case, not only pure H- and O radicals but also OH- and NH-radicals were formed which are considered as hydrogen- and oxygen radicals as well. Optical emission spectroscopy was used to estimate the ratio of hydrogen and oxygen radicals. The following tables give an overview of the obtained parameters.
Figure imgf000011_0001
The corresponding Oxygen and Hydrogen ratio obtained by optical spectroscopy of plasma emission for different settings is given below.
Figure imgf000012_0002
Typical emission lines for hydrogen and oxygen were used to calculate the oxygen-hydrogen ratio. The spectra was recorded by multi-channel spectroscopy using a CCD-array sensor. For oxygen, the determined intensity values at 314.5, 436.8, 615.7, 645.4, and 777.5 nm were summed up. For hydrogen, the intensity values at 434.0, 486.1, and 656.3 nm were summed up as well. The quotient of these two sums represents the ratio of oxygen to hydrogen radicals. In a mathematical formulation, the ratio between oxygen and hydrogen radicals is calculated by
Figure imgf000012_0001
∑A' ώ irogeπ where Aoxygen and Ahydrogen are the spectrographically determined values at the chosen wavelength. The intensity values obtained for each emission line and the calculated sums given above in the table are typical for this particular experiment. If other equipment is used to determine the intensity at the given wavelength the obtained values might differ from those indicated in the table. However, if other equipment is used to determine the intensity values for hydrogen and oxygen, other intensity values might be obtained but the calculated ratios can be directly compared with the ratios given above.
The experiments suggest that a flow ratio of NH3/O2 of 1 :5 gives the best results with virtually complete removal of copper modifications. A certain ion energy controlled by the bias power enhances the effective removal even further. On the other hand, higher pressure and total gas flow do not improve the removal; it even appears to yield worse results. Wafer temperature has no strong impact on the clean performance, but a low temperature is considered to be more appropriate to reduce temperature stress.
Because of these trends, it is believed that the mechanism of copper modification removal is driven by the correct ratio of oxygen to hydrogen radicals such as OH, H, NH, and O-radicals, and that a certain level of physical activation energy (acceleration of the radicals) is advantageous for this reducing reaction.
The dry-cleaning process with the best copper modification removal performance is flowing 125 seem O2, 25 seem NH3 with throttle valve fully open (pressure ~ 5 mTorr), 1600 W source power and 175 W bias power, cathode (substrate carrier) temperature + 10 °C and 7 Torr He backside cooling. The temperature of the substrate to be cleaned was about 40 to 80°C due to heating by the impacting radicals. This gas flow ratio, pressure and source power setting create the highest level of O and H radicals among all the various dry-clean regimes investigated. Higher NH3-flows and pressure changes the ratio between O and H based on the optical emission data. Lower source power creates less overall dissociation, while higher source power creates more. The reason for a worse performance of the higher source power is supposed to be the lower DC-Bias i.e. lower ion energy related to higher source power settings. This however might be able to be compensated by higher bias power. This same process step run for 15 and 30 sec shows no occurrence of copper modifications for both times i.e. this dry-cleaning does not lose its effect with some "over-cleaning" being applied.
Other reactor types might use different power settings, since the resulting dissociation depends on the efficiency of the plasma source. Also the use of a different hydrogen source (H2, N2/H2) can result in different flow ratios than the described NH3/O2 process. Irrespective of which etching gas is used, the dissociation of the etching gas should be adjusted such that the ratio of oxygen to hydrogen species is roughly about 1. Suitable parameters to control this ratio are gas flow ratio, pressure, and plasma source controlling ion flux, respectively. Besides that, a certain level of dissociation should be provided to run the dry-cleaning process to a sufficient extent. The required dissociation level defines the lower level of source power. An upper level might be given by the sensitivity of the dielectric material used and the semiconductor device itself (plasma damage - transistor gate dielectric breakdown, property modification of interlayer dielectric material).
Bias power is used to control the ion energy (i.e. DC bias). Higher pressure decreases the DC bias at a predetermined bias power fed into the plasma, thus higher bias power than the described 175 W will be needed for processes running at higher pressures than 10 mTorr. The lower level of bias power is given by the activation energy needed for the chemical reaction (reduction of copper oxide) and an upper level due to the fact that sputtering of the exposed copper needs to be prevented by any means (sputtered copper will be partly deposited on the sidewalls of the etched structures and therefore "poison" the dielectric material.)
Examples of cleaned copper surfaces are given in Figure 5 and 6 which show SEM images of via bottoms. The copper surface appears to be smooth and clean, indicating a complete removal of any copper modification and polymers. A spectra comparison between standard "PET-Flash" (oxygen) and the inventive dry-clean process is shown in Figure 7. The inventive cleaning process shall be explained in more detail in conjunction with a dual damascene procedure for forming copper interconnects.
With reference to Figure la, a substrate 2 is shown comprising a dielectric layer 3 made of USG, FSG, SiCOH (e.g. Black Diamond™), or spin- on polymer into which a plurality of copper interconnects 4 defining a first metallization level is embedded. A barrier layer 6 encapsulating the copper interconnects 4 on their sidewalls prevents copper diffusion into surrounding dielectric material. An insulating layer 14 comprising a silicon nitride layer 8, a first layer 10 of F-TEOS (fluorine-containing silicon oxide deposited using Tetra-Ortho-Silicate), and a second layer 12 of e.g. Black Diamond™ covers both the copper interconnects 4 and the first insulating layer 3. The silicon nitride layer 8 serves as an etch stop layer during subsequent etching of the first and second layer. On top of the second layer 12, a first resist mask 16 having a first pattern defining vias is formed as shown in Figure lb. The insulating layer 14 is etched down to the etch stop layer 8 using a two step procedure to form via openings 15. In the first step, second layer 12 is etched with CF4/A1 followed by the second step to selectively etch first layer 10 by C4Fg/Ar. Due to a sufficient etch selectivity between the etching of the material of the second layer 12 and the etch stop layer 8, the etching stops on the surface of the etch stop layer 8, even if over-etching is carried out. The resulting structure is shown in Figure lb.
Referring to Figure lc, a second resist mask 18 is deposited on the second layer 12 after removal of the first resist mask 16. The second resist mask 18 comprises a pattern defining trenches for copper interconnects. During the deposition of the resist mask, some resist may be deposited into vias 15 as well, filling them up to a certain degree as indicated in Figure lc. The second layer 12 is subsequently etched selectively to the resist and the material of the first layer 10 to form trenches 20 for copper interconnects. The etch chemicals used are for instance CF^Ar. This etching is controlled by end-point detection to stop the etching on top of first layer 10, as can be seen in Figure Id. The resist filling the vias 15 protects the etch stop layer from being attacked by the etching gas. After removal of the second resist mask 18, etch stop layer 8 is removed using CH2F2/O2/Ar chemistry. The oxygen contained in the etching gas might contribute to the formation of copper modifications. At this process step, the surface of the copper interconnects 4 gets exposed to the plasma and the etch stop layer etching chemistry which might affect the copper. It is assumed that in this particular embodiment, the observed copper modifications result from the attack of the copper surface by this etch chemistry or a standard oxygen cleaning step (oxygen flash) which typically follows to remove unwanted etch residues such as polymers. The observed copper modifications are removed by the invented cleaning procedure using hydrogen and oxygen radicals in a predetermined ratio. The invented cleaning procedure might replace the standard oxygen cleaning step or follow it.
Referring now to Figure 1 f, a double layer 24 comprising a thin tantalum layer forming a barrier layer and a thin copper layer forming a seed layer is deposited by sputtering both layers. Subsequently, copper 26 (Figure lg) is plated by ECP (electro-chemical plating) to fill the vias 15 and the trenches 20. The barrier layer 24 promotes adhesion of the copper to be plated, and pro-vides a diffusion barrier to prevent any copper diffusion into surrounding material. Another suitable barrier layer is for instance Ta TaN. Next, any sur-plus copper is removed by chemical mechanical polishing, which removes the barrier/seed layer 24 from the top surface of second layer 12 as* well. The final structure comprising copper interconnects 30 and vias 32 is shown in Figure lh.
In the foregoing description, for example, the invention was described in conjunction with copper. However, any metal modification, especially those comprising a metal and oxygen, can be completely removed by the invented method as well.
It has been observed that metal surfaces may exhibit metal modifications.
These metal modifications appear to comprise metal and oxygen and might be formed during an preceding etching step or due to exposure to oxygen containing atmosphere. Such metal modification, which could be considered as stoichiometric or non-stoichiometric metal oxides as well, are also removed by the invention besides the other etch contaminants or etch residue, such as polymeric etch residues.
The invented method can be used as a universal cleaning method to clean any metal surface irrespective of the nature of the contamination of the metal surface. In particular, the invented cleaning method is suitable for removing polymeric residues and/or metal oxides.
In a further embodiment, a predetermined ratio of oxygen to hydrogen radicals of about 0.8 to 1.5, and in particular of about 1, has been found to be very effective for virtually the complete removal of any contaminants such as metal modifications, metal oxides, polymeric residues and other etch contaminants. The desired predetermined ratio between oxygen and hydrogen radicals is primarily determined on the basis of observed spectrum of plasma emission.
The term hydrogen and oxygen radicals should be understood in its broadest sense. Not only pure hydrogen (H+) and oxygen (O ) are considered to be comprised but also other radicals which contain hydrogen and oxygen as effective reducing or oxidizing agents.
In a further embodiment, the etching gas comprises NH3 and O2 as hydrogen- and oxygen-containing species supplied in a certain flow ratio. NH3 is a proven effective hydrogen source. A suitable flow ratio of NH to O2 is between 1 :2 and 1:10 and in particular 1 :5, in order to obtain the predetermined ratio between oxygen and hydrogen radicals of about 0.8 to 1.5 and in particular of about 1.
Other hydrogen and oxygen sources can be used as well. The flow ratio between these sources might differ from those given above for ammonia and oxygen. Irrespective of which hydrogen and oxygen sources are used, their flow ratio should be adjusted to obtain the desired ratio of oxygen and hydrogen radicals. Examples of other hydrogen sources are H and H /N2. The etching gas is typically supplied into an etching chamber in which the etching gas is decomposed (ionized) by a plasma. In order to maintain a sufficient density of hydrogen and oxygen radicals (ion density), the plasma is fed by a minimum source power which should be for instance greater than 1200 W. In the plasma, the species of the etching gas becomes decomposed or dissociated, giving free ions or radicals. Further to adjusting ion density, the source power fed into the plasma influences the ratio of oxygen to hydrogen radicals as well, since different species of the etching gas might be decomposed to a different degree. For instance, NH3 can be easily decomposed even by a weak plasma, whereas O2 needs a stronger plasma to become decomposed. However, the source power should for instance not exceed a maximum value such as 3000 W. 1600 W has turned out to be a suitable value. Any chamber with a decoupled plasma source such as inductively or capacitively plasma sources is considered to be most suitable. The values for the source power given above are exemplary for a IPS-Dielectric Etch Chamber commercially available from Applied Materials. When using other etch chambers, the values might differ from those given above. However, a skilled person will easily find the correct values to obtain the predetermined ratio of oxygen to hydrogen radicals.
For further enhancement of the cleaning effect, hydrogen and oxygen radicals should have a certain energy. Chemical reactions may need some activation energy to get initiated or to be maintained. Activation energy can be provided by various mechanisms. Raising the substrate temperature at values higher than about 300°C is for instance a common activation source. However, this may be disadvantageous if the substrate comprises temperature sensitive components. Therefore, hydrogen and oxygen radicals are optionally accelerated in an electrical field. In particular, the reduction of metal oxides is enhanced by energized hydrogen radicals. In addition to that, the radicals are directed and partially focused by the electrical field toward the substrate which is advantageous for cleaning the bottom of high aspect openings. In a further embodiment, the electrical field is maintained by a predetermined bias power, wherein the predetermined bias power is between 100 and 500 W, and in particular 175 W. Source and bias power can be independently controlled, which allows individual adjusting of density and activation or energy level of the radicals. Again, these values are true for the IPS-Dielectric Etch Chamber of Applied Materials and may have to be adjusted when using other etch chambers.
Due to the electrical field, activation can be done at low temperatures.
The inventive process will therefore be suitable for any integrated devices which are susceptible to high temperatures. For instance, resist is very temperature sensitive. At higher temperatures, resist becomes runny and loses any pattern which might be already formed therein. In addition to that, high temperatures induce mechanical stress which can lead to fractures or cracks of the integrated devices. Figuratively speaking, the available thermal budget is restricted. The substrate might be therefore maintained at a low temperature during the dry-etching, in particular below 100°C, to reduce the thermal stress.
The ratio between hydrogen and oxygen radicals might be further controlled by the pressure within the etching chamber. In a further embodiment, the dry-etching of the metal modifications is performed under a predetermined pressure. A suitable range of the pressure is between 2 and 50 mTorr and in particular 5 mTorr.
The invented method is in particular suitable for cleaning copper surfaces. The substrate to be cleaned may comprise a copper layer covered at least partially by copper modifications comprising copper and oxygen. Hydrogen radicals are very effective in removing copper oxides and copper modifications. On the other hand, oxygen radicals etch polymers which are already present or which might be formed due to the reaction of hydrogen radicals with other compounds of the substrate. Although unwanted copper oxide might be formed under the influence of oxygen radicals, it will be immediately removed by the hydrogen radicals. Hence, the balanced reaction of hydrogen and oxygen radicals continuously removes copper modifications and polymers.
The substrate may further comprise an insulating layer partially covering the copper layer, whereby the uncovered part of the copper layer forms the copper surface covered with the copper modifications. Metal interconnects are an example of such a structure.
The inventors have observed that copper modifications may occur after etching the insulating layer covering the copper surface. Commonly, the etching comprises an over-etching step which prolongs the overall etching duration to ensure complete removal of any insulating material and to level out any inhomogeneous etching which may occur. During over-etching, the surface of the underlying material is exposed to the etching gas for at least a short time. Although the etching gas is normally chosen such that it exhibits a sufficient selectivity to the underlying material, a certain attack of the underlying material by the etching gas cannot be excluded. In the case of copper as underlying material, such an exposure significantly modifies the copper surface. In an extended investigation of the nature of these modifications, a copper surface exposed to the etching gas was investigated by AES (Auger Electron Analysis). AES analysis of oxygen distribution revealed a significant oxygen content in the exposed copper surface, although the amount of oxygen seems not to exceed that of copper. Because of this mis-match it is believed that non-stoichiometric copper oxide is present which might be formed by "implantation" of oxygen into the copper surface and disturbing its local structure. Such formed copper modifications show a rippled structure which is disadvantageous with respect to adhesion of plated copper or other metals. Further, the contact resistance between the copper layer and other electrical conductive structures such as vias is increased by any kind of copper oxides.
To prevent any further oxidation of the copper surface, the etching procedure for etching the insulating layer and the dry-etching for removing the copper modifications are performed in-situ. Any polymeric residues remaining from the preceding etching procedure might be removed during the dry-etching of the copper modifications as well. Hence, no other cleaning step is required.
Thus, while the present invention has been described herein with reference to particular embodiments thereof, a latitude of modification, various changes and substitutions are intended in the foregoing disclosure, and it will be appreciated that in some instances some feamres of the invention will be employed without a corresponding use of other features without departing from the scope and spirit of the invention as set forth. Therefore, many modifications may be made to adapt a particular situation or material to the teachings of the invention without departing from the essential scope and spirit of the present invention.
List of reference numbers (for internal use)
substrate dielectric layer copper interconnects of first metallization level barrier layer etch stop layer first layer second layer insulating layer via opening first resist mask second resist mask trench double layer comprising a barrier and a seed layer copper copper interconnects of the second metallization level via

Claims

1. Method for cleaning a metal surface by a dry-etching step, the method comprising the steps of: providing a substrate comprising a metal having a metal surface; supplying an etching gas comprising hydrogen- and oxygen-containing species; ionizing the hydrogen- and oxygen-containing species by a plasma to produce hydrogen and oxygen radicals in a predetermined ratio; and cleaning the metal surface by dry-etching using the hydrogen and oxygen radicals.
2. Method according to claim 1 , wherein the predetermined ratio of the oxygen to the hydrogen radicals is about 0.8 to 1.5.
3. Method according to claim 1 or 2, wherein the etching gas comprises NH3 and O2 as hydrogen- and oxygen-containing species supplied in a predetermined flow ratio.
4. Method according to claim 3, wherein the predetermined flow ratio of NH3 to O2 is between 1 :2 and 1 :10.
5. Method according to claim 1 or 2, wherein the plasma for producing the hydrogen and oxygen radicals is fed by a predetermined source power.
6. Method according to claim 5, wherein the predetermined source power is between 1200 and 3000 W.
7. Method according to claim 1 or 2, further comprising energizing the hydrogen and oxygen radicals.
8. Method according to claim 7, wherein the energizing is performed by an electrical field.
9. Method according to claim 8, wherein the electrical field is maintained by a predetermined bias power.
10. Method according to claim 9, wherein the predetermined bias power is between 100 and 500 W.
11. Method according to claim 1 or 2, wherein the dry-etching is performed under a predetermined pressure.
12. Method according to claim 11 , wherein the predetermined pressure is between 2 and 50 mTorr.
13. Method according to claim 1 or 2, wherein the substrate is maintained at low temperature during the dry etching.
14. Method according to claim 13, wherein the low temperature is below 100°C.
15. Method according to claim 1 or 2, wherein the metal surface is covered by metal modifications comprising metal and oxygen.
16. Method according to claim 15, wherein the metal is formed by a copper layer and the metal modifications are copper modifications comprising copper and oxygen.
17. Method according to claim 1 or 2, wherein the metal is formed by a copper layer.
18. Method according to claim 17, wherein the copper layer is at least partially covered by copper modifications comprising copper and oxygen.
19. Method according to claim 17 or 18, wherein the substrate further comprises an insulating layer partially covering the copper layer, the uncovered part of the copper layer forms the copper surface covered with the copper modifications.
20. Method according to claim 19, whereby the copper modifications are formed during an etching step of the insulating layer in an etching procedure preceding the dry-etching of the copper modifications.
21. Method according to claim 20, whereby the etching procedure for etching the insulating layer and the dry-etching for removing the copper modifications are performed in-situ.
22. Method according to claim 20 or 21 , whereby polymeric residues remaining from the preceding etching procedure are removed during the dry- etching of the copper modifications as well.
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