WO2004063089A2

WO2004063089A2 - Recessed microstructure device and fabrication method thereof

Info

Publication number: WO2004063089A2
Application number: PCT/IN2004/000005
Authority: WO
Inventors: Prem Pal; Sudhir Chandra; Suneet Tuli
Original assignee: Indian Institute Of Technology - Delhi (Iit)
Priority date: 2003-01-13
Filing date: 2004-01-05
Publication date: 2004-07-29
Also published as: WO2004063089A3

Abstract

The present invention provides a micro-electro-mechanical device with a recessed micromechanical structure and to a method of fabrication thereof. The present invention also provides silicon wafers provided with recessed micromechanical structures, which are useful in the field of micro-electro-mechanical systems. The present invention also provides a method for fabrication of micro-electro-mechanical device using micromachining techniques.

Description

RECESSED MICROSTRUCTURE DEVICE AND FABRICATION METHOD THEREOF

Field of the invention The present invention relates to a micro-electro-mechanical device with a recessed micromechanical structure and to a method of fabrication thereof. The present invention also relates to silicon wafers provided with recessed micromechanical structures, said silicon wafers being useful in the field of micro-electro-mechanical systems. The present invention also relates to a method for the fabrication of a micro-electro-mechanical device using micromachining techniques. Background of the invention

Micro-electro-mechanical systems (MEMS) have numerous applications in the field of aeronautics, space technology, biomedical and automobile industry. MEMS technology integrates different domains of electronics - sensors, signal processing/conditioning circuits, and actuator devices. The sensor component of the MEMS is generally utilized to measure physical parameters such as humidity, temperature, acceleration, pressure, vibration, etc. The control electronic circuit converts this measurement into a voltage/current level, which is then - utilized to open or close a valve (actuator).

Microelectromechanical systems (MEMS) components are being increasingly used in many electronic circuits as well as in many micro-sensor appUcations. For example, MEMS components are used as electromechanical motors, radio frequency (RF) switches, integrated inductors, pressure transducers and accelerometers etc. When the MEMS is an accelerometer, the device has a stationary MEMS element, and a movable MEMS element, a substantial portion of which is free from mechanical contact with the substrate and is therefore movable with respect to the stationary element. "The movable component is actuated in response to an external stimulus so as to vary the size of a capacitive air gap. The capacitance output of the MEMS device thereby provides an indication of the acceleration strength.

Microelectromechanical systems (MEMS) are devices fabricated using integrated circuit (IC) and silicon micromachining technology. Overall dimensions are of the order of millimeters and minimum feature sizes of the order of microns.

Silicon is the basic material for realizing these functions. As a result, the manufacturing of MEMS has received a tremendous impetus in modern times. The basic building blocks of silicon based sensors and actuators are micro-sized cantilever beams, diaphragms, bridges, suspended membranes, etc. These are configured to generate the required sensor/actuator function. Silicon is traditionally shaped into micro- three dimensional structures using bulk micro-machining and/or surface micro-machining processes.

A significant problem faced with sensors and actuators made of silicon is that of packaging andjhandling since the sensors and actuators comprise suspended microstructures. One solution that is practiced to minimize the problem of packaging is to secure the silicon wafers containing these microstructures in cavities. This solution minimizes the problem of damage during packaging or handling only to a certain degree. Handling and packaging processes still result in tremendous losses due to damage to the microstructures.

Fabrication of MEMS components using surface micro-machining_ comprises deposition of a sacrificial layer, such as silicon dioxide, onto a substrate, such as single crystal silicon which may have been covered with a layer of silicon nitride. A MEMS component material, for example polycrystalline silicon, is then deposited on the sacrificial layer, followed by a suitable conductor, such as aluminum, to form an electrical contact. The silicon layer is then patterned by standard photolithographic techniques and then etched by a suitable reactive ion etching plasma or by wet chemistry to define the MEMS structure and to expose the sacrificial layer, which may comprise silicon dioxide. The sacrificial layer is then etched to release the MEMS component.

However, traditional methods of surface machining using a surface layer to fabricate MEMS device suffers from several disadvantages. First, it requires the availability of an etching process capable of selectively etching the sacrificial layer without reacting with other materials that will ultimately form the MEMS device, thereby limiting the materials that may be used when fabricating the MEMS device. The use of a sacrificial layer also increases the quantity of materials required to form the MEMS device, thereby adding cost and complexity to the fabrication process. Another disadvantage is that an additional etching step is required to remove the sacrificial layer, thereby further reducing the efficiency of the fabrication process. Since the structure forming the movable MEMS element is deposited on top of the sacrificial layer, a significant amount of time is also required to completely undercut the sacrificial layer. In some processes, holes are first etched through the base of the movable MEMS element in order to permit the etching agent to access the sacrificial layer.

Another method used to fabricate MEMS components comprises bulk micromachining. This method comprises using a substrate such as a silicon wafer. The wafer is patterned to form the MEMS component. If additional layers are desired, surface fabrication techniques can be used. However, bulk machining processes take a longer time since additional processes need to be performed on the wafer to remove excess material therefrom.

A micro electromechanical systems structure is positioned essentially in the center of the MEMS die. Due to the fact that the micro electromechanical systems structure is comprised of extremely small sections of polysilicon and other such materials so that it is resilient, the micro electromechanical systems structure is extremely fragile and great care must be taken during fabrication, up to and including the final packaging steps, not to damage or contaminate the micro electromechanical systems structure.

MEMS structures on the surface of a die are susceptible to damage and particle contamination at all post wafer fabrication process stages. Protection of MEMS structures from damage and/or contamination during sawing process is a critical element of the fabrication process. The MEMS die must be carefully handled and protected before it is processed at the next step. The MEMS die is also susceptible to damage at the die attach process where the die is placed on a substrate, carrier, or inside a package. It is also important to devise a method by which losses due to damage to the microstructure during handling or packaging processes can be further reduced. Objects of the invention

The main object of the invention is to provide a microstructure for MEMS inside a cavity (also referred to as a "recessed microstructure"). It is a further object of the invention to provide a method for the fabrication of recessed microstructures which enables the losses due to damage during packaging and handling of the MEMS to be overcome.

It is another object of the invention to provide a recessed microstructure for MEMS which overcomes problems associated with packaging and handling processes. Summary of the invention

The present invention relates to a method of micromachining a recessed microelectromechanical system, also termed a MEMS device or a micromachine. The method comprises steps for forming a cavity in a substrate, such as a semiconductor substrate, where the MEMS is to be formed; forming a first level of the MEMS within the cavity; depositing a first layer of a material to blanket the first level of the MEMS; and forming a second level of the MEMS above the first layer with the second level of the MEMS being operatively connected (i.e. electrically connected and/or mechanically supported or engageable) to the first level of the MEMS. In preferred embodiments of the present invention, a step for patterning the first layer of sacrificial material by etching is provided prior to the step for forming the second level of the MEMS. This patterning of the first layer of sacrificial material allows the formation of shaped openings therein for molding or shaping functional elements in the second level of the MEMS during deposition thereof for forming electrical or mechanical interconnections between the first and second levels of the MEMS, or for forming engageable elements (e.g. meshed gears, engagement pins or coupled linkages) of the MEMS.

The present invention eliminates problems associated with damage due to packaging and handling associated with prior art MEMS usin^ surface / bulk micromachining techniques.

Accordingly, the present invention provides a recessed microstructure device comprising: i. a substrate having a cavity formed therein;, ii. a first conductive material with at least a portion thereof being located in said cavity; iii. a second conductive material spaced from said first conductive material, at least a portion of at least one of said first and second conductive materials being deflectable toward the other conductive material in response to an applied voltage; and iv. an insulating material within said cavity located intermediate to at least portions of said first and second conductive materials, said insulating material spacing said first conductive material from said second conductive material when said at least one of said first and second conductive material is deflected toward the other conductive material. In one embodiment of the invention, the substrate is a semiconductor substrate.

In another embodiment of the invention, a notched area is provided on said substrate to enable access for said first conductive material to extend into said cavity.

In another embodiment of the invention, an insulating material is provided between said first conductive material and said substrate. In yet another embodiment of the invention, at least one of said first and second conductive materials has a portion thereof affixed to said substrate and includes a flexure structure intermediate said portion thereof and a remainder of the conductive material. In another embodiment of the invention, said cavity is rectangular in shape. In a further embodiment of the invention, the said second conductive material is spaced from said first conductive material in a parallel orientation.

In another embodiment of the invention, said voltage is a DC bias voltage.

In another embodiment of the invention, the substrate is a single crystal silicon substrate, the said substrate having a cavity formed in at least one face thereof, with an insulating material being provided on at least a bottom surface of said cavity, a first conductive material, at least a portion thereof being formed on said insulating material; a second conductive material located in a vicinity of said first conductive material, said second conductive material being affixed to said substrate in areas other than said cavity, said second conductive material comprising a flexure structure and a membrane structure in which said flexure structure is in an area other than the area where said second conductive material is affixed to said substrate; and a second insulating material within said cavity and in contact with said first conductive material, said second insulating material being intermediate at least said first conductive material and said membrane structure of said second conductive material.

In another embodiment of the invention, the device comprises a substrate having a cavity formed therein, including a notched area in said substrate adjacent a side wall surface of said cavity; an electrode, at least a portion thereof being located adjacent a bottom surface of said cavity; and a conductive membrane/cantilever spaced from said electrode, said conductive membrane/cantilever comprising a flexure structure and a membrane structure, said membrane structure being deflectable toward said electrode in response to a voltage being applied to said electrode.

In another embodiment of the invention, a plane of a top surface of said flexure structure changes in response to said membrane structure being deflectable toward said electrode in response to a voltage being applied to said electrode.

In another embodiment of the invention, the device further includes an insulating material spacing said electrode from said membrane structure when said membrane structure is deflected toward said electrode.

In another embodiment of the invention, a notched area provides access for said electrode to extend into said cavity.

In another embodiment of the invention, a membrane structure is provided spaced from said electrode in a parallel orientation.

In another embodiment of the invention, wherein said device is a micro-electromechanical RF/DC switch or a relay. In another embodiment of the invention, wherein the recessed microstructure device comprises a substrate having a cavity formed therein; an insulating material on a bottom surface of said cavity; an electrode, at least a portion thereof being located adjacent said insulating material; and a conductive membrane/cantilever spaced from said electrode, said conductive membrane/cantilever comprising a flexure structure and a membrane structure, said membrane structure being deflectable toward said electrode in response to a voltage being applied to said electrode.

In another embodiment of the invention, the recessed microstructure device is a RF switch/relay. The invention also relates to a method for the fabrication of a recessed microstructure device comprising the steps of oxidising a substrate to obtain a oxide layer on the external surface thereof, subjecting the substrate to lithography followed by oxide etching and anisotropic etching to obtain a cavity on one surface of the substrate, reoxidising said lithographed, oxide etched and anisotropic etched substrate in order to blanket the cavity with an oxide layer, subjecting the substrate cavity to further lithography, oxide etching in order to obtain a first functional layer, if desired forming a diffusion layer (heavily boron doped) and then subjecting the substrate to further lithography and oxide etching to obtain a second functional layer, subjecting the cavity to anisotropic etching to obtain a notched area below said functional layers and then removing the oxide by further etching. In one embodiment of the invention, the substrate is a silicon wafer.

In another embodiment of the invention, the process is carried out with the prolonged boron diffusion process to prevent abrasion of the substrate surfaces during subsequent anisotropic etching. The said boron diffusion prevents the unwanted etching of convex edges of the cavity formed in earlier anisotropic etching step of single crystal silicon wafer. In yet another embodiment of the invention, the diffused layer comprises heavily doped p type layers.

In yet another embodiment of the invention, the semiconductor substrate is provided with an additional surface or buried epitaxial silicon layer of generally about 2-10 microns thickness. In yet another embodiment of the invention, conventional electronic circuitry is provided on the surface of the substrate.

In a further embodiment of the invention, the conventional circuitry comprises CMOS, BiCMOS, or bipolar circuitry. In yet another embodiment of the invention, the steps of etching are carried out by a wet or dry etching process using a patterned etch mask.

In a further embodiment of the invention, the patterned layer formed by the patterned etch mask is removed with a selective etchant comprising hydrofluoric acid (HF). In another embodiment of the invention, the anisotropic etching is carried out using potassium hydroxide (KOH), tetramethyl ammonium hydroxide (TMAH) or ethylenediamine pyrocatechol (EDP).

In another embodiment of the invention, dry etching is carried out using reactive ion etching with a plasma including XeF₂, SF₆ or Cl₂. BRIEF DESCRIPTION OF THE DRAWINGS

The accompanying drawings, which are incorporated into and form a part of the specification, illustrate several aspects of the present invention and, together with the description, serve to explain the principles of the invention. The drawings are only for the purpose of illustrating preferred embodiments of the invention and are not to be construed as limiting the invention.

In the drawings:

Figure 1 shows an enlarged schematic cross-section view of portions of conventional MEMS substrate prepared by bulk micromachining.

Figure 2 shows an enlarged schematic cross-section view of portions of conventional MEMS substrate prepared by surface micromachining.

Figure 3 shows an enlarged schematic cross-section view of an MEMS substrate according to the invention with a recessed microstructure provided therein.

Figures 4a to 4h show schematic cross-section views of a series of process steps for forming a MEMS device in a substrate cavity by a series of micromachining steps according to the method of the present invention.

Figure 5 shows a schematic cross-section views of an micro-relay fabricated using a recessed cantilever beam. DETAILED DESCRIPTION OF THE INVENTION

Figure 1 is an enlarged cross section of a multilayer MEMS device prepared by conventional bulk micromachining techniques. The device 10 essentially consists of a substrate 11 with a conducting element 12 being provided on top of the surface 11. The

MEMS device 13 is secured in a cavity formed by sealing the wafer containing the MEMS structure with another silicon wafer or other substrate containing the said cavity. Figure 2 is an enlarged cross section of a MEMS device prepared by conventional surface micromachining techniques. The device 20 essentially consists of a substrate 21 with a conducting element 22 being provided on top of the surface 21. The MEMS device 23 is secured in a cavity formed by sealing the substrate containing MEMS structure with another substrate containing the said cavity.

Figure 3 is an enlarged cross section of a multilayer MEMS device prepared by the method of the present invention. The device 30 essentially consists of a substrate 31 with a conducting element 32 being provided on top of the surface 31. A recess 34 is formed on the top of the surface abutting the conducting element 32. The MEMS device 33 is formed in the recess 34 formed in the substrate 31.

Figure 4a to 4h show schematic cross-section views of a series of process steps for forming a MEMS device in a substrate cavity by a series of micromachining steps according to the method of the present invention. It will be understood that Figures 4a-4h are schematic representations for illustrating the method of the present invention which are of general application for forming many different types of MEMS devices within a substrate cavity.

Figures 4a to 4h describe the formation of a MEMS device by a series of process steps that are designed to fabricate a MEMS device inside a cavity. It will be understood that the series of process steps described herein have been limited for clarity to only those process steps that are essential for understanding the present invention and do not include other process steps (e.g. photolithographic mask formation and removal steps) which are well known to the art and, therefore, need not be described in detail herein.

Figure 4a shows a semiconductor substrate 40 provided with a surface oxide layer 41. The semiconductor substrate 40 generally comprises mono crystalline silicon which can be either doped (i.e. n- or p-type doped) or undoped depending upon the type of MEMS to be formed thereon within a cavity, and whether or not electronic circuitry is to be formed on the substrate 40 and interconnected with the MEMS. The semiconductor substrate 40 can further include a surface or buried epitaxial silicon layer of generally about 2-10 microns thickness to provide high-quality material for forming the MEMS, or for forming electronic circuitry (e.g. CMOS, BiCMOS, or bipolar circuitry) upon a surface 41 (i.e. a device surface) of the substrate 40.

In Figure 4b one or more open cavities 43 are formed by etching. Each cavity 43 is formed by a wet or dry etching process using a patterned etch mask (not shown) which can comprise, for example, about 500 nanometers of silicate glass deposited from the decomposition of tetraethylortho silicate (TEOS) and densified by high temperature processing. For etching one or more cavities 43 into the substrate 40, the patterned layer can be removed with a selective etchant comprising hydrofluoric acid (HF). If a predetermined depth of the cavity 43 is to exceed more than a few microns, a wet etching process is generally preferred using an anisotropic etchant such as potassium hydroxide (KOH), tetramethyl ammonium hydroxide (TMAH) or ethylenediamine pyrocatechol (EDP). The anisotropic wet etchant can provide sloped sidewalls and a substantially planar bottom surface for the cavity 43 as shown in Figure 4b. The size and depth of the cavity 43 formed by the etching process will vary depending upon the type and complexity of a particular MEMS device to be formed. However, the size of the cavity 43 will generally have lateral dimensions from several microns to a few millimeters; and the depth will generally be in the range of about 1-20 microns.

In Figure 4c, the lithographed, oxide etched and anisotropic etched substrate 40 is subjected to reoxidation to blanket the cavity 43.

Referring now to Figure 4d, the reoxidized substrate obtained at the end of step 4c is subjected to further lithography, and oxide etching in order to obtain the first functional level of the MEMS. The lithographed and oxide etched substrate obtained in step 4d is then subjected to P+ diffusion. The first functional level of the MEMS is formed by depositing and patterning a first layer 48 of a micromachinable material (e.g. polysilicon/metal) above layer 46. The first micromachinable layer 48 is generally electrically conductive (e.g. doped polysilicon). It will be understood that the first functional level can be preceded by formation of a ground or voltage reference plane (generally termed a zeroth level) which is not shown in FIGS. 4a-4h for clarity.

In Figure 4g, the layer 48 is micromachined by patterning and anisotropic wet or dry etching (e.g. reactive ion etching with a plasma including XeF₂, SF₆ or Cl₂ for a polysilicon layer 48) to form one or more first-level functional elements 49 of the MEMS, with the first- level functional elements 49 in some instances being joined, for example, to form an electrostatic comb actuator or sensor. In FIG. 4f, micromachining of the first-level functional elements produces openings or trenches where material has been removed from the layer.

During the various stages (for example Fig. 4 e), boron diffusion has been carried out in order to ensure that the convex edges of cavity and surfaces of the substrate are not abraded during wet anisotropic etching.

In some preferred embodiments of the present invention, the MEMS can be integrated with electronic circuitry by providing additional process steps. The formation of integrated electronic circuitry (e.g. CMOS, BiCMOS or bipolar electronic circuitry) can comprise up hundreds of individual steps which are well known in the art and which have been standardized in the integrated circuit (IC) industry. Therefore, for clarity, only a few steps that are relevant to the present invention are discussed herein. Furthermore, this example of forming a MEMS device integrated with electronic circuitry formed on the same substrate is provided by way of illustration only, and is not meant to limit the present invention.

The matter set forth in the foregoing description and accompanying drawings is offered by way of illustration only and not as a limitation. The method can be applied to any recessed layers within a cavity for forming a MEMS device, including layers comprising photoresist, polyimide, silicon nitride, metals and metal alloys. Furthermore, the method of the present invention is applied to bulk micromachining processes for forming MEMS devices in a cavity.

Additional advantages and novel features of the invention will become apparent to those skilled in the art upon examination of the following description, or can be learned by practice of the invention. The advantages of the invention can be realized and attained by means of the instrumentalities and combinations particularly pointed out in the appended claims.

Claims

We claim:

1. A recessed microstructure device comprising: i. a substrate having a cavity formed therein; ii. a first conductive material with at least a portion thereof being located in said cavity; iii. a second conductive material spaced from said first conductive material, at least a portion of at least one of said first and second conductive materials being deflectable toward the other conductive material in response to an applied voltage; and iv. an insulating material within said cavity located intermediate to at least portions of said first and second conductive materials, said insulating material spacing said first conductive material from said second conductive material when said at least one of said first and second conductive material is deflected toward the other conductive material.

2. A recessed microstructure as claimed in claim 1 wherein the substrate is a semiconductor substrate.

3. A recessed microstructure as claimed in claim 1 wherein a notched area is provided on said substrate to enable access for said first conductive material to extend into said cavity.

4. A recessed microstructure as claimed in claims 1 to 3 wherein an insulating material is provided between said first conductive material and said substrate.

5. A recessed microstructure as claimed in any preceding claim wherein at least one of said first and second conductive materials has a portion thereof affixed to said substrate and includes a flexure structure intermediate said portion thereof and a remainder of the conductive material.

6. A recessed microstructure as claimed in claim 1 wherein the substrate is a single crystal substrate, the said substrate having a cavity formed in at least one face thereof, with an insulating material being provided on at least a bottom surface of said cavity, a first conductive material, at least a portion thereof being formed on said insulating material; a second conductive material located in a vicinity of said first conductive material, said second conductive material being affixed to said substrate in areas other than said cavity, said second conductive material comprising a flexure structure and a membrane structure in which said flexure structure is in an area other than the area where said second conductive material is affixed to said substrate; and a second insulating material within said cavity and in contact with said first conductive material, said second insulating material being intermediate at least said first conductive material and said membrane structure of said second conductive material.

7. A recessed microstructure as claimed in claim 1 wherein the device comprises a substrate having a cavity formed therein, including a notched area in said substrate adjacent a side wall surface of said cavity; an electrode, at least a portion thereof being located adjacent a bottom surface of said cavity; and a conductive membrane/cantilever spaced from said electrode, said conductive membrane/cantilever comprising a flexure structure and a membrane structure, said membrane structure being deflectable toward said electrode in response to a voltage being applied to said electrode.

8. A recessed microstructure as claimed in claim 7 wherein a plane of a top surface of said flexure structure changes in response to said membrane structure being deflectable toward said electrode in response to a voltage being applied to said electrode.

9. A recessed microstructure as claimed in claim 7 or 8 wherein the device further includes an insulating material spacing said electrode from said membrane structure when said membrane structure is deflected toward said electrode.

10. A recessed microstructure as claimed in claim 7 to 9 wherein a notched area provides access for said electrode to extend into said cavity.

11. A recessed microstructure as claimed in claim 7 to 9 wherein a membrane structure is provided spaced from said electrode in a parallel orientation.

12. A recessed microstructure as claimed in any preceding claim wherein the said cavity is rectangular in shape.

13. A recessed microstructure as claimed in any preceding claim wherein the said second conductive material is spaced from said first conductive material in a parallel orientation.

14. A recessed microstructure as claimed in any preceding claim wherein said voltage is a DC bias voltage.

15. A recessed microstructure as claimed in any preceding claim wherein said device is a micro-electro-mechanical RF and/or DC switch or relay.

16. A recessed microstructure as claimed in any preceding claim wherein the recessed microstructure device comprises a substrate having a cavity formed therein; an insulating material on a bottom surface of said cavity; an electrode, at least a portion thereof being located adjacent said insulating material; and a conductive membrane/cantilever spaced from said electrode, said conductive membrane/cantilever comprising a flexure structure and a membrane structure, said membrane structure being deflectable toward said electrode in response to a voltage being applied to said electrode.

17. A recessed microstructure as claimed in any preceding claim wherein the recessed microstructure device is a RF and/or DC relay or switch.

18. A method for the fabrication of a recessed microstructure device comprising the steps of oxidising a substrate to obtain a oxide layer on the external surface thereof, subjecting the substrate to lithography followed by oxide etching and anisotropic etching to obtain a cavity on one surface of the substrate, reoxidising said lithographed, oxide etched and anisotropic etched substrate in order to blanket the cavity with an oxide layer, subjecting the substrate cavity to further lithography, oxide etching in order to obtain a first functional layer, if desired depositing a diffusion layer and then subjecting the substrate to further lithography and oxide etching to obtain a second functional layer, subjecting the cavity to anisotropic etching to obtain a notched area below said functional layers and then removing the oxide by further etching.

19. A method as claimed in claim 18 wherein the substrate is a silicon wafer.

20. A method as claimed in claim 18 wherein the process is carried out with the continuous boron diffusion to prevent abrasion of the substrate surfaces and convex edges of the said cavity.

21. A method as claimed in claim 18 wherein the diffused layer comprises p+ (heavily doped) layers. ι

22. A method as claimed in claim 18 wherein the substrate is provided with an additional surface or buried epitaxial silicon layer of generally about 2-10 microns thickness.

23. A method as claimed in claim 18 wherein conventional electronic circuitry is provided upon a surface of the substrate.

24. A method as claimed in claim 23 wherein the conventional circuitry comprises CMOS, BiCMOS, or bipolar circuitry.

25. A method as claimed in any of preceding claims 18 to 24 wherein the steps of etching are carried out by a wet or dry etching process using a patterned etch mask.

26. A method as claimed in any of preceding claims 18 to 24 wherein the patterned layer formed by the patterned etch mask is removed with a selective etchant comprising hydrofluoric acid (HF).

27. A method as claimed in any preceding claim wherein the anisotropic etching is carried out using potassium hydroxide (KOH), tetramethyl ammonium hydroxide (TMAH) or ethylenediamine pyrocatechol (EDP).