WO2004063842A3 - Flexible hardware implementation of hash functions - Google Patents

Flexible hardware implementation of hash functions Download PDF

Info

Publication number
WO2004063842A3
WO2004063842A3 PCT/IL2004/000050 IL2004000050W WO2004063842A3 WO 2004063842 A3 WO2004063842 A3 WO 2004063842A3 IL 2004000050 W IL2004000050 W IL 2004000050W WO 2004063842 A3 WO2004063842 A3 WO 2004063842A3
Authority
WO
WIPO (PCT)
Prior art keywords
hash function
hardware implementation
hash functions
flexible hardware
function module
Prior art date
Application number
PCT/IL2004/000050
Other languages
French (fr)
Other versions
WO2004063842A2 (en
Inventor
Isaac Hadad
Original Assignee
Discretix Technologies Ltd
Isaac Hadad
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Discretix Technologies Ltd, Isaac Hadad filed Critical Discretix Technologies Ltd
Publication of WO2004063842A2 publication Critical patent/WO2004063842A2/en
Publication of WO2004063842A3 publication Critical patent/WO2004063842A3/en

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L9/00—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols
    • H04L9/06—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols the encryption apparatus using shift registers or memories for block-wise or stream coding, e.g. DES systems or RC4; Hash functions; Pseudorandom sequence generators
    • H04L9/0643—Hash functions, e.g. MD5, SHA, HMAC or f9 MAC
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L2209/00—Additional information or applications relating to cryptographic mechanisms or cryptographic arrangements for secret or secure communication H04L9/00
    • H04L2209/12—Details relating to cryptographic hardware or logic circuitry

Abstract

Embodiments of the invention provide a hash function module for carrying out hash function computations of at least two different hash function algorithms. According to some exemplary embodiments of the invention, the hash function module includes a read-write memory (102), an accumulating device (220), an adder (202), exclusive-or circuitry, one or more cyclic bit rotation devices, two arbitration devices, at least three data registers, one or more logical function circuitries, and a control circuit.
PCT/IL2004/000050 2003-01-16 2004-01-18 Flexible hardware implementation of hash functions WO2004063842A2 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
IL154010 2003-01-16
IL15401003A IL154010A0 (en) 2003-01-16 2003-01-16 Flexible hardware implementation of hash functions

Publications (2)

Publication Number Publication Date
WO2004063842A2 WO2004063842A2 (en) 2004-07-29
WO2004063842A3 true WO2004063842A3 (en) 2004-12-02

Family

ID=29798452

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/IL2004/000050 WO2004063842A2 (en) 2003-01-16 2004-01-18 Flexible hardware implementation of hash functions

Country Status (2)

Country Link
IL (1) IL154010A0 (en)
WO (1) WO2004063842A2 (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN112787799B (en) * 2020-12-30 2022-07-26 浙江萤火虫区块链科技有限公司 Poseidon Hash algorithm implementation circuit and implementation method thereof
CN113946313B (en) * 2021-10-12 2023-05-05 哲库科技(北京)有限公司 Processing circuit, chip and terminal of LOOKUP3 hash algorithm

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5155835A (en) * 1990-11-19 1992-10-13 Storage Technology Corporation Multilevel, hierarchical, dynamically mapped data storage subsystem
US5883901A (en) * 1995-09-22 1999-03-16 Hewlett-Packard Company Communications system including synchronization information for timing upstream transmission of data and ability to vary slot duration
US6307857B1 (en) * 1997-06-26 2001-10-23 Hitachi, Ltd. Asynchronous transfer mode controller and ATM control method thereof and ATM communication control apparatus

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5155835A (en) * 1990-11-19 1992-10-13 Storage Technology Corporation Multilevel, hierarchical, dynamically mapped data storage subsystem
US5883901A (en) * 1995-09-22 1999-03-16 Hewlett-Packard Company Communications system including synchronization information for timing upstream transmission of data and ability to vary slot duration
US6307857B1 (en) * 1997-06-26 2001-10-23 Hitachi, Ltd. Asynchronous transfer mode controller and ATM control method thereof and ATM communication control apparatus

Also Published As

Publication number Publication date
IL154010A0 (en) 2003-07-31
WO2004063842A2 (en) 2004-07-29

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