WO2004069698A3 - Transport system having shared load-lock front-end assembly - Google Patents

Transport system having shared load-lock front-end assembly Download PDF

Info

Publication number
WO2004069698A3
WO2004069698A3 PCT/US2004/002859 US2004002859W WO2004069698A3 WO 2004069698 A3 WO2004069698 A3 WO 2004069698A3 US 2004002859 W US2004002859 W US 2004002859W WO 2004069698 A3 WO2004069698 A3 WO 2004069698A3
Authority
WO
WIPO (PCT)
Prior art keywords
transport system
end assembly
shared load
lock front
provides
Prior art date
Application number
PCT/US2004/002859
Other languages
French (fr)
Other versions
WO2004069698A2 (en
Inventor
Gregory Kielczewski
Thomas Q Wolff
Jacob Cherepakho
Original Assignee
Aviza Tech Inc
Gregory Kielczewski
Thomas Q Wolff
Jacob Cherepakho
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Aviza Tech Inc, Gregory Kielczewski, Thomas Q Wolff, Jacob Cherepakho filed Critical Aviza Tech Inc
Publication of WO2004069698A2 publication Critical patent/WO2004069698A2/en
Publication of WO2004069698A3 publication Critical patent/WO2004069698A3/en

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005Apparatus not specifically provided for elsewhere
    • H01L21/67011Apparatus for manufacture or treatment
    • H01L21/67155Apparatus for manufacturing or treating in a plurality of work-stations
    • H01L21/67201Apparatus for manufacturing or treating in a plurality of work-stations characterized by the construction of the load-lock chamber

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)

Abstract

Thc present invention provides an improved transport system for transfer of media. More specifically, the present invention provides a transport system having shared load-lock front-end assembly or subsystem (100) suitable for transferring media, particularly semiconductor wafers, in a controlled environment such as a vacuum or low oxygen environment.
PCT/US2004/002859 2003-01-31 2004-02-02 Transport system having shared load-lock front-end assembly WO2004069698A2 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US44396903P 2003-01-31 2003-01-31
US60/443,969 2003-01-31

Publications (2)

Publication Number Publication Date
WO2004069698A2 WO2004069698A2 (en) 2004-08-19
WO2004069698A3 true WO2004069698A3 (en) 2005-03-24

Family

ID=32850814

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/US2004/002859 WO2004069698A2 (en) 2003-01-31 2004-02-02 Transport system having shared load-lock front-end assembly

Country Status (2)

Country Link
TW (1) TW200505776A (en)
WO (1) WO2004069698A2 (en)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE102004058557A1 (en) * 2004-12-03 2006-06-08 Asys Automatic Systems Gmbh & Co. Kg Transfer device for handling e.g. flat screen, has handling unit defined by shell, enclosure chamber defined by enclosure and shell chamber differentiated from shell, where two chambers form chambers of different pressure levels
DE102005039453B4 (en) 2005-08-18 2007-06-28 Asys Automatic Systems Gmbh & Co. Kg Machining plant of modular construction for flat substrates
JP4959457B2 (en) 2007-07-26 2012-06-20 東京エレクトロン株式会社 Substrate transport module and substrate processing system

Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4923584A (en) * 1988-10-31 1990-05-08 Eaton Corporation Sealing apparatus for a vacuum processing system
US4923352A (en) * 1988-03-31 1990-05-08 Kabushiki Kaisha N.M.B. Semiconductor System for manufacturing semiconductor under clean condition
US5202716A (en) * 1988-02-12 1993-04-13 Tokyo Electron Limited Resist process system
JPH0697258A (en) * 1992-09-17 1994-04-08 Hitachi Ltd Continuous vacuum processing device
US5364219A (en) * 1991-06-24 1994-11-15 Tdk Corporation Apparatus for clean transfer of objects
US5942013A (en) * 1996-09-13 1999-08-24 Tokyo Electron Limited Substrate processing system
US20020192056A1 (en) * 2001-06-13 2002-12-19 Applied Materials, Inc. Method and apparatus for transferring a semiconductor substrate

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5202716A (en) * 1988-02-12 1993-04-13 Tokyo Electron Limited Resist process system
US4923352A (en) * 1988-03-31 1990-05-08 Kabushiki Kaisha N.M.B. Semiconductor System for manufacturing semiconductor under clean condition
US4923584A (en) * 1988-10-31 1990-05-08 Eaton Corporation Sealing apparatus for a vacuum processing system
US5364219A (en) * 1991-06-24 1994-11-15 Tdk Corporation Apparatus for clean transfer of objects
JPH0697258A (en) * 1992-09-17 1994-04-08 Hitachi Ltd Continuous vacuum processing device
US5942013A (en) * 1996-09-13 1999-08-24 Tokyo Electron Limited Substrate processing system
US20020192056A1 (en) * 2001-06-13 2002-12-19 Applied Materials, Inc. Method and apparatus for transferring a semiconductor substrate

Also Published As

Publication number Publication date
TW200505776A (en) 2005-02-16
WO2004069698A2 (en) 2004-08-19

Similar Documents

Publication Publication Date Title
WO2003038869A3 (en) Universal modular wafer transport system
WO2008002780A3 (en) Batch processing platform for ald and cvd
SG159384A1 (en) Electropolishing and/or electroplating apparatus and methods
AU2003277185A1 (en) System for substrate processing with meniscus, vacuum, ipa vapor, drying manifold
WO2007143567A3 (en) Multiple slot load lock chamber and method of operation
WO2005010956A3 (en) Endeffectors for handling semiconductor wafers
AU2001290171A1 (en) High pressure processing chamber for semiconductor substrate
WO2004010476A3 (en) Substrate processing apparatus
TW200715448A (en) Vacuum processing apparatus, semiconductor device manufacturing method and semiconductor device manufacturing system
EP1396874A3 (en) Substrate carrier handler that unloads substrate carriers directly from a moving conveyor
AU2003245592A1 (en) Transfer chamber for vacuum processing system
EP0834907A3 (en) High vacuum dual stage load lock and method for loading and unloading wafers using a high vacuum dual stage load lock
WO2004107412A3 (en) Wafer treatment system having load lock and buffer
AU2003234260A1 (en) Robot for handling semiconductor wafers
WO2006054024A3 (en) Semiconductor wafer thinning
AU2003291698A1 (en) High pressure compatible vacuum check for semiconductor wafer including lift mechanism
WO2004051708A3 (en) Method and device for machining a wafer, in addition to a wafer comprising a separation layer and a support layer
WO2007009000A3 (en) Fluid deposition cluster tool
TW200707632A (en) Semiconductor device and forming method thereof
WO2007146848A3 (en) Surface modification of interlayer dielectric for minimizing contamination and surface degradation
EP1058291A3 (en) Load-lock with external staging area
WO2007112454A3 (en) Apparatus and method for processing substrates using one or more vacuum transfer chamber units
EP1065701A3 (en) Inert barrier for high purity epitaxial deposition systems
WO2007103870A3 (en) Bypass thermal adjuster for vacuum semiconductor processing
EP1182695A3 (en) Semiconductor processing module and apparatus

Legal Events

Date Code Title Description
AK Designated states

Kind code of ref document: A2

Designated state(s): AE AG AL AM AT AU AZ BA BB BG BR BW BY BZ CA CH CN CO CR CU CZ DE DK DM DZ EC EE EG ES FI GB GD GE GH GM HR HU ID IL IN IS JP KE KG KP KR KZ LC LK LR LS LT LU LV MA MD MG MK MN MW MX MZ NA NI NO NZ OM PG PH PL PT RO RU SC SD SE SG SK SL SY TJ TM TN TR TT TZ UA UG US UZ VC VN YU ZA ZM ZW

AL Designated countries for regional patents

Kind code of ref document: A2

Designated state(s): BW GH GM KE LS MW MZ SD SL SZ TZ UG ZM ZW AM AZ BY KG KZ MD RU TJ TM AT BE BG CH CY CZ DE DK EE ES FI FR GB GR HU IE IT LU MC NL PT RO SE SI SK TR BF BJ CF CG CI CM GA GN GQ GW ML MR NE SN TD TG

121 Ep: the epo has been informed by wipo that ep was designated in this application
122 Ep: pct application non-entry in european phase