WO2004081738A3 - Method and system for embedded disk controllers - Google Patents

Method and system for embedded disk controllers Download PDF

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Publication number
WO2004081738A3
WO2004081738A3 PCT/US2004/007119 US2004007119W WO2004081738A3 WO 2004081738 A3 WO2004081738 A3 WO 2004081738A3 US 2004007119 W US2004007119 W US 2004007119W WO 2004081738 A3 WO2004081738 A3 WO 2004081738A3
Authority
WO
WIPO (PCT)
Prior art keywords
processor
bus
coupled
high performance
controller
Prior art date
Application number
PCT/US2004/007119
Other languages
French (fr)
Other versions
WO2004081738A2 (en
Inventor
Larry L Byers
Paul B Ricci
Joseph G Kriscunas
Joseba M Desubijana
Gary R Robeck
Michael R Spaur
David M Purdham
Fredarico E Dutton
William W Dennin
Andrew Artz
Original Assignee
Qlogic Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US10/385,042 external-priority patent/US7099963B2/en
Application filed by Qlogic Corp filed Critical Qlogic Corp
Publication of WO2004081738A2 publication Critical patent/WO2004081738A2/en
Publication of WO2004081738A3 publication Critical patent/WO2004081738A3/en

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601—Interfaces specially adapted for storage systems
    • G06F3/0668—Interfaces specially adapted for storage systems adopting a particular infrastructure
    • G06F3/0671—In-line storage system
    • G06F3/0673—Single storage device
    • G06F3/0674—Disk device
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601—Interfaces specially adapted for storage systems
    • G06F3/0602—Interfaces specially adapted for storage systems specifically adapted to achieve a particular effect
    • G06F3/0626—Reducing size or complexity of storage systems
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601—Interfaces specially adapted for storage systems
    • G06F3/0628—Interfaces specially adapted for storage systems making use of a particular technique
    • G06F3/0655—Vertical data movement, i.e. input-output transfer; data movement between one or more hosts and one or more storage devices
    • G06F3/0658—Controller construction arrangements
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2213/00—Indexing scheme relating to interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F2213/0038—System on Chip

Abstract

A system for an embedded disk controller is provided. The system includes a first main processor operationally coupled to a high performance bus; a second processor operationally coupled to a peripheral bus; a bridge that interfaces between the high performance and peripheral bus; an external bus controller coupled to the high performance bus and operationally coupled to external devices via an external bus interface; an interrupt controller module that can generate a fast interrupt to the first main processor; a history module coupled to the high performance and peripheral bus for monitoring bus activity; and a servo controller that is coupled to the second processor through a servo controller interface and provides real time servo controller information to the second processor. The second processor may be a digital signal processor that is operationally coupled to the first main processor through an interface.
PCT/US2004/007119 2003-03-10 2004-03-09 Method and system for embedded disk controllers WO2004081738A2 (en)

Applications Claiming Priority (8)

Application Number Priority Date Filing Date Title
US10/385,022 2003-03-10
US10/385,022 US7080188B2 (en) 2003-03-10 2003-03-10 Method and system for embedded disk controllers
US10/385,042 US7099963B2 (en) 2003-03-10 2003-03-10 Method and system for monitoring embedded disk controller components
US10/384,991 US7457903B2 (en) 2003-03-10 2003-03-10 Interrupt controller for processing fast and regular interrupts
US10/384,991 2003-03-10
US10/385,056 2003-03-10
US10/385,042 2003-03-10
US10/385,056 US7219182B2 (en) 2003-03-10 2003-03-10 Method and system for using an external bus controller in embedded disk controllers

Publications (2)

Publication Number Publication Date
WO2004081738A2 WO2004081738A2 (en) 2004-09-23
WO2004081738A3 true WO2004081738A3 (en) 2005-12-15

Family

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Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/US2004/007119 WO2004081738A2 (en) 2003-03-10 2004-03-09 Method and system for embedded disk controllers

Country Status (2)

Country Link
US (6) US7457903B2 (en)
WO (1) WO2004081738A2 (en)

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