WO2004093179A1 - Method for forming high dielectric film - Google Patents

Method for forming high dielectric film Download PDF

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Publication number
WO2004093179A1
WO2004093179A1 PCT/JP2003/004919 JP0304919W WO2004093179A1 WO 2004093179 A1 WO2004093179 A1 WO 2004093179A1 JP 0304919 W JP0304919 W JP 0304919W WO 2004093179 A1 WO2004093179 A1 WO 2004093179A1
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WO
WIPO (PCT)
Prior art keywords
forming
dielectric film
substrate
process space
film
Prior art date
Application number
PCT/JP2003/004919
Other languages
French (fr)
Japanese (ja)
Inventor
Yoshihiro Sugita
Original Assignee
Fujitsu Limited
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Limited filed Critical Fujitsu Limited
Priority to PCT/JP2003/004919 priority Critical patent/WO2004093179A1/en
Priority to JP2004570901A priority patent/JPWO2004093179A1/en
Priority to CN03824483.7A priority patent/CN1689147A/en
Publication of WO2004093179A1 publication Critical patent/WO2004093179A1/en
Priority to US11/098,395 priority patent/US20050170665A1/en

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    • CCHEMISTRY; METALLURGY
    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/22Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the deposition of inorganic material, other than metallic material
    • C23C16/30Deposition of compounds, mixtures or solid solutions, e.g. borides, carbides, nitrides
    • C23C16/40Oxides
    • C23C16/405Oxides of refractory metals or yttrium
    • CCHEMISTRY; METALLURGY
    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/44Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
    • C23C16/455Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating characterised by the method used for introducing gases into reaction chamber or for modifying gas flows in reaction chamber
    • C23C16/45523Pulsed gas flow or change of composition over time
    • C23C16/45525Atomic layer deposition [ALD]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02109Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02172Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides
    • H01L21/02175Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides characterised by the metal
    • H01L21/02181Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides characterised by the metal the material containing hafnium, e.g. HfO2
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02225Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/0226Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
    • H01L21/02263Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
    • H01L21/02271Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
    • H01L21/0228Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition deposition by cyclic CVD, e.g. ALD, ALE, pulsed CVD
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/28008Making conductor-insulator-semiconductor electrodes
    • H01L21/28017Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
    • H01L21/28158Making the insulator
    • H01L21/28167Making the insulator on single crystalline silicon, e.g. using a liquid, i.e. chemical oxidation
    • H01L21/28194Making the insulator on single crystalline silicon, e.g. using a liquid, i.e. chemical oxidation by deposition, e.g. evaporation, ALD, CVD, sputtering, laser deposition
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/40Electrodes ; Multistep manufacturing processes therefor
    • H01L29/43Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/49Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET
    • H01L29/51Insulating materials associated therewith
    • H01L29/517Insulating materials associated therewith the insulating material comprising a metallic compound, e.g. metal oxide, metal silicate

Definitions

  • the present invention generally relates to the manufacture of semiconductor devices, and more particularly to the manufacture of semiconductor devices having high dielectric films.
  • the gate insulating film has a large physical Hi ?, but its electrical equivalent to a silicon oxide film, that is, its oxide film equivalent is small.
  • high dielectric film the use of so-called hi g hK dielectric film has been proposed.
  • Such a high-K dielectric film can be used for a DRAM cell having a small capacitor area and an ultra-fine memory cell capacitor. It is important to ensure sufficient capacitance.
  • such high- ⁇ dielectric films have been formed by ALD (Atomic Layer Deposition) or MOCVD using organometallic raw materials.
  • ALD Atomic Layer Deposition
  • MOCVD Metal Organic Chemical Vapor Deposition
  • the organometallic raw material molecules are chemically adsorbed on the surface of the substrate to be processed, and the thus chemically adsorbed raw material molecular layer having a thickness of one to two atomic layers is oxidized by an oxidizing agent. Desired hi g hK dielectric layers are repeatedly deposited in 1-2 atomic layers.
  • Such organometallic As the material of Amin-based source, such as tetra-dimethyl ⁇ Mi Roh hafnium (Hf [N (CH 3) 2] 4), tetra GETS chill ⁇ amino hafnium (H f [N (CH2CH3) 2] 4 ), Tetradimethinoleanoreminodinoreconidum (Zr [N (CH3) 2] 4), and tetradecylaminohafnium (Zr [N (CH2CH3) 2] 4) have been proposed. I have.
  • organometallic raw materials contain organic functional groups in the raw material molecules, there is a problem that a large amount of carbon remains in the formed high- ⁇ dielectric film.
  • Hf -N bond weaker than N-C bond for example adsorbed Hf [N (CHa) 2] 4 molecules, with an oxidizing agent such as H 2 0 and 0 2, 0 3 reaction
  • the desired H f 0 2 molecule layer is expected to be formed.
  • an amine-based organometallic raw material has a feature of easily reacting with hydrogen to precipitate a metal or a metal nitride.
  • the organic functional group is very efficiently desorbed from the metal element.
  • hydrogen gas is added to the material. It is conceivable to promote the elimination of the organic functional group during the metal element precipitation reaction on the surface of the substrate to be processed.
  • Non-Patent Document 2 Y. Rim, et al., IEDM pp.455-458, 2001
  • Non-Patent Document 3 Y. Oshita et al., J. Crys. Growth vol.233, p.292, 2001 Disclosure of the invention
  • a more specific object of the present invention is to minimize the amount of carbon remaining in a high- ⁇ dielectric film formed by MOCVD using an amine-based organometallic material.
  • An object of the present invention is to provide a method for forming a dielectric film.
  • Another object of the present invention is a method for forming a dielectric film using an amine-based organometallic material
  • An object of the present invention is to provide a method of forming a dielectric film including a step of introducing an oxidizing gas into the process space after the step (B).
  • the amine-based organometallic raw material molecule is adsorbed on the surface of the substrate to be processed, and in the step (B), the amine-based organic metal raw material is removed from the surface of the substrate to be processed.
  • the step (C) By performing the step (C) after the molecules are exhausted, carbon is efficiently removed from the film containing the metal element in the organometallic raw material molecules, which covers the surface of the substrate to be processed, and substantially removes carbon. Is obtained.
  • the desired low carbon concentration and halogen include such Rere dielectric film such as chlorine, especially in the hi g An hK dielectric film can be obtained.
  • FIG. 1 is a diagram showing a configuration of a MOC VD device used in the present invention
  • FIG. 2 is a flowchart showing a film forming method according to a first embodiment of the present invention
  • FIG. 3 is a diagram showing a process sequence corresponding to the flowchart of FIG. 2
  • FIG. 4 is a flowchart showing a film forming according to a second embodiment of the present invention
  • FIG. 5 is a diagram showing a process sequence of a method
  • FIG. 5 is a diagram showing a process sequence of a film forming method according to a third embodiment of the present invention
  • FIG. 6 is a view schematically showing an MOCVD apparatus used in a fourth embodiment of the present invention
  • FIG. 7 is a view showing a process sequence of a film forming method according to a fourth embodiment of the present invention
  • D is a view showing a manufacturing process of the high-speed semiconductor device according to the fifth embodiment of the present invention
  • FIGS 9A to 9C are views showing a manufacturing process of a MOS capacitor according to a sixth embodiment of the present invention.
  • FIG. 10 is a diagram showing a configuration of a MOCVD apparatus according to a tenth embodiment of the present invention.
  • FIG. 1 shows a schematic configuration of a MOCVD apparatus 10 used in a first embodiment of the present invention.
  • a MOCVD apparatus 10 includes a processing chamber 11 which defines a process space 11A and is exhausted from an exhaust port 11B, and a substrate holding a substrate to be processed 3 ⁇ 4W is provided in the process space 11A.
  • a holding table 12 is provided.
  • a substrate such as a resistance heater or a heating lamp is incorporated in the substrate holder 12.
  • An exhaust line LV including an exhaust valve EV is connected to the exhaust port 11B.
  • a shower head 13 made of quartz glass or the like is provided in the process space 11A so as to face the processing target W in the substrate holding table 12, and the shower head 13 has a line Li and a Hf
  • An organometallic raw material gas such as [N (CH) 3 ) 2] 4 (hereinafter referred to as TDE AH), an oxidizing gas such as H 2 O from the line L 2, and a hydrogen gas from the line L 3 Supplied with nitrogen carrier gas.
  • TEDAH is held in a raw material bottle 14 ⁇ in the form of a liquid raw material, and TEDAH in the raw material bottle 14 ⁇ is bubbled by nitrogen gas supplied from a line 15 ⁇ via a mass flow controller 15a.
  • the formed TEDAH gas is supplied to the shower head 13 together with the nitrogen carrier gas supplied from the line 161 via the mass flow controller 16a, to the valve 17a and the valve 17a. And feed through said line LI.
  • H 2 0 liquid feedstock prior ⁇ material Potoru 14 that is, held in the form of water, is by Ri Paburingu from line 15 2 to the nitrogen gas supplied through a mass flow controller 15 b. Consequently formed H 2 0 gas, i.e. water vapor, a nitrogen carrier gas from the line 16 2 is supplied through a mass flow controller 16 b are both the head 13 to the shower, valve 17 b and the line L2 Supplied through.
  • the said line Li, L 2, the L 3 valve LVi, LV 2, LV 3 are provided respectively, the vent valve VVi on the upstream side of the valve LVi is the vent on the upstream side of the valve LV 2 valve VV 2 is, on the further upstream side of said valve LV 3 is provided with a base Ntobarubu V Vs.
  • a HfO2 film is formed on the surface of the substrate W under a pressure of 133 Pa (lTorr) at a substrate temperature of 200 to 550 ° C. Typically, it is formed to a thickness of 2 to 5 nm.
  • FIG. 2 is a Furochiya one preparative showing a H f 0 2 film deposition process using FIG.
  • the valve LVi ⁇ LV 3 in the first step 1 is closed, further exhaust Norbu EV is being opening force, the processing space 11A inside the processing vessel 11 is evacuated.
  • the vent valve VVi ⁇ VV 3 is all open, as a result, IiiiB line Li ⁇ L 3 Medium Me gas is discharged out of the system.
  • step S 2 the exhaust pulp EV and vent pulp VVi is closed in step S 2, are opened further valve LVi, material gas containing TDEAH molecules through the line Li in the process space 11 A is supplied.
  • the TDEAH molecules contained in the source gas are chemically adsorbed on the surface of the substrate W to be processed, and a layer of the source molecules is formed so as to cover the substrate surface.
  • step S3 the exhaust valve EV and the vent valves VVi to V V 3 is opened and further the valve L Vi ⁇ LV 3 is closed, the processing space 1 1 A is discharged.
  • step S 4 Further closing the exhaust valve EV and the vent valve VV 2 in step S 4, the hydrogen gas in the line 1 5 3 to the processing space 1 1 A further pulp LV 3 is Hirakika is nitrogen line 1 6 3 It is supplied as a carrier gas, typically diluted to a concentration of 3%.
  • the hydrogen gas supplied in this manner causes a reaction represented by the above formula (1) with the TD EAH molecule adsorbed on the surface of the substrate W to be processed, and as a result, the TD EAH molecule
  • the organic functional group containing carbon is removed from the substrate, and a layer made of metal Hf is formed so as to cover the surface of the substrate W to be processed.
  • step S 5 opened the exhaust valve EV and the vent valve VVi ⁇ VV 3 all in step S 5, by more the valve L Vi ⁇ LV 3 is closed, pre-Symbol process space 1 1 A is exhausted, further steps exhaust valve EV and Bentobanorebu VV 2 in S 6 is closed, the pulp LV 2 is opened.
  • H 20 gas is introduced from the line L 2 into the process space 11 A, and the introduced H 20 gas is a metal H f layer formed on the surface of the substrate W to be processed. Is converted into an HfO 2 film.
  • step S 6 After addition of the step S 6, the process returns to step S 1, opening the exhaust pulp EV Oyo Pi vent valve VVi ⁇ VV 3, further by a child closing the valve L Vi ⁇ LV 3, the processing space 1 1 Exhaust A.
  • FIG. 3 is a diagram showing a process sequence according to the first embodiment of the present invention.
  • the exhaust step of step 3 is always performed, and then the hydrogen gas introduction step of step 4 is performed.
  • the residual TDEAH raw material was substantially completely removed from the process space 11A, and an explosive reaction between the hydrogen gas and the residual TDEAH raw material and the reaction occurred From particles Raw problems are effectively suppressed.
  • a purge gas such as a nitrogen gas or an Ar gas may be introduced into the process space 11A to improve a discharge efficiency of the residual TDE AH raw material.
  • the TDEAH raw material molecules adsorbed on the surface of the substrate to be processed W react with hydrogen gas to form an organic functional group. Since no carbon remains in the H f O 2 film obtained in Step 6 because of the desorption, it is possible to obtain a high quality H f O 2 film with few defects using an organometallic material. to become.
  • the H f 0 2 carbon concentration in the film is 1 X 1 0 19 confirmation of c m-3 Ru is suppressed below It has been is.
  • H f 0 2 film formed by the Do not one used by the chloride as a raw material therefore, Les such include halogen such as chlorine.
  • the TED having a thickness of one molecular layer is formed on the surface of the substrate to be treated.
  • the TEDEAH film for one molecular layer is oxidized to form a HfO2 film having a thickness for one molecular layer in the oxidation step of Step 6, FIG. 2 or Process 3 is the so-called ALD (Atomic Layer Deposition) process.
  • the present invention is not limited to the ALD process, and the process of the step 2 is performed by treating the substrate to be treated;), an adsorption TED AH layer having a thickness corresponding to a plurality of molecular layers is formed on the SW. It can also be performed as follows.
  • TDEAH was used as an amino-based organometallic raw material for Hf, but the present invention is not limited to such a specific organometallic raw material.
  • the organometallic raw material of H f tetraethylenamino hafnium (H f [N (CHaCHs) 2] 4) or the like can be used.
  • the present invention is not limited to the formation of H f 0 2 film using Amino-based organic metal source of H f, tetradimethylaminotitanium aluminosilicate zirconium (Z r [N (CH 3 ) 2] 4), Tetoraje such as chill ⁇ amino hafnium (zr [N (C H2C H3 ) 2] 4), it is also effective when using ⁇ amino-based organic metal source of Z r to form a Z r 0 2 film.
  • the present invention not only the formation of H f 0 2 film or Z R_ ⁇ 2 film, H f S i O 4 film or Z r S i .theta.4 film silicate such as film, news Ore formation of aluminate film such as H f ⁇ 1 2 0 5 and Z r A 1 2 ⁇ ⁇ , be useful.
  • organometallic raw material of No. 1 trimethylaluminum represented by the chemical formula A 1 (CHs) 3 is known, and as the raw material of Si, tetramethylaluminum represented by the chemical formula S i C 14 is known. Chlorosilane and the like are known.
  • aluminate film is formed by forming a H f 0 2 molecule layer in step I of the process sequence of FIG. 3, in step II S i 0 2 or A 1 2O3
  • a desired compound film can be obtained.
  • the threshold value fluctuates due to diffusion into the channel region in the heat treatment process after the polysilicon gate electrode and after the boron (B) force contained in the gate electrode. Have been.
  • the most typical solution to this problem is to suppress the diffusion of B by including nitrogen (N) in the gate oxide.
  • nitrogen can be easily contained in the gate oxide film. That is, when introducing hydrogen gas, which is a feature of the present invention, by supplying about 1 to 10% ammonia (NH 3 ) gas, 1 ⁇ 10 21 cm ⁇ 3 or more of nitrogen is contained in the film. Can be contained.
  • Figure 4 is a view to view the formation process sequence H f 0 2 film according to the second embodiment of the present invention.
  • step 4 and the process of step 6 are interchanged. Therefore, immediately after the exhaust process of step 3, the oxidation process of step 6 is performed. After the oxidation step 6, the exhaust step of step 5 is performed, and then the hydrogen gas introduction step of step 4 is performed.
  • step 4 hydrogen molecules are adsorbed on the HfO2 film formed in the previous process, and the excess hydrogen molecules are discharged into the process space 1 by the exhaust process in step 1 of the next stage II. Removed from 1A.
  • Step 2 of Step II TD EA is added to the process space 11 A.
  • an amino-based organometallic material of H f such as H
  • the above reaction (1) occurs when the TE DAH molecule is adsorbed on the previously formed H f O 2 film, and the organic functional group is removed. Desorbs and deposits metal Hf.
  • the metal Hf layer composed of the metal Hf adsorbed in step 6 is oxidized to reduce the carbon concentration contained in the film. low, it is possible to obtain a H f 0 2 film excellent film quality.
  • amino-based organic metal raw material is not limited to TED Arufaita, also film manufactured also H f 0 2 film used in the previous embodiment also in this embodiment Not something.
  • Figure 5 is a view to view the formation process sequence H f 0 2 film according to a third embodiment of the present ⁇ .
  • steps 1 to 6 are performed in the same order as in FIG.
  • stage II immediately after the evacuation process in step 1, the hydrogen gas introduction process in step 4 is executed, and after the evacuation process in step 3, the TED II introduction process in step 2 is executed.
  • the exhaust step of Step 5 is executed, and thereafter, the TED AH introduction step of Step 4 is executed.
  • the hydrogen gas introduction step is performed before and after the amine-based organometallic material introduction step, so that the desorption of the organic functional group from the organometallic material molecules adsorbed on the substrate to be processed is ensured.
  • the amount of carbon remaining in the resulting high-K dielectric film such as HfO2 can be reliably minimized.
  • FIG. 6 is a simplified diagram showing the outline of the MOC VD device 10A used in the present embodiment
  • FIG. 7 shows the process of forming the Hf02 film performed by the MOC VD device of FIG. In the figure is there.
  • the MO CVD apparatus 10 has substantially the same configuration as the apparatus 10 in FIG. 1, but only the gas supply lines Li and L 2 are used, and the gas supply is performed. The difference is that the line L3 is omitted.
  • similarly TD E AH in the previous embodiment to the line Li is supplied to the line L 2, in addition to hydrogen gas H 2 0 gas, together with the nitrogen carrier gas Supplied. Or wherein the line L 2 is supplied with hydrogen gas and oxygen gas. The following description is made for the case of supplying the H 2 0 gas and hydrogen gas to the line L 2.
  • the TD EAH source gas is introduced into the process space via the line Li in the step 12, and At 3, excess TD EAH source gas in the process space 11A is removed by exhaust.
  • step 14 H 20 gas and hydrogen gas are introduced into the process space 11A together with the nitrogen carrier gas from the line L2, so that the process space 11 In A, the TD EAH molecular layer covering the surface of the target substrate W is oxidized, and at the same time, the organic functional group is eliminated.
  • the Hf 0 2 having a low carbon concentration is formed on the substrate W to be processed.
  • High-K dielectric films are efficiently formed.
  • 8A to 8D show a manufacturing process of an ultra-high-speed MOS transistor according to a fifth embodiment of the present invention.
  • a p-type well defined by a device isolation region 2 IB is formed as a device region 21 A on a silicon substrate 21, and the silicon substrate 21 is described above.
  • the substrate to be treated is introduced into the MOC VD apparatus 10 shown in FIG.
  • a gate insulating film 22 made of a high-K dielectric film such as a silicon film or an aluminate film is formed.
  • a polysilicon film 23 is formed on the gate insulating film 22 in a similar manner.
  • the polysilicon film 23 is patterned to form a polysilicon gate electrode pattern 23 G, and the tfrf self-gate electrode pattern 23 G is masked in the element region 21 A.
  • diffusion regions 2 la and 21 b are formed in both the gate electrode 23 G and the device region 21 A.
  • the underlying high-K dielectric film 22 is also patterned into a shape corresponding to the gate electrode 23 G, and the gate insulation is formed.
  • a film pattern 22G is formed.
  • side wall insulating films 24 A and 24 B are formed on both side walls of the gate electrode pattern 23 G, and the good electrode pattern 23 G and the side wall insulating film 24 A are further formed.
  • the sidewall insulating films 24A and 24B in the element region 21A are implanted.
  • the n + -type diffusion regions 21 c and 21 d are formed outside of the substrate so as to partially overlap the diffusion regions 21 a and 21 b, respectively.
  • a metal layer such as Co is deposited on the structure of FIG. 8C, and after a short-time heat treatment, it is removed, whereby the surface of the diffusion regions 21 c and 21 d is removed. Then, a silicide region 21S is formed. Such a silicide region 21S is also formed on the gate electrode 22G.
  • the MOS transistor formed in this way is used as a gate insulating film 22 G
  • the gate insulating film 22 even when up miniaturized to lm or less has sufficient physical, gate leakage current is increased Problem is avoided.
  • the gut insulating film 22 is high-K dielectric film such as H f 0 2, the gate length 0.
  • FIGS 9A to 9C show a manufacturing process of a MOS capacitor 40 according to a sixth embodiment of the present invention.
  • an insulating film 42 made of a silicon oxide film or the like is formed on the silicon substrate 41 on which the diffusion region 41A is formed, and the diffusion region 4 is formed in the insulating film 42.
  • a contact hole is formed to expose 1A.
  • a p-type corresponding to the conductivity type of the diffusion region 41A is formed on the insulating film 42 so as to contact the diffusion region 41A via the contact hole.
  • an n-type doped polysilicon lower electrode 43 is formed.
  • the silicon substrate 41 having the structure of FIG. 9A is introduced into the processing vessel 11 of the MOCVD apparatus 10 of FIG. , or by performing the process described in FIGS. 4-7, the policy silicon lower electrode 4 3 surfaces, H f 0 2 Mgh-K dielectric film capacity Sita insulating film 4 4 force 2 made of such It is formed to a thickness of 3 nm.
  • a MOS capacitor 40 is obtained.
  • the high-K dielectrics film such as H f 0 2 used as a capacitor insulating film 4 4
  • impurities in the organic metal raw material origin, such as carbon of rie leakage current
  • Small and highly reliable films can be obtained.
  • the formation of voids in the film due to oxidation of carbon is effectively suppressed by the carbon removing step, and as a result, electric field concentration in such voids is avoided.
  • the capacitor insulating film 44 is formed by adsorption and oxidation of the organic metal source gas, even if the lower electrode 43 has a complicated shape, the capacitor insulating film 44 is uniform. It can be formed with an appropriate film thickness.
  • Such a capacitor can form a DRAM.
  • FIG. 10 shows the configuration of the MOC VD device 60 according to the seventh embodiment of the present invention.
  • the same parts as those described above are denoted by the same reference numerals, and description thereof will be omitted.
  • the MOCVD apparatus 60 is an apparatus for batch processing, and has a processing vessel 61 for holding a large number of substrates W to be processed in a process space 61A.
  • the processing container 61 is exhausted through an exhaust pulp EV at an exhaust port 61B, and a heater 62 is provided outside the processing container 61.
  • the amine-based organometallic raw material molecules are adsorbed on the surface of the substrate to be processed, and the amine-based organic metal raw material molecules pre-adsorbed after exhausting the amine-based organic metal raw material molecules from the surface of the processed substrate
  • hydrogen gas to act on the organometallic raw material molecule
  • carbon is efficiently removed from the film containing the metal element in the organometallic raw material molecule, which covers the surface of the substrate to be processed, and substantially removes carbon.
  • the result is a film that does not contain any. Therefore, a desired dielectric film can be obtained by oxidizing the film thus obtained.
  • the step of applying the hydrogen gas when the step of applying the hydrogen gas is performed, since the amine-based organic raw material gas that generates an explosive reaction with the hydrogen gas is removed from the process space on the surface of the substrate to be processed, the generation of particles and the like is prevented. No problem arises.

Abstract

A method for forming a high-K dielectric film by the MOCVD method using an amine-based organic metal compound material, which comprises a step of supplying a raw material gas containing the amine-based organic metal compound material to a process space wherein a surface of a substrate to be treated is exposed, to thereby allow the surface of the substrate to be treated to adsorb the amine-based organic metal compound, a step of supplying a hydrogen gas to the surface of the substrate, and a step of supplying an oxidizing gas to the process space, to thereby form a high-K dielectric film on the surface of the substrate. The method allows the minimization of the amount of carbon remaining in the film.

Description

明細書  Specification
高誘電体膜の形成方法 技術分野  Method of forming high dielectric film
本発明は一般的に半導体装置の製造に係り、 特に高誘電体膜を有する半導体装 置の製造に関する。  The present invention generally relates to the manufacture of semiconductor devices, and more particularly to the manufacture of semiconductor devices having high dielectric films.
微細化技術の進歩に伴い、 今日では 0. 1 を切るゲート長を有する超微細 化 ·超高速半導体装置の製造が可能になっている。 このような超微細化半導体装 置において超高速動作を実現するためには、 ゲート絶縁膜の厚さをスケーリング 則に従って 1 n mあるいはそれ以下まで減少させる必要があるが、 このような非 常に薄いグート絶縁膜を使った場合、 ゲート絶縁膜を通過してトンネル電流が流 れ、 ゲートリーク電流が増大する問題が生じる。  With advances in miniaturization technology, it is now possible to manufacture ultra-miniaturized and ultra-high-speed semiconductor devices with gate lengths less than 0.1. To achieve ultra-high-speed operation in such ultra-miniaturized semiconductor devices, it is necessary to reduce the thickness of the gate insulating film to 1 nm or less according to the scaling rule. When an insulating film is used, a tunnel current flows through the gate insulating film, causing a problem that a gate leakage current increases.
そこでこの問題を解決するために、 ゲート絶縁膜として、 従来のシリコン酸化 膜の代わりに、 物理的な Hi?は大きくてもシリコン酸化膜に換算した場合の電気 的,、 すなわち酸化膜換算 が小さい高誘電体膜、 いわゆる high-K誘電体 膜を使うことが提案されている。このような high-Κ誘電体膜としては、 Z r 02, H f 02, A 1 2O3などの、 比誘電率が大きく、 またパンドギヤップの大きい金属 酸化膜、 あるいは Z r S i 04, H f S i 04などの金属シリケ一ト膜、 あるいは 金属アルミネート膜などが有望である。 In order to solve this problem, instead of a conventional silicon oxide film, the gate insulating film has a large physical Hi ?, but its electrical equivalent to a silicon oxide film, that is, its oxide film equivalent is small. high dielectric film, the use of so-called hi g hK dielectric film has been proposed. Such high-kappa dielectric film, Z r 0 2, H f 0 2, A 1 , such as 2O3, the dielectric constant is large, Pandogiyappu large metal oxide film or Z r S i 0 4,, such as H f S i 0 4 such as a metal silicate Ichitomaku or metal aluminate film, is promising.
またこのような high-K誘電体膜は、 キャパシタ面積の小さな、 超微細ィ匕メモ リセルキャパシタを有する D RAMセルにぉレヽても、 トンネル電流によるキャパ シタリーク電流の増大を抑制しつつメモリセルキャパシタに十分なキャパシタン スを確保するのに重要である。 背景技術  In addition, such a high-K dielectric film can be used for a DRAM cell having a small capacitor area and an ultra-fine memory cell capacitor. It is important to ensure sufficient capacitance. Background art
従来、 このような high-Κ誘電体膜は有機金属原料を使った A LD (原子層堆 積) 法あるいは MO CVD法により行われている。 A L D法では、 有機金属原料 分子が被処理基板表面に化学吸着され、 このようにして化学吸着された 1〜 2原 子層分の厚さを有する原料分子層を酸化剤により酸化させることにより、 所望の high-K誘電体層が、 1〜2原子層ずつ繰り返し成膜される。 Conventionally, such high-Κ dielectric films have been formed by ALD (Atomic Layer Deposition) or MOCVD using organometallic raw materials. In the ALD method, the organometallic raw material molecules are chemically adsorbed on the surface of the substrate to be processed, and the thus chemically adsorbed raw material molecular layer having a thickness of one to two atomic layers is oxidized by an oxidizing agent. Desired hi g hK dielectric layers are repeatedly deposited in 1-2 atomic layers.
このような有機金属原料としてはァミン系の原料、 例えばテトラジメチルァミ ノハフニウム (Hf [N (CH3) 2] 4) , テトラジェチルァミノハフニウム (H f [N (CH2CH3) 2] 4), テトラジメチノレアノレミノジノレコニゥム(Z r [N (C H3) 2] 4) , テトラジェチルァミノハフニウム (Z r [N (CH2CH3) 2] 4) などの使用が提案されている。 Such organometallic As the material of Amin-based source, such as tetra-dimethyl § Mi Roh hafnium (Hf [N (CH 3) 2] 4), tetra GETS chill § amino hafnium (H f [N (CH2CH3) 2] 4 ), Tetradimethinoleanoreminodinoreconidum (Zr [N (CH3) 2] 4), and tetradecylaminohafnium (Zr [N (CH2CH3) 2] 4) have been proposed. I have.
しかしながら、 これらの有機金属原料は原料分子中に有機官能基を含むため、 形成された high-Κ誘電体膜中に多量の炭素が残留する問題を生じる。  However, since these organometallic raw materials contain organic functional groups in the raw material molecules, there is a problem that a large amount of carbon remains in the formed high-Κ dielectric film.
理論的には、 Hf —N結合は N— C結合よりも弱いため、 例えば吸着した Hf [N (CHa) 2] 4分子を、 H20や 02, 03などの酸化剤を使って反応 Theoretically, Hf -N bond weaker than N-C bond, for example adsorbed Hf [N (CHa) 2] 4 molecules, with an oxidizing agent such as H 2 0 and 0 2, 0 3 reaction
[N (CHs) 2] 4+ 2 H20→H f O2+ 4 H-N (CH3) 2、 あるいは [N (CHs) 2] 4+ 302→H f 02+40-N (CH3) 2 [N (CHs) 2] 4+ 2 H 2 0 → H f O 2+ 4 HN (CH 3 ) 2 or [N (CHs) 2] 4+ 30 2 → H f 02 + 40-N (CH 3 ) 2
により酸化すれば、 所望の H f 02分子層が形成できることが予想される。 If oxidized, the desired H f 0 2 molecule layer is expected to be formed.
すなわち原料分子中の H f — N結合よりも酸化反応の反応性生物中に含まれる N— C結合の方が安定なため、 膜中に炭素を残すことなく Hf O2膜が形成でき ると期待される。 In other words, since the N—C bond contained in the reaction product of the oxidation reaction is more stable than the H f —N bond in the raw material molecule, an HfO 2 film can be formed without leaving carbon in the film. Be expected.
しかしながら、 先にも述べたように、 このような有機金属原料を使って形成し た high-K誘電体膜では、膜中に有機官能基に起因する炭素の残留が避けられず、 膜中に残留炭素により欠陥が形成されてしまう。 またこれらの残留炭素が後の処 理工程で酸化されて除去された場合、 膜中に空孔が形成されるなどの問題が生じ る。このような空孔を含む膜は力学的にも化学的にも不安定で、 high-K誘電体膜 を使つた半導体装置の信頼性が低下する問題が生じる。また空孔の存在は Mgh-K 誘電体膜の比誘電率を低下させる。 However, as mentioned earlier, in a high-K dielectric film formed using such an organometallic raw material, carbon remaining due to organic functional groups in the film is inevitable. Defects are formed by the residual carbon. Further, when these residual carbons are oxidized and removed in a later processing step, there arises a problem that pores are formed in the film. Films containing such vacancies are mechanically and chemically unstable, causing a problem that the reliability of semiconductor devices using high-K dielectric films is reduced. In addition, the presence of vacancies lowers the relative dielectric constant of the M g hK dielectric film.
例えば Hf [N (CHs) 2] 4と酸素ガスとを原料としてシリコン基板表面に H f O2膜を 200〜550°Cの基板温度で 3〜5 nmの膜厚に、約 1 33 P a (1 To r r)のプロセス圧の下で毎分数ナノメ一トルの成長速度で成長させた 、 膜中に含まれる残留炭素濃度は 1 X 1020cm-3〜l X 1021cm-sにおよぶこと 力 本発明の発明者による本発明の基礎となる研究において見出されている。 一方、 Mgh-K誘電体膜を残留炭素を含まないように形成するために、有機金属 原料の代わりに H f C l 4や Z r C 14などの塩化物を使う方法も提案されている。 しかし、 このような塩化物を原料に使つた;^、 得られた high-K誘電体膜中に 塩素が残留することがあり、 high-K誘電体膜の近傍領域において腐食等の問題を 生じる恐れがある。 For example Hf [N (CHs) 2] 4 and H f O 2 film on the silicon substrate surface and oxygen gas as raw materials to a thickness of 3 to 5 nm at a substrate temperature of 200 to 550 ° C, about 1 33 P a Grown at a growth rate of several nanometers per minute under a process pressure of (1 To rr), the residual carbon concentration in the film ranges from 1 X 10 20 cm- 3 to l X 10 21 cm- s Power has been found in the work underlying the present invention by the inventor of the present invention. On the other hand, in order to form the Mgh-K dielectric film without containing residual carbon, the organic metal How to use a chloride, such as H f C l 4 and Z r C 1 4 in place of the raw material has been proposed. However, when such a chloride is used as a raw material; ^, chlorine may remain in the obtained high-K dielectric film, causing a problem such as corrosion in a region near the high-K dielectric film. There is fear.
—方、 ァミン系有機金属原料は、 水素と容易に反応して金属もしくは金属窒化 物を析出させる特徴を有することが公知である。  On the other hand, it is known that an amine-based organometallic raw material has a feature of easily reacting with hydrogen to precipitate a metal or a metal nitride.
例えば Hf [N (CH3) 2] 4と水素ガスとが混合された場合、 反応 For example, when Hf [N (CH 3 ) 2] 4 and hydrogen gas are mixed,
Hf [N (CHs) 2] 4+2H2→Hf + 4H-N (CHs) 2 (1) あるいは Hf [N (CHs) 2] 4 + 2H 2 → Hf + 4H-N (CHs) 2 (1) or
2Hf [N (CH3) 2] 4+5H2→2Hf N+6H-N (CHs) 2 2Hf [N (CH 3 ) 2] 4 + 5H 2 → 2Hf N + 6H-N (CHs) 2
+ 4CH4 (2) により、 金属 H f あるいは H f Nが析出する。  + 4CH4 (2) precipitates metal Hf or HfN.
この反応では有機官能基が非常に効率的に金属元素から脱離するため、 ァミン 系有機金属原料を使って high-K誘電体膜を形成する際に、 原料に水素ガスを添 加することにより、 被処理基板表面における金属元素析出反応の際の有機官能基 の脱離を促進することが考えられる。  In this reaction, the organic functional group is very efficiently desorbed from the metal element.When forming a high-K dielectric film using an amine-based organometallic material, hydrogen gas is added to the material. It is conceivable to promote the elimination of the organic functional group during the metal element precipitation reaction on the surface of the substrate to be processed.
しカゝし、 上記式 (1) , (2) の反応は制御が困難で、 一般に非常に急激に進 行する。 このため、 単純に原料ガスに水素を添加しただけでは、 反応容器中にお ける爆発的反応の結果、 金属粒子が多量に生成してしまう問題が避けられない。  However, the reactions of the above equations (1) and (2) are difficult to control and generally proceed very rapidly. For this reason, simply adding hydrogen to the raw material gas inevitably causes a problem that a large amount of metal particles are generated as a result of the explosive reaction in the reaction vessel.
非特許文献 1 J. H. Lee, et al., IEDM pp.645-648, 2000  Non-Patent Document 1 J. H. Lee, et al., IEDM pp.645-648, 2000
非特許文献 2 Y. Rim, et al., IEDM pp.455-458, 2001  Non-Patent Document 2 Y. Rim, et al., IEDM pp.455-458, 2001
非特許文献 3 Y. Oshita et al., J. Crys. Growth vol.233, p.292, 2001 発明の開示  Non-Patent Document 3 Y. Oshita et al., J. Crys. Growth vol.233, p.292, 2001 Disclosure of the invention
そこで本発明は上記の讓を解決した、 新規で有用な high-Κ誘電体膜の形成 方法、 およびかかる high-K誘電体膜を使った半導体装置の製造方法を提供する ことを概括的目的とする。  Accordingly, it is a general object of the present invention to provide a method for forming a new and useful high-Κ dielectric film, and a method for manufacturing a semiconductor device using such a high-K dielectric film. I do.
本発明のより具体的な目的は、アミン系有機金属原料を使つた MOCVD法によ る high-Κ誘電体膜の形成時に、膜中に残留する炭素の量を最小化できる high-K 誘電体膜の成膜方法を提供することにある。 A more specific object of the present invention is to minimize the amount of carbon remaining in a high-Κ dielectric film formed by MOCVD using an amine-based organometallic material. An object of the present invention is to provide a method for forming a dielectric film.
本発明の他の目的は、 ァミン系有機金属原料を使った誘電体膜の形成方法であ つて、  Another object of the present invention is a method for forming a dielectric film using an amine-based organometallic material,
(A) 被処理基板表面が露出されたプロセス空間に、 前記アミン系有機金属分 子を含む原料ガス供給する工程と、  (A) supplying a source gas containing the amine-based organometallic molecule to the process space where the surface of the substrate to be processed is exposed;
(B ) 前記工程 (A) の後、 前記プロセス空間から前記原料ガスを排除するェ 程と、  (B) after the step (A), removing the source gas from the process space;
(C)前記工程 (B ) の後、前記被処理基板表面に水素ガスを供給する工程と、 (C) after the step (B), supplying a hydrogen gas to the surface of the substrate to be processed,
(D) 前記工程 (B ) の後、 前記プロセス空間に酸化ガスを導入する工程を含 む誘電体膜の形成方法を提供することにある。 (D) An object of the present invention is to provide a method of forming a dielectric film including a step of introducing an oxidizing gas into the process space after the step (B).
本発明によれば、 tins工程 (A) において前記被処理基板表面には前記アミン 系有機金属原料分子が吸着され、 さらに前記工程 (B ) において l己被処理基板 表面から前記アミン系有機金属原料分子が排気された後で前記工程 (C) を行う ことにより、 前記被処理基板表面を覆う、 前記有機金属原料分子中の金属元素を 含む膜から炭素が効率的に除去され、 炭素を実質的に含まない膜が得られる。 そ こで、 このようにして得られた膜を前記工程 (D) において酸化処理することに より、 所望の炭素濃度の低い、 また塩素などのハロゲンを含まなレヽ誘電体膜、 特 に high-K誘電体膜を得ることができる。本発明では工程 (C)を実行する際に、 被処理基板表面のプロセス空間からは水素ガスと爆発的反応を生じるアミン系有 機原料ガスが除去されているため、 パーティクル発生等の問題は生じない。 本発明のその他の課題および特徴は、 以下に図面を参照しながら行う本発明の 詳細な説明より明らかとなろう。 図面の簡単な説明 According to the present invention, in the tins step (A), the amine-based organometallic raw material molecule is adsorbed on the surface of the substrate to be processed, and in the step (B), the amine-based organic metal raw material is removed from the surface of the substrate to be processed. By performing the step (C) after the molecules are exhausted, carbon is efficiently removed from the film containing the metal element in the organometallic raw material molecules, which covers the surface of the substrate to be processed, and substantially removes carbon. Is obtained. In its This, more the thus obtained film to oxidation treatment in the step (D), the desired low carbon concentration and halogen include such Rere dielectric film such as chlorine, especially in the hi g An hK dielectric film can be obtained. In the present invention, when performing the step (C), since the amine-based organic material gas that generates an explosive reaction with hydrogen gas is removed from the process space on the surface of the substrate to be processed, problems such as generation of particles occur. Absent. Other objects and features of the present invention will be apparent from the following detailed description of the present invention with reference to the drawings. BRIEF DESCRIPTION OF THE FIGURES
図 1は、 本発明で使われる MO C VD装置の構成を示す図;  FIG. 1 is a diagram showing a configuration of a MOC VD device used in the present invention;
図 2は、 本発明の第 1実施例による成膜方法を示すフローチャート; 図 3は、 図 2のフローチャートに対応したプロセスシーケンスを示す図; 図 4は、 本発明の第 2実施例による成膜方法のプロセスシーケンスを示す図; 図 5は、 本発明の第 3実施例による成膜方法のプロセスシーケンスを示す図; 図 6は、 本発明の第 4実施例で使われる MO CVD装置の概略を示す図; 図 7は、 本発明の第 4実施例による成膜方法のプロセスシーケンスを示す図; 図 8 A〜 8 Dは、 本発明の第 5実施例による高速半導体装置の製造工程を示す 図; 2 is a flowchart showing a film forming method according to a first embodiment of the present invention; FIG. 3 is a diagram showing a process sequence corresponding to the flowchart of FIG. 2; FIG. 4 is a flowchart showing a film forming according to a second embodiment of the present invention FIG. 5 is a diagram showing a process sequence of a method; FIG. 5 is a diagram showing a process sequence of a film forming method according to a third embodiment of the present invention; FIG. 6 is a view schematically showing an MOCVD apparatus used in a fourth embodiment of the present invention; FIG. 7 is a view showing a process sequence of a film forming method according to a fourth embodiment of the present invention; D is a view showing a manufacturing process of the high-speed semiconductor device according to the fifth embodiment of the present invention;
図 9A〜9Cは、 本発明の第 6実施例による MOSキャパシタの製造工程を示 す図;  9A to 9C are views showing a manufacturing process of a MOS capacitor according to a sixth embodiment of the present invention;
図 10は、本発明の第 10実施例による MOCVD装置の構成を示す図である。 発明を実施するための最良の態様  FIG. 10 is a diagram showing a configuration of a MOCVD apparatus according to a tenth embodiment of the present invention. BEST MODE FOR CARRYING OUT THE INVENTION
[第 1実施例]  [First embodiment]
図 1は、 本発明の第 1実施例において使われる MOCVD装置 10の概略的構 成を示す。  FIG. 1 shows a schematic configuration of a MOCVD apparatus 10 used in a first embodiment of the present invention.
図 1を参照するに、 MOCVD装置 10はプロセス空間 11 Aを画成し排気ポ ート 11 Bから排気される処理容器 11を備え、 前記プロセス空間 11A中には 被処理基 ¾Wを保持する基板保持台 12が設けられている。 前記基板保持台 12 中には、 図示は省略するが抵抗ヒータあるいは加熱ランプなどの «が組み込ま れている。 前記排気ポート 11Bには、 排気バルブ EVを含む排気ライン LVが 接続されている。  Referring to FIG. 1, a MOCVD apparatus 10 includes a processing chamber 11 which defines a process space 11A and is exhausted from an exhaust port 11B, and a substrate holding a substrate to be processed ¾W is provided in the process space 11A. A holding table 12 is provided. Although not shown in the drawing, a substrate such as a resistance heater or a heating lamp is incorporated in the substrate holder 12. An exhaust line LV including an exhaust valve EV is connected to the exhaust port 11B.
さらに前記プロセス空間 11 A中には前記基板保持台 12中の被処理 ¾«Wに 対面するように石英ガラスなどよりなるシャワーヘッド 13が設けられ、 前記シ ャヮーヘッド 13には、 ライン Liから、 Hf [N (CH) 3) 2] 4 (以下 TDE AHと記す) などの有機金属原料ガスが、 またライン L2から H2Oなどの酸化ガ スが、 またライン L3から水素ガスが、 それぞれ窒素キャリアガスと共に供給さ れる。 Further, a shower head 13 made of quartz glass or the like is provided in the process space 11A so as to face the processing target W in the substrate holding table 12, and the shower head 13 has a line Li and a Hf An organometallic raw material gas such as [N (CH) 3 ) 2] 4 (hereinafter referred to as TDE AH), an oxidizing gas such as H 2 O from the line L 2, and a hydrogen gas from the line L 3 Supplied with nitrogen carrier gas.
より具体的に説明すると、 TEDAHは液体原料の形で原料ボトノレ 14ι中に 保持され、前記原料ボトル 14ι中の TEDAHはライン 15ιから質量流量コン トローラ 15 aを介して供給される窒素ガスによりバブリングされる。 形成され た TEDAHガスはライン 161から質量流量コントローラ 16 aを介して供給 される窒素キャリアガスと共に前記シャワーへッド 13へと、 バルブ 17 aおよ び前記ライン LIを通って供給される。 More specifically, TEDAH is held in a raw material bottle 14ι in the form of a liquid raw material, and TEDAH in the raw material bottle 14ι is bubbled by nitrogen gas supplied from a line 15ι via a mass flow controller 15a. You. The formed TEDAH gas is supplied to the shower head 13 together with the nitrogen carrier gas supplied from the line 161 via the mass flow controller 16a, to the valve 17a and the valve 17a. And feed through said line LI.
同様に H20は前曾己原料ポトル 142中に液体原料、すなわち水の形で保持され、 ライン 152から質量流量コントローラ 15 bを介して供給される窒素ガスによ りパブリングされる。その結果形成された H20ガス、すなわち水蒸気は、 ライン 162から質量流量コントローラ 16 bを介して供給される窒素キャリアガスと 共に前記シャワーへッド 13へと、 バルブ 17 bおよび前記ライン L2を通って 供給される。 Similarly H 2 0 liquid feedstock prior曾己material Potoru 14 2, that is, held in the form of water, is by Ri Paburingu from line 15 2 to the nitrogen gas supplied through a mass flow controller 15 b. Consequently formed H 2 0 gas, i.e. water vapor, a nitrogen carrier gas from the line 16 2 is supplied through a mass flow controller 16 b are both the head 13 to the shower, valve 17 b and the line L2 Supplied through.
さらに水素ガスは図示しないガスシリンダからライン 153および質量流量コ ントローラ 15 c介して供給され、 ライン 163から質量流量コントローラ 16 cを介して供給される窒素キャリアガスと共に前記シャワーへッド 13へと、 ノ ルブ 17 cおよぴ前記ライン L3を通って供給される。 Further hydrogen gas supplied from the gas cylinder (not shown) via line 15 3 and mass flow controllers 15 c, from line 16 3 to the shower together with the nitrogen carrier gas supplied through the mass flow controller 16 c to head 13 When supplied through the Roh Lube 17 c Oyopi the line L 3.
また前記ライン Li, L2, L3にはバルブ LVi, LV2, LV3がそれぞれ設け られており、 前記バルブ LViの上流側にはベントバルブ VViが、 前記バルブ L V2の上流側にはベントバルブ VV2が、 さらに前記バルブ L V3の上流側にはべ ントバルブ V Vsが設けられている。 The said line Li, L 2, the L 3 valve LVi, LV 2, LV 3 are provided respectively, the vent valve VVi on the upstream side of the valve LVi is the vent on the upstream side of the valve LV 2 valve VV 2 is, on the further upstream side of said valve LV 3 is provided with a base Ntobarubu V Vs.
本実施例においては図 1の MO C VD装置 10を使い、 前記被処理基板 Wの表 面に H f O2膜を 133Pa (lTo r r) の圧力下、 200〜 550°Cの基板 温度において、 典型的には 2〜 5 nmの厚さに形成する。  In the present embodiment, using the MOC VD apparatus 10 of FIG. 1, a HfO2 film is formed on the surface of the substrate W under a pressure of 133 Pa (lTorr) at a substrate temperature of 200 to 550 ° C. Typically, it is formed to a thickness of 2 to 5 nm.
図 2は、 図 1を使った H f 02膜の成膜工程を示すフローチヤ一トである。 図 2を参照するに、 最初ステップ 1においてバルブ LVi〜LV3が閉鎖され、 さらに排気ノルブ EVが開力れて、 前記処理容器 11内のプロセス空間 11Aが 排気される。 この工程においては、 前記ベントバルブ VVi〜VV3は全て開放さ れ、 その結果、 ΙΐίΐΒライン Li〜L3中めガスは系外に排出される。 Figure 2 is a Furochiya one preparative showing a H f 0 2 film deposition process using FIG. Referring to FIG. 2, the valve LVi~LV 3 in the first step 1 is closed, further exhaust Norbu EV is being opening force, the processing space 11A inside the processing vessel 11 is evacuated. In this step, the vent valve VVi~VV 3 is all open, as a result, IiiiB line Li~L 3 Medium Me gas is discharged out of the system.
次にステップ S 2において前記排気パルプ EVおよびベントパルプ VViが閉 鎖され、 さらにバルブ LViが開放され、 前記プロセス空間 11 Aに前記ライン Liを介して TDEAH分子を含む原料ガスが供給される。 その結果、 原料ガス 中に含まれた TD EAH分子は被処理基板 Wの表面に化学吸着され、 基板表面を 覆うように原料分子の層が形成される。 Next is Kusarisa the exhaust pulp EV and vent pulp VVi is closed in step S 2, are opened further valve LVi, material gas containing TDEAH molecules through the line Li in the process space 11 A is supplied. As a result, the TDEAH molecules contained in the source gas are chemically adsorbed on the surface of the substrate W to be processed, and a layer of the source molecules is formed so as to cover the substrate surface.
次にステップ S3 において前記排気バルブ EVおよびベントバルブ VVi〜V V3が開放され、 さらに前記バルブ L Vi〜L V3が閉鎖され、前記プロセス空間 1 1 Aが排気される。 Next, in step S3, the exhaust valve EV and the vent valves VVi to V V 3 is opened and further the valve L Vi~LV 3 is closed, the processing space 1 1 A is discharged.
さらにステップ S 4において排気バルブ E Vおよびベントバルブ VV2が閉鎖 され、 さらにパルプ L V3が開カれて前記プロセス空間 1 1 Aにライン 1 53中の 水素ガスが、 ライン 1 63中の窒素キャリアガスにより、 典型的には 3 %の濃度 に希釈された状態で供給される。 Further closing the exhaust valve EV and the vent valve VV 2 in step S 4, the hydrogen gas in the line 1 5 3 to the processing space 1 1 A further pulp LV 3 is Hirakika is nitrogen line 1 6 3 It is supplied as a carrier gas, typically diluted to a concentration of 3%.
このようにして供給された水素ガスは前記被処理基板 Wの表面に吸着している TD EAH分子との間で、 先の式 ( 1 ) で示した反応を生じ、 その結果、 TD E AH分子から炭素を含む有機官能基が除去され、 金属 H f よりなる層が前記被処 理基板 Wの表面を覆うように形成される。  The hydrogen gas supplied in this manner causes a reaction represented by the above formula (1) with the TD EAH molecule adsorbed on the surface of the substrate W to be processed, and as a result, the TD EAH molecule The organic functional group containing carbon is removed from the substrate, and a layer made of metal Hf is formed so as to cover the surface of the substrate W to be processed.
次にステップ S 5において前記排気バルブ E Vおよびベントバルブ VVi〜V V3が全て開放され、 さらに前記バルブ L Vi〜L V3が閉鎖されることにより、前 記プロセス空間 1 1 Aが排気され、 さらにステップ S 6において前記排気バルブ E Vおよびベントバノレブ V V2が閉鎖され、パルプ L V2が開放される。その結果、 前記プロセス空間 1 1 A中には前記ライン L2より H20ガスが導入され、 導入さ された H20ガスは前記被処理基板 Wの表面に形成されている金属 H f層を酸ィ匕 させ、 これを H f O2膜に変換する。 Then opened the exhaust valve EV and the vent valve VVi~VV 3 all in step S 5, by more the valve L Vi~LV 3 is closed, pre-Symbol process space 1 1 A is exhausted, further steps exhaust valve EV and Bentobanorebu VV 2 in S 6 is closed, the pulp LV 2 is opened. As a result, H 20 gas is introduced from the line L 2 into the process space 11 A, and the introduced H 20 gas is a metal H f layer formed on the surface of the substrate W to be processed. Is converted into an HfO 2 film.
さらに前記ステップ S 6の後、 ステップ S 1に戻り、 前記排気パルプ E Vおよ ぴベントバルブ VVi〜VV3を開放し、 さらにバルブ L Vi〜L V3を閉鎖するこ とにより、 前記プロセス空間 1 1 Aを排気する。 After addition of the step S 6, the process returns to step S 1, opening the exhaust pulp EV Oyo Pi vent valve VVi~VV 3, further by a child closing the valve L Vi~LV 3, the processing space 1 1 Exhaust A.
さらに図 3に示すように前記ステップ S 1〜S 6を、段階 I、段階 I I, · · · と繰り返し実行することにより、 前記被処理基板 Wの表面に H f O2膜を所望の 2〜5 n mの厚さに形成することが可能である。 ただし図 3は、 本発明の第 1実 施例によるプロセスシーケンスを示す図である。 Further, as shown in FIG. 3, the steps S1 to S6 are repeatedly executed as steps I, II,... To form a desired HfO 2 film on the surface of the substrate W to be processed. It can be formed to a thickness of 5 nm. FIG. 3 is a diagram showing a process sequence according to the first embodiment of the present invention.
図 3を参照するに、 本実施例においてはステップ 2の TD EAH原料導入工程 の後、 必ずステップ 3の排気工程をお 、てステップ 4の水素ガスの導入工程が行 われ、 これにより、 水素ガスが導入された時点においては前記プロセス空間 1 1 Aからは残留 TD E AH原料は実質的に完全に除去されており、 水素ガスと残留 TD EAH原料との爆発的反応、 およびかかる反応に伴い生じるパーティクル発 生の問題が、 効果的に抑制される。 前記ステップ 3の排気工程は、 1秒間程度で 十分である。 また前記ステップ 3の排気工程の際に、 前記プロセス空間 1 1 Aに 窒素ガスや A rガスなどのパージガスを導入し、 残留 T D E AH原料の排出効率 を向上させることもできる。 Referring to FIG. 3, in the present embodiment, after the TD EAH raw material introduction step of step 2, the exhaust step of step 3 is always performed, and then the hydrogen gas introduction step of step 4 is performed. At the time when the TDEAH was introduced, the residual TDEAH raw material was substantially completely removed from the process space 11A, and an explosive reaction between the hydrogen gas and the residual TDEAH raw material and the reaction occurred From particles Raw problems are effectively suppressed. About 1 second is sufficient for the evacuation process in the step 3. Further, at the time of the evacuation step in the step 3, a purge gas such as a nitrogen gas or an Ar gas may be introduced into the process space 11A to improve a discharge efficiency of the residual TDE AH raw material.
また本発明では前記ステップ 3の 気工程の後、 前記ステップ 4の脱離工程に おいて、 被処理基板 Wの表面に吸着されている TD EAH原料分子が水素ガスと 反応して有機官能基が脱離するため、 ステップ 6で得られる H f O2膜中に炭素 が残留することがなく、有機金属原料を使って、欠陥の少ない高い品質の H f 02 膜を得ることが"^能になる。 本発明の発明者が本発明の基礎となる研究において 行つた実験では、 前記 H f 02膜中の炭素濃度は 1 X 1 019 c m-3以下に抑制され るのが確認されている。 このようにして形成された H f 02膜は塩化物を原料と して使つていな 、ため、 塩素などのハロゲンは含まなレ、。 Further, in the present invention, after the gasification step of step 3, in the desorption step of step 4, the TDEAH raw material molecules adsorbed on the surface of the substrate to be processed W react with hydrogen gas to form an organic functional group. Since no carbon remains in the H f O 2 film obtained in Step 6 because of the desorption, it is possible to obtain a high quality H f O 2 film with few defects using an organometallic material. to become. in inventor KoTsuta experiments in the study underlying the present invention of the present invention, the H f 0 2 carbon concentration in the film is 1 X 1 0 19 confirmation of c m-3 Ru is suppressed below It has been is. Thus H f 0 2 film formed by the Do not one used by the chloride as a raw material, therefore, Les such include halogen such as chlorine.
なお本発明のプロセスは、 前記ステップ 2の吸着工程にぉレヽて前記 T D E AH 原料ガスの吸着時間あるいは基板温度を制御することにより、 前記被処理基 の表面に 1分子層分の厚さの T E D AH層を形成し、 前記ステップ 6の酸ィ匕工程 において前記 1分子層分の T E D E A H膜を酸化して 1分子層分の厚さの H f O 2膜を形成した場合には、 図 2あるいは 3のプロセスはいわゆる A L D (原子層 堆積) プロセスとなる。 しカ し、 本発明は AL Dプロセスに限定されるものでは なく、 前記ステップ 2の工程を、 被処理基;) SW上に複数分子層に対応した厚さの 吸着 T E D AH層が形成されるように実行することもできる。  In the process of the present invention, by controlling the adsorption time of the TDE AH source gas or the substrate temperature in the adsorption step of step 2, the TED having a thickness of one molecular layer is formed on the surface of the substrate to be treated. When an AH layer is formed, and the TEDEAH film for one molecular layer is oxidized to form a HfO2 film having a thickness for one molecular layer in the oxidation step of Step 6, FIG. 2 or Process 3 is the so-called ALD (Atomic Layer Deposition) process. However, the present invention is not limited to the ALD process, and the process of the step 2 is performed by treating the substrate to be treated;), an adsorption TED AH layer having a thickness corresponding to a plurality of molecular layers is formed on the SW. It can also be performed as follows.
なお、 本実施例においては H f のァミノ系有機金属原料として TD EAHを使 つたが、 本発明はかかる特定の有機金属原料に限定されるものではない。 例えは H f の有機金属原料としては、 他にテトラジェチルァミノハフニウム (H f [N (CHaCHs) 2] 4) 等を使うことができる。  In this example, TDEAH was used as an amino-based organometallic raw material for Hf, but the present invention is not limited to such a specific organometallic raw material. For example, as the organometallic raw material of H f, tetraethylenamino hafnium (H f [N (CHaCHs) 2] 4) or the like can be used.
また本発明は H f のァミノ系有機金属原料を使った H f 02膜の形成に限定さ れるものではなく、テトラジメチルアルミノジルコニウム( Z r [N(CH3) 2] 4), テトラジェチルァミノハフニウム (z r [N (C H2C H3) 2] 4) など、 Z rのァ ミノ系有機金属原料を使って Z r 02膜を形成する場合にも有効である。 The present invention is not limited to the formation of H f 0 2 film using Amino-based organic metal source of H f, tetradimethylaminotitanium aluminosilicate zirconium (Z r [N (CH 3 ) 2] 4), Tetoraje such as chill § amino hafnium (zr [N (C H2C H3 ) 2] 4), it is also effective when using § amino-based organic metal source of Z r to form a Z r 0 2 film.
さらに本発明は、 H f 02膜あるいは Z r〇2膜の形成のみならず、 H f S i O 4膜や Z r S i θ4膜などのシリケート膜、 さらには H f Α 1 205や Z r A 1 2Οδ などのアルミネート膜の形成にぉレ、ても有用である。 例えば ΙίίΙΒΑ 1の有機金属 原料としては、 化学式が A 1 (CHs) 3で表されるトリメチルアルミニウムなど が公知であり、 また S iの原料としては、 化学式が S i C 1 4で表されるテトラ クロロシランなどが公知である。 The present invention not only the formation of H f 0 2 film or Z R_〇 2 film, H f S i O 4 film or Z r S i .theta.4 film silicate such as film, news Ore formation of aluminate film such as H f Α 1 2 0 5 and Z r A 1 2 Ο δ, be useful. For example, as the organometallic raw material of No. 1, trimethylaluminum represented by the chemical formula A 1 (CHs) 3 is known, and as the raw material of Si, tetramethylaluminum represented by the chemical formula S i C 14 is known. Chlorosilane and the like are known.
特にシリケ一ト膜ゃアルミネート膜を形成する場合には、 図 3のプロセスシー ケンスのうち段階 Iにおいて H f 02分子層を形成した後、 段階 I Iにおいて S i 02あるいは A 1 2O3の分子層を形成することにより、所望の化合物膜を得るこ とができる。 Particularly in the case of forming a silicate Ichito film Ya aluminate film is formed by forming a H f 0 2 molecule layer in step I of the process sequence of FIG. 3, in step II S i 0 2 or A 1 2O3 By forming a molecular layer, a desired compound film can be obtained.
pチヤネレ MO S トランジスタの製造においては、ポリシリコンゲート電極後、 ゲート電極中に含まれるボロン (B) 力 後の熱処理工程においてチヤネノ! 域 に拡散することにより、 閾値 が変動してしまう問題が知られている。 この問 題に対する最も典型的な対策は、 ゲート酸化膜中に窒素 (N) を含有させること により Bの拡散を抑制することである。 アミン系原料を使う本発明では、 容易に ゲート酸化膜中に窒素を含有させることができる。 すなわち、 本発明の特徴であ る水素ガスの導入時に、 1〜1 0 %程度のアンモニア (NH3) ガスを供給するこ とで、 膜中に 1 X 1 021 c m-3以上の窒素を含有させることが可能になる。 In the production of p-channel MOS transistors, the threshold value fluctuates due to diffusion into the channel region in the heat treatment process after the polysilicon gate electrode and after the boron (B) force contained in the gate electrode. Have been. The most typical solution to this problem is to suppress the diffusion of B by including nitrogen (N) in the gate oxide. In the present invention using an amine-based material, nitrogen can be easily contained in the gate oxide film. That is, when introducing hydrogen gas, which is a feature of the present invention, by supplying about 1 to 10% ammonia (NH 3 ) gas, 1 × 10 21 cm− 3 or more of nitrogen is contained in the film. Can be contained.
[第 2実施例] [Second embodiment]
図 4は、 本発明の第 2実施例による H f 02膜の形成プロセスシーケンスを示 す図である。 Figure 4 is a view to view the formation process sequence H f 0 2 film according to the second embodiment of the present invention.
図 4を参照するに、 本実施例ではステツプ 4の工程とステップ 6の工程が相互 に入れ替わつており、 従ってステップ 3の排気工程の後、 直ちにステップ 6の酸 化工程が行われ、 さらにステップ 6の酸化工程の後、 ステップ 5の排気工程が行 われ、 その後でステップ 4の水素ガス導入工程が行われる。  Referring to FIG. 4, in the present embodiment, the process of step 4 and the process of step 6 are interchanged. Therefore, immediately after the exhaust process of step 3, the oxidation process of step 6 is performed. After the oxidation step 6, the exhaust step of step 5 is performed, and then the hydrogen gas introduction step of step 4 is performed.
図 4の工程では、 ステップ 4において先の工程で形成されている H f O2膜上 に水素分子が吸着され、 余剰の水素分子は次の段階 I Iのステップ 1における排 気工程により、 プロセス空間 1 1 Aから除去される。  In the process of Fig. 4, in step 4, hydrogen molecules are adsorbed on the HfO2 film formed in the previous process, and the excess hydrogen molecules are discharged into the process space 1 by the exhaust process in step 1 of the next stage II. Removed from 1A.
そこで前記段階 I Iのステップ 2において前記プロセス空間 1 1 Aに TD EA Hなどの H f のァミノ系有機金属原料を導入した場合、 先に形成されている H f 02膜上に T E DAH分子が吸着する際に先の反応 ( 1 ) が生じ、 有機官能基が 脱離して金属 H fが析出する。 Therefore, in Step 2 of Step II, TD EA is added to the process space 11 A. When an amino-based organometallic material of H f such as H is introduced, the above reaction (1) occurs when the TE DAH molecule is adsorbed on the previously formed H f O 2 film, and the organic functional group is removed. Desorbs and deposits metal Hf.
そこで前記プロセス空間 1 1 Aからステップ 3において余剰の T ED AH原料 を除去した後、 ステップ 6において吸着した金属 H f よりなる金属 H f層を酸化 させることにより、 膜中に含まれる炭素濃度が低い、 優れた膜質の H f 02膜を 得ることが可能になる。 Then, after removing excess TEDAH raw material from the process space 11A in step 3, the metal Hf layer composed of the metal Hf adsorbed in step 6 is oxidized to reduce the carbon concentration contained in the film. low, it is possible to obtain a H f 0 2 film excellent film quality.
なお、 本実施例においても先の実施例と同様に、 使われるアミノ系有機金属原 料は T E D ΑΗに限定されるものではなく、 また作製される膜も H f 02膜に限 定されるものではない。 Incidentally, it is restricted to similarly, amino-based organic metal raw material is not limited to TED Arufaita, also film manufactured also H f 0 2 film used in the previous embodiment also in this embodiment Not something.
[第 3実施例] [Third embodiment]
図 5は、 本宪明の第 3実施例による H f 02膜の形成プロセスシーケンスを示 す図である。 Figure 5 is a view to view the formation process sequence H f 0 2 film according to a third embodiment of the present宪明.
図 5を参照するに、 本実施例では段階 Iで示す最初の H f O2膜の形成工程で はステップ 1〜ステップ 6の工程が先の図 3の場合と同じ順序で実行されるが、 次の段階 I Iでは、 ステップ 1の排気工程の後、 直ちにステップ 4の水素ガス導 入工程が実行され、 さらにステップ 3の排気工程の後、 ステップ 2の T E D ΑΗ 導入工程が実行される。  Referring to FIG. 5, in this embodiment, in the first step of forming the HfO2 film shown in step I, steps 1 to 6 are performed in the same order as in FIG. In stage II, immediately after the evacuation process in step 1, the hydrogen gas introduction process in step 4 is executed, and after the evacuation process in step 3, the TED II introduction process in step 2 is executed.
さらにステップ 2の T E D AH導入工程の後、 ステップ 5の排気工程が実行さ れ、 その後でステップ 4の T E D AH導入工程が実行される。  Further, after the TED AH introduction step of Step 2, the exhaust step of Step 5 is executed, and thereafter, the TED AH introduction step of Step 4 is executed.
このように本実施例においてはァミン系有機金属原料導入工程の前後において 水素ガス導入工程が行われるため、 被処理基板上に吸着した有機金属原料分子か らの有機官能基の脱離が確実に行われ、得られた H f O2などの high-K誘電体膜 中に残留する炭素の量を確実に最小化することができる。  As described above, in this embodiment, the hydrogen gas introduction step is performed before and after the amine-based organometallic material introduction step, so that the desorption of the organic functional group from the organometallic material molecules adsorbed on the substrate to be processed is ensured. As a result, the amount of carbon remaining in the resulting high-K dielectric film such as HfO2 can be reliably minimized.
[第 4実施例] [Fourth embodiment]
図 6は、本実施例で使われる MO C VD装置 1 0 Aの概要を単純化して示す図、 また図 7は図 6の MO C VD装置で実行される H f 02膜の形成工程を示す図で ある。 FIG. 6 is a simplified diagram showing the outline of the MOC VD device 10A used in the present embodiment, and FIG. 7 shows the process of forming the Hf02 film performed by the MOC VD device of FIG. In the figure is there.
図 6を参照するに、 MO CVD装置 1 0 は図1の 0じ¥0装置1 0と略同 —の構成を有しているが、 ガス供給ライン Liおよび L2のみが使われ、 ガス供給 ライン L3が省略される点で相違している。 その際、本実施例では前記ライン Li には先の実施例と同様に TD E AHが供給されるが、 前記ライン L2には、 H20 ガスの他に水素ガスが、 窒素キャリアガスと共に供給される。 あるいは前記ライ ン L2には水素ガスと酸素ガスとが供給される。 以下の説明は、 前記ライン L2に H20ガスと水素ガスとを供給する場合について行う。 Referring to FIG. 6, the MO CVD apparatus 10 has substantially the same configuration as the apparatus 10 in FIG. 1, but only the gas supply lines Li and L 2 are used, and the gas supply is performed. The difference is that the line L3 is omitted. At that time, in the present embodiment similarly TD E AH in the previous embodiment to the line Li is supplied to the line L 2, in addition to hydrogen gas H 2 0 gas, together with the nitrogen carrier gas Supplied. Or wherein the line L 2 is supplied with hydrogen gas and oxygen gas. The following description is made for the case of supplying the H 2 0 gas and hydrogen gas to the line L 2.
図 7を参照するに、 最初のステップ 1 1において前記プロセス空間 1 1 カ 気された後、 ステップ 1 2において TD EAH原料ガスが前記プロセス空間に前 記ライン Liを介して導入され、 さらにステップ 1 3において前記プロセス空間 1 1 A中の余剰な TD EAH原料ガスが排気により除去される。  Referring to FIG. 7, after the process space 11 is evacuated in the first step 11, the TD EAH source gas is introduced into the process space via the line Li in the step 12, and At 3, excess TD EAH source gas in the process space 11A is removed by exhaust.
図 7の実施例では、 この後、 ステップ 1 4において前記ライン L2から H20ガ スと水素ガスとが窒素キヤリァガスと共に前記プロセス空間 1 1 A中に導入され、 その結果、 前記プロセス空間 1 1 A中においては前記被処理基板 Wの表面を覆う TD EAH分子層が酸化され、 同時に有機官能基が脱離する。 In the embodiment of FIG. 7, after this, in step 14, H 20 gas and hydrogen gas are introduced into the process space 11A together with the nitrogen carrier gas from the line L2, so that the process space 11 In A, the TD EAH molecular layer covering the surface of the target substrate W is oxidized, and at the same time, the organic functional group is eliminated.
さらに前記ステップ 1 1〜1 4の工程を段階 I, 段階 I I, 段階 I I I, 段階 I V · · ·と繰り返すことにより、 本実施例によれば被処理基板 W上に炭素濃度 の低い H f 02などの high-K誘電体膜が、 効率よく形成される。 Further, by repeating the steps 11 to 14 in steps I, II, III, IV,... According to the present embodiment, the Hf 0 2 having a low carbon concentration is formed on the substrate W to be processed. High-K dielectric films are efficiently formed.
[第 5実施例] [Fifth embodiment]
図 8 A〜 8 Dは、 本発明の第 5実施例による超高速 MO Sトランジスタの製造 工程を示す。  8A to 8D show a manufacturing process of an ultra-high-speed MOS transistor according to a fifth embodiment of the present invention.
図 8 Aを参照するに、 シリコン基板 2 1上には素子分離領域 2 I Bにより画成 された p型ゥエルが素子領域 2 1 Aとして形成されており、 前記シリコン基板 2 1は、 先に説明した図 1の MO C VD装置 1 0中に、 前記被処理基ネ として導 入される。  Referring to FIG. 8A, a p-type well defined by a device isolation region 2 IB is formed as a device region 21 A on a silicon substrate 21, and the silicon substrate 21 is described above. The substrate to be treated is introduced into the MOC VD apparatus 10 shown in FIG.
さらに図 2〜 7のいずれかのプロセスを実行することにより、 前記シリコン基 板 2 1上には H f 02や Z r 02, A 1 203などの金属酸化膜、 あるいはシリケ一 ト膜、 あるいはアルミネート膜などの high-K誘電体膜よりなるゲート絶縁膜 2 2が形成される。 Furthermore, by executing the process of any of 2 to 7, wherein the silicon substrate is on 2 1 H f 0 2 and Z r 0 2, A 1 2 0 3 metal oxide film such as or silicate one, A gate insulating film 22 made of a high-K dielectric film such as a silicon film or an aluminate film is formed.
さらに図 8 Aの工程では前記ゲート絶縁膜 2 2上にポリシリコン膜 2 3がー様 に形成される。  8A, a polysilicon film 23 is formed on the gate insulating film 22 in a similar manner.
次に図 8 Bの工程において前記ポリシリコン膜 2 3はパターニングされてポリ シリコンゲート電極パターン 2 3 Gが形成され、 前記素子領域 2 1 A中に tfrf己ゲ ート電極パターン 2 3 Gをマスクに Pをイオン注入することにより、 前記素子領 域 2 1 A中、 前記ゲート電極 2 3 Gの両彻』に拡散領域 2 l aおよび 2 1 bが形成 される。 また図 8 Bの工程では前記ゲート電極パターン 2 3 Gのパターユングの 結果、 その下の high-K誘電体膜 2 2もゲート電極 2 3 Gに対応した形状にパタ 一二ングされ、 ゲート絶縁膜パターン 2 2 Gが形成される。  Next, in the step of FIG. 8B, the polysilicon film 23 is patterned to form a polysilicon gate electrode pattern 23 G, and the tfrf self-gate electrode pattern 23 G is masked in the element region 21 A. By ion implantation of P, diffusion regions 2 la and 21 b are formed in both the gate electrode 23 G and the device region 21 A. In the step of FIG. 8B, as a result of the patterning of the gate electrode pattern 23 G, the underlying high-K dielectric film 22 is also patterned into a shape corresponding to the gate electrode 23 G, and the gate insulation is formed. A film pattern 22G is formed.
さらに図 8 Cの工程において前記ゲート電極パターン 2 3 Gの両側壁面上には 側壁絶縁膜 2 4 A, 2 4 Bが形成され、 さらに前記グート電極パターン 2 3 Gお よび側壁絶縁膜 2 4 A, 2 4 Bをマスクに Pを図 8 Bの^よりも大きな加速ェ ネルギおよびドーズ量でイオン注入することにより、 前記素子領域 2 1 A中、 前 記側壁絶縁膜 2 4 A, 2 4 Bの外側に n +型の拡散領域 2 1 cおよび 2 1 dが、 それぞれ前記拡散領域 2 1 aおよび 2 1 bに部分的に重畳するような関係で形成 される。  Further, in the step of FIG. 8C, side wall insulating films 24 A and 24 B are formed on both side walls of the gate electrode pattern 23 G, and the good electrode pattern 23 G and the side wall insulating film 24 A are further formed. By implanting P with an acceleration energy and a dose larger than ^ in FIG. 8B using the masks 24 and 24B as masks, the sidewall insulating films 24A and 24B in the element region 21A are implanted. The n + -type diffusion regions 21 c and 21 d are formed outside of the substrate so as to partially overlap the diffusion regions 21 a and 21 b, respectively.
さらに図 8 Dの工程において図 8 Cの構造上に C oなどの金属層を堆積し、 短 時間の熱処理の後、 これを除去することにより、 前記拡散領域 2 1 cおよび 2 1 dの表面にシリサイド領域 2 1 Sが形成される。 かかるシリサイド領域 2 1 Sは また、 前記ゲート電極 2 2 G上にも形成される。  Further, in the step of FIG. 8D, a metal layer such as Co is deposited on the structure of FIG. 8C, and after a short-time heat treatment, it is removed, whereby the surface of the diffusion regions 21 c and 21 d is removed. Then, a silicide region 21S is formed. Such a silicide region 21S is also formed on the gate electrode 22G.
このようにして形成された MO Sトランジスタは、 ゲート絶縁膜 2 2 Gとして The MOS transistor formed in this way is used as a gate insulating film 22 G
H f 02などの high-K誘電体膜を使っているため、ゲート長を 0 . l m以下に まで微細化した場合でもゲート絶縁膜が十分な物理 を有し、 ゲートリーク電 流が増大してしまう問題が回避される。 特に本実施例では前記グート絶縁膜 2 2Because it uses high-K dielectric film such as H f 0 2, the gate length 0. The gate insulating film even when up miniaturized to lm or less has sufficient physical, gate leakage current is increased Problem is avoided. Particularly, in the present embodiment, the gut insulating film 22
G中の炭素濃度が減少しているため、 ポイドなどの欠陥が生じることがなく、 信 頼性の高い膜が得られる。 [第 6実施例] Since the concentration of carbon in G is reduced, defects such as voids do not occur, and a highly reliable film can be obtained. [Sixth embodiment]
図 9 A〜9 Cは、 本発明の第 6実施例による MO Sキャパシタ 4 0の製造工程 を示す。  9A to 9C show a manufacturing process of a MOS capacitor 40 according to a sixth embodiment of the present invention.
図 9 Aを参照するに拡散領域 4 1 Aが形成されたシリコン基板 4 1上にはシリ コン酸化膜などよりなる絶縁膜 4 2が形成され、 前記絶縁膜 4 2中には前記拡散 領域 4 1 Aを露出するようにコンタクトホールが形成される。  Referring to FIG. 9A, an insulating film 42 made of a silicon oxide film or the like is formed on the silicon substrate 41 on which the diffusion region 41A is formed, and the diffusion region 4 is formed in the insulating film 42. A contact hole is formed to expose 1A.
さらに図 9 Aの工程では、 前記絶縁膜 4 2上に前記コンタクトホ ルを介して 前記拡散領域 4 1 Aとコンタクトするように、 前記拡散領域 4 1 Aの導電型に対 応して p型あるいは n型にドープされたポリシリコン下部電極 4 3が形成される。 次に図 9 Bの工程において図 9 Aの構造のシリコン基板 4 1は図 1の MO C V D装置 1 0の処理容器 1 1中に、 前記被処理 ¾Wとして導入され、 さらに先に 図 2および 3、 あるいは図 4〜7で説明した工程を行うことにより、 前記ポリシ リコン下部電極 4 3の表面には、 H f 02などの Mgh-K誘電体膜よりなるキャパ シタ絶縁膜 4 4力 2〜3 n mの膜厚に形成される。 Further, in the step of FIG. 9A, a p-type corresponding to the conductivity type of the diffusion region 41A is formed on the insulating film 42 so as to contact the diffusion region 41A via the contact hole. Alternatively, an n-type doped polysilicon lower electrode 43 is formed. Next, in the step of FIG. 9B, the silicon substrate 41 having the structure of FIG. 9A is introduced into the processing vessel 11 of the MOCVD apparatus 10 of FIG. , or by performing the process described in FIGS. 4-7, the policy silicon lower electrode 4 3 surfaces, H f 0 2 Mgh-K dielectric film capacity Sita insulating film 4 4 force 2 made of such It is formed to a thickness of 3 nm.
さらに図 9 Cの工程において前記キャパシタ絶縁膜 4 4上にポリシリコン上部 電極 4 5を形成することにより、 MOSキャパシタ 4 0が得られる。  Further, by forming a polysilicon upper electrode 45 on the capacitor insulating film 44 in the step of FIG. 9C, a MOS capacitor 40 is obtained.
本実施例では、キャパシタ絶縁膜 4 4として使われる H f 02などの high-K誘 電体膜中に含まれる、 炭素など有機金属原料起源の不純物の濃度が抑制され、 リ ーク電流の少ない、 信頼性の高い膜が得られる。 特に本実施例では炭素の酸化に より膜中に生じるボイドの形成が、 炭素除去工程により効果的に抑制され、 その 結果、 かかるボイドにおける電界集中が回避される。 In this embodiment, it contained in the high-K dielectrics film such as H f 0 2 used as a capacitor insulating film 4 4, is suppressed concentration of impurities in the organic metal raw material origin, such as carbon, of rie leakage current Small and highly reliable films can be obtained. Particularly, in this embodiment, the formation of voids in the film due to oxidation of carbon is effectively suppressed by the carbon removing step, and as a result, electric field concentration in such voids is avoided.
また本実施例ではキャパシタ絶縁膜 4 4を有機金属原料ガスの吸着および酸化 により形成しているため、 前記下部電極 4 3が複雑な形状をしていても、 キャパ シタ絶縁膜 4 4は一様な膜厚で形成できる。  Further, in this embodiment, since the capacitor insulating film 44 is formed by adsorption and oxidation of the organic metal source gas, even if the lower electrode 43 has a complicated shape, the capacitor insulating film 44 is uniform. It can be formed with an appropriate film thickness.
このようなキャパシタにより、 D RAMを構成することができる。  Such a capacitor can form a DRAM.
[第 7実施例] [Seventh embodiment]
図 1 0は、 本発明の第 7実施例による MO C VD装置 6 0の構成を示す。 ただ し図 1 0中、 先に説明した部分には同一の参照符号を付し、 説明を省略する。 図 1 0を参照するに、 MO CVD装置 6 0はバッチ処理のための装置であり、 プロセス空間 6 1 A中に多数の被処理基板 Wを保持する処理容器 6 1を有してい る。 FIG. 10 shows the configuration of the MOC VD device 60 according to the seventh embodiment of the present invention. However, in FIG. 10, the same parts as those described above are denoted by the same reference numerals, and description thereof will be omitted. Referring to FIG. 10, the MOCVD apparatus 60 is an apparatus for batch processing, and has a processing vessel 61 for holding a large number of substrates W to be processed in a process space 61A.
前記処理容器 6 1は排気ポート 6 1 Bにおいて排気パルプ E Vを介して排気さ れ、 また前記処理容器 6 1の外側にはヒータ 6 2力設けられている。  The processing container 61 is exhausted through an exhaust pulp EV at an exhaust port 61B, and a heater 62 is provided outside the processing container 61.
このような構成のバッチ式装置においても、 前記ライン Liから供給される T D EAHなどのアミン系有機金属原料とライン L2から供給される H2Oなどの酸 化剤とライン L3から供給される水素ガスとを、 先に図 2〜5、 あるいは図 6 , 7で説明したように切替ることにより、 爆発的な反応を回避しつつ、 残留有機金 属原料から効果的に有機官能基を除去することができ、 形成される high-K誘電 体膜中の炭素濃度を効果的に低減させることが可能になる。 Even in a batch of such a configuration, hydrogen supplied from the oxidation agent and the line L 3, such as H2O supplied from an amine-based organic metal material and the line L 2, such as TD EAH supplied from the line Li By switching between gas and gas as previously described in Figs. 2 to 5 or Figs. 6 and 7, effective removal of organic functional groups from residual organic metal raw materials while avoiding explosive reactions It is possible to effectively reduce the carbon concentration in the formed high-K dielectric film.
以上、 本発明を好ましい実施例について説明したが、 本発明はかかる特定の実 施例に限定されるものではなく、 特許請求の範囲に記載の要旨内において様々な 変形 ·変更が可能である。 産業上の利用可能性  As described above, the present invention has been described with respect to the preferred embodiments. However, the present invention is not limited to the specific embodiments, and various modifications and changes can be made within the gist of the claims. Industrial applicability
本発明によれば、 被処理基板表面にアミン系有機金属原料分子を吸着させ、 さ らに前記被処理基板表面から前記ァミン系有機金属原料分子を排気した後で前吸 着しているアミン系有機金属原料分子に対して水素ガスを作用させることにより、 前記被処理基板表面を覆う、 前記有機金属原料分子中の金属元素を含む膜から炭 素が効率的に除去され、 炭素を実質的に含まない膜が得られる。 そこで、 このよ うにして得られた膜を酸化処理することにより、 所望の誘電体膜を得ることがで きる。 本発明では前記水素ガスを作用させる工程を実行する際に、 被処理基板表 面のプロセス空間からは水素ガスと爆発的反応を生じるアミン系有機原料ガスが 除去されているため、 パーティクル発生等の問題は生じない。  According to the present invention, the amine-based organometallic raw material molecules are adsorbed on the surface of the substrate to be processed, and the amine-based organic metal raw material molecules pre-adsorbed after exhausting the amine-based organic metal raw material molecules from the surface of the processed substrate By causing hydrogen gas to act on the organometallic raw material molecule, carbon is efficiently removed from the film containing the metal element in the organometallic raw material molecule, which covers the surface of the substrate to be processed, and substantially removes carbon. The result is a film that does not contain any. Therefore, a desired dielectric film can be obtained by oxidizing the film thus obtained. In the present invention, when the step of applying the hydrogen gas is performed, since the amine-based organic raw material gas that generates an explosive reaction with the hydrogen gas is removed from the process space on the surface of the substrate to be processed, the generation of particles and the like is prevented. No problem arises.

Claims

請求の範囲 The scope of the claims
1 . アミン系有機金属原料を使つた誘電体膜の形成方法であって、  1. A method for forming a dielectric film using an amine-based organometallic raw material,
(A) 被処理基板表面が露出されたプロセス空間に 前記アミン系有機金属分 子を含む原料ガス供給する工程と、  (A) a step of supplying a source gas containing the amine-based organometallic molecule to the process space where the surface of the substrate to be processed is exposed;
(B) 前記工程 (A) の後、 前記プロセス空間から前記原料ガスを排除するェ 程と、  (B) after the step (A), removing the source gas from the process space;
(C)前記工程 (B) の後、前記被処理基板表面に水素ガスを供給する工程と、 (C) after the step (B), supplying a hydrogen gas to the surface of the substrate to be processed,
(D) 前記工程 (B) の後、 前記プロセス空間に酸化ガスを導入する工程を含 む誘電体膜の形成方法。 (D) A method for forming a dielectric film, comprising a step of introducing an oxidizing gas into the process space after the step (B).
2. 前記工程 (D) は、 前記工程 (C) の後で実行される請求項 1記載の誘 電体膜の形成方法。  2. The method for forming a dielectric film according to claim 1, wherein the step (D) is performed after the step (C).
3. 前記工程 (D) は、 肅己工程 (C) と同時に実行される請求項 1記載の 誘電体膜の形成方法。  3. The method for forming a dielectric film according to claim 1, wherein the step (D) is performed at the same time as the step (C).
4. 前記工程 (D) は、 前記工程 (C) よりも前に実行される請求項 1記載 の誘電体膜の形成方法。  4. The method according to claim 1, wherein the step (D) is performed before the step (C).
5. 前記工程 (A) 〜 (D) は、 繰り返し実行される請求項 1記載の誘電体 膜の形成方法。  5. The method of claim 1, wherein the steps (A) to (D) are repeatedly performed.
6. 前記工程 (A) の前に、 (A 1 )前記プロセス空間に水素ガスを供給する 工程と、 (A 2 )前記工程 (A 1 ) の後、前記プロセス空間から水素ガスを排除す る工程を行う請求項 1記載の誘電体膜の形成方法。  6. Before the step (A), (A 1) supplying hydrogen gas to the process space; and (A 2) after step (A 1), excluding hydrogen gas from the process space 2. The method for forming a dielectric film according to claim 1, wherein the step is performed.
7. 前記工程 (A 1 ) の前に、 (A 3 )前記プロセス空間に酸化ガスを導入す る工程を行う請求項 6記載の誘電体膜の形成方法。  7. The method for forming a dielectric film according to claim 6, wherein (A3) a step of introducing an oxidizing gas into the process space is performed before the step (A1).
8. 前記工程 (A 2 ) 〜 (D) は、 繰り返し実行される請求項 6記載の誘電 体膜の形成方法。  8. The method for forming a dielectric film according to claim 6, wherein the steps (A2) to (D) are repeatedly performed.
9. 前記工程 (A) は、 前記被処理基板表面を、 前記有機金属原料分子によ り、 複数分子層に対応する厚さの有機金属原料分子層が形成されるように覆う請 求項 1記載の誘電体膜の形成方法。  9. The step (A) is that the surface of the substrate to be processed is covered with the organometallic material molecules so that an organometallic material molecular layer having a thickness corresponding to a plurality of molecular layers is formed. The method for forming a dielectric film according to the above.
1 0 . 前記工程 (A) は、 前記被処理基板表面を、 前記有機金属原料分子に より、 単一分子層に対応する厚さの有機金属原料分子層が形成されるように覆う 請求項 1記載の誘電体膜の形成方法。 10. In the step (A), the surface of the substrate to be processed is covered with the organometallic material molecules so that an organometallic material molecular layer having a thickness corresponding to a single molecular layer is formed. A method for forming a dielectric film according to claim 1.
1 1 . 前記アミン系有機金属原料は、 H f , Z r, S i , A 1 , T iのいず れかを金属元素として含む請求項 1記載の誘電体膜の形成方法。  11. The method for forming a dielectric film according to claim 1, wherein the amine-based organometallic raw material contains any one of Hf, Zr, Si, A1, and Ti as a metal element.
1 2. 前記誘電体膜は H f , Z rおよび A 1のいずれかの金属元素の酸化物、 またはシリケート、 またはアルミネートよりなる請求項 1記載の誘電体膜の形成 方法。  12. The method according to claim 1, wherein the dielectric film is made of an oxide, silicate, or aluminate of any one of Hf, Zr, and A1.
1 3 . 前記誘電体膜は H f 02または Z r 02よりなる請求項 1 2記載の誘電 体膜の形成方法。 1 3. The dielectric film H f 0 2 or Z r 0 2 consists of Claim 1 2 forming method of a dielectric film according.
1 4. 前記ァミン系有機金属原料は、 メチルァミノ基またはェチルァミノ基 またはメチルェチルァミノ基を含む請求項 1記載の誘電体膜の形成方法。  14. The method for forming a dielectric film according to claim 1, wherein the amine-based organometallic raw material contains a methylamino group, an ethylamino group, or a methylethylamino group.
1 5 . 前記アミン系有機金属原料は、 テトラジメチルァミノハフニウムまた はテトラジメチルァミノジノレコニゥムよりなる請求項 1 4記載の誘電体膜の形成 方法。  15. The method for forming a dielectric film according to claim 14, wherein the amine-based organometallic raw material is made of tetradimethylaminohafnium or tetradimethylaminodinoreconium.
1 6 . 基板上にグート絶縁膜を形成する工程と、  1 6. A step of forming a gut insulating film on the substrate;
前記ゲート絶縁膜上にゲート電極を形成する工程と、  Forming a gate electrode on the gate insulating film;
前記ゲート電極をマスクに、 前記基板中に不純物元素を導入する工程とよりな る半導体装置の製造方法にぉレ、て、  A method of manufacturing a semiconductor device, comprising: introducing an impurity element into the substrate using the gate electrode as a mask;
前記ゲート絶縁膜を形成する工程は、  The step of forming the gate insulating film,
(Α) 前記基板が保持されたプロセス空間に、 前記アミン系有機金属分子を含 む原料ガス供給する工程と、  (Α) supplying a source gas containing the amine-based organometallic molecule to a process space in which the substrate is held;
(Β) 前記工程 (Α) の後、 前記プロセス空間から前記原料ガスを排除するェ 程と、  (Β) after the step (Α), removing the source gas from the process space;
(C)前記工程 (Β)の後、前記被処理基板表面に水素ガスを供給する工程と、 (C) after the step (Β), a step of supplying hydrogen gas to the surface of the substrate to be processed,
(D) 前記工程 (Β) の後、 前記プロセス空間に酸ィ匕ガスを導入する工程を含 む半導体装置の製造方法。 (D) A method for manufacturing a semiconductor device, comprising a step of introducing an oxidizing gas into the process space after the step (Β).
1 7 . 基板上に下部電極を形成する工程と、  17. A step of forming a lower electrode on the substrate;
前記下部電極上にキャパシタ絶縁膜を形成する工程と、  Forming a capacitor insulating film on the lower electrode;
前記キャパシタ絶縁膜上に上部電極を形成する工程とよりなるキャパシタの製 造方法であって、 前記キャパシタ絶縁膜を形成する工程は、 Forming a top electrode on the capacitor insulating film. The step of forming the capacitor insulating film,
(A) 前記基板が保持されたプロセス空間に、 前記アミン系有機金属分子を含 む原料ガス供給する工程と、  (A) supplying a source gas containing the amine-based organometallic molecule to a process space in which the substrate is held;
(B) 前記工程 (A) の後、 前記プロセス空間から前記原料ガスを排除するェ 程と、  (B) after the step (A), removing the source gas from the process space;
(C)前記工程 (B) の後、 ΙίίΐΕ被処理基板表面に水素ガスを供給する工程と、 (C) after the step (B), a step of supplying hydrogen gas to the surface of the substrate to be processed;
(D) 前記工程 (Β) の後、 前記プロセス空間に酸化ガスを導入する工程を含 むキャパシタの製造方法。 (D) A method for manufacturing a capacitor, comprising a step of introducing an oxidizing gas into the process space after the step (工程).
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Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006060170A (en) * 2004-08-24 2006-03-02 Nec Electronics Corp Method for manufacturing capacitor and semiconductor device
JP2007013171A (en) * 2005-06-30 2007-01-18 Hynix Semiconductor Inc Method of manufacturing nand flash memory device
JP2009545138A (en) * 2006-07-21 2009-12-17 エーエスエム アメリカ インコーポレイテッド ALD of metal silicate film
JP2010219561A (en) * 2010-06-24 2010-09-30 Hitachi Kokusai Electric Inc Substrate processing apparatus and method of manufacturing semiconductor device
JP2011009752A (en) * 2010-07-02 2011-01-13 Hitachi Kokusai Electric Inc Substrate processing apparatus, method of manufacturing semiconductor device, and semiconductor device
US9234275B2 (en) 2012-12-11 2016-01-12 Tokyo Electron Limited Method and apparatus of forming metal compound film, and electronic product
JP2016018888A (en) * 2014-07-08 2016-02-01 豊田合成株式会社 Semiconductor device and method of manufacturing the same

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007194582A (en) * 2005-12-20 2007-08-02 Tokyo Electron Ltd Modifying method for ferroelectric thin film, and semiconductor device

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05267567A (en) * 1991-03-25 1993-10-15 Tokyo Electron Ltd Formation of semiconductor film
US6391803B1 (en) * 2001-06-20 2002-05-21 Samsung Electronics Co., Ltd. Method of forming silicon containing thin films by atomic layer deposition utilizing trisdimethylaminosilane

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05267567A (en) * 1991-03-25 1993-10-15 Tokyo Electron Ltd Formation of semiconductor film
US6391803B1 (en) * 2001-06-20 2002-05-21 Samsung Electronics Co., Ltd. Method of forming silicon containing thin films by atomic layer deposition utilizing trisdimethylaminosilane

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
Y. Kim, 'Characteristics of ZrO2 gete dielectric deposited using Zr t-butoxide and Zr (NET2)4 precursors by plasma enhanced atomic layer deposition method', Journal of Applied Physics Vol. 92, No. 9, pages 5443 - 5447, 01 November 2002 *

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006060170A (en) * 2004-08-24 2006-03-02 Nec Electronics Corp Method for manufacturing capacitor and semiconductor device
JP2007013171A (en) * 2005-06-30 2007-01-18 Hynix Semiconductor Inc Method of manufacturing nand flash memory device
JP2009545138A (en) * 2006-07-21 2009-12-17 エーエスエム アメリカ インコーポレイテッド ALD of metal silicate film
JP2010219561A (en) * 2010-06-24 2010-09-30 Hitachi Kokusai Electric Inc Substrate processing apparatus and method of manufacturing semiconductor device
JP2011009752A (en) * 2010-07-02 2011-01-13 Hitachi Kokusai Electric Inc Substrate processing apparatus, method of manufacturing semiconductor device, and semiconductor device
US9234275B2 (en) 2012-12-11 2016-01-12 Tokyo Electron Limited Method and apparatus of forming metal compound film, and electronic product
JP2016018888A (en) * 2014-07-08 2016-02-01 豊田合成株式会社 Semiconductor device and method of manufacturing the same

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