WO2004100615A1

WO2004100615A1 - Driver circuit for an el lamp

Info

Publication number: WO2004100615A1
Application number: PCT/IB2004/050549
Authority: WO
Inventors: Alfred Grakist
Original assignee: Koninklijke Philips Electronics N.V.
Priority date: 2003-05-05
Filing date: 2004-04-29
Publication date: 2004-11-18

Abstract

In a driver circuit comprising a full-bridge circuit (MP, MN) for driving a load (EL) external to the driver circuit, a current control circuit (Cont) is coupled to the full-bridge circuit for controlling a current through the load in dependence upon the current through the load.

Description

DRIVER CIRCUIT FOR AN EL LAMP

The invention relates to a full-bridge driver circuit for a load, in particular for an electro-luminescence lamp.

Electro-luminescence lamps (EL) may be driven by a low frequency (200 -

400 Hz) alternating (AC) high voltage (100 - 300 V). A common topology for an EL-driver has two parts. The first part is an up-converter that converts a low DC input voltage into a high DC voltage. The second part converts the high DC voltage HV into a high AC voltage across the load (EL-lamp). This invention relates to the second part. An EL-lamp behaves like a capacitive load. To obtain the maximum AC voltage across the lamp a full-bridge topology is used.

As shown in Fig. 1, a full-bridge has two branches and four switching elements.

The conversion from the DC voltage HV to the AC load voltage is done by closing only current switches CS_LH and CS_RL during the first half of a low frequency cycle, and closing only current switches CS_RH and CS during the second half of the cycle. In addition to this basic switching function, there are additional requirements to make it optimal for an EL-lamp. The full-bridge circuit described in this document contains a combination of properties optimized for driving the capacitive EL-lamp.

In the market several EL-drivers are available which contain a full-bridge circuit. Overview of prior art with their disadvantages:

Sipex SP4438, Supertex HV826, ON Semiconductor MC33441: the charge and discharge currents of the EL-lamp are not adjustable.

Sipex SP4439: two components needed for current setting.

Toko TK6593 : not adjustable current sources in lower part of full-bridge. Switches in upper part. Fast voltage slopes will be present at the electrodes of the EL-lamp. Durel D372: fixed time for discharge and charge of the EL-lamp. The voltage across the lamp stops at 0 V for a moment during the positive and negative slope.

US Patent 6,297,597: EL driver with low side current mirrors. Fast voltage slopes will be present at the electrodes of the EL-lamp.

US Patent 6,320,323: EL driver with lamp discharge monitor. Lamp voltage monitors are used to generate optimal timmg signals. High voltage sensing circuit is needed. Two voltage monitors 106, 107 needed for full-bridge topology.

It is, inter alia, an object of the invention to provide a driver circuit optimized for driving the capacitive EL-lamp. The invention is defined by the independent claims. Advantageous embodiments are defined in the dependent claims.

In accordance with the invention, in a driver circuit comprising a full-bridge circuit for driving a load external to the driver circuit, a current control circuit is coupled to the full-bridge circuit for controlling a current through the load in dependence upon the current through the load.

These and other aspects of the invention will be apparent from and elucidated with reference to the embodiments described hereinafter.

In the drawings:

Fig. 1 shows a general block diagram of a full-bridge driver circuit; Fig. 2 shows signals of an optimized full-bridge driver circuit in accordance with the present invention; Fig. 3 shows an embodiment of a full-bridge driver circuit with single, low voltage, constant slope control in accordance with the present invention; and Fig. 4 shows signals occurring in the embodiment of Fig. 3.

The driver circuit described below is optimized for driving the capacitive EL- lamp. First the properties of the new driver circuit are described. Then the new full-bridge circuit is discussed. A preferred embodiment of the driver circuit in accordance with the present invention is a small circuit that has all these properties and uses a current based control not found in the prior art. Fig. 2 shows the signals of a full-bridge driver circuit optimized for driving an EL-lamp. This optimized full-bridge has tlie following properties.

1. The charge and discharge current is limited.

The slopes of the AC voltage across tlie EL-lamp are slow to prevent audible noise coming from the EL-lamp. For this reason current sources are used to charge and discharge the capacitive load with a defined voltage slope.

2. No fast voltage slope on either of the electrodes.

A common mode voltage step will not generate audible noise from the lamp but can cause EMC problems to surrounding circuits. Therefore common mode voltage steps are prevented. 3. Low current consumption from the HV supply.

The current consumption from the HV supply determines the efficiency. Efficiency is important in battery operated applications and should be as high as possible. During every voltage transition across the load, one electrode must be charged via CSLH or CSRH and the other must be discharged via CSRL or CSLL. Minimum current is drawn from the HV supply if the charge of one electrode starts after the otlier electrode has first been discharged. With this sequence tlie current from the HV supply will only flow during tlie charge time (t_pos,ch and t_negjch) and not during the discharge time (t_pos,dis and t__eg>dis). During the hold time (t_p-_Sjh_id and t-_βg,hoid) current consumption is low. 4. Charge and discharge current are equal With equal current values for both tlie charge current (CSLH/CSRH) and discharge current (CSRL/CSLL) the voltage slopes on both electrodes are equal and the voltage slope across the lamp will be constant during the whole transition from +VHV to -VHV and -VHV to +VHV J. Current is adjustable.

To a full-bridge circuit lamps of different sizes can be connected. They will have different capacitance. To obtain tlie same non-disturbing voltage slope across tlie lamp for different lamp sizes, tlie current is adjustable. To minimize external components, both discharge and charge current are set by tlie same external component. 6. Charge starts immediately after discharge.

Maximum effective voltage across tlie load is obtained if there is no delay between end of discharge and start of charge. In that case the transition from discharge (t_neg>dis tpos,dis) to charge (t_neg,-h/tpos,ch) is not visible on tlie lamp voltage. The discharge time (t_neg,dis/t_Pos,dis) is dependent on load capacitance and current. The capacitance is different for different lamp sizes and changes a bit during lifetime. The user can choose any current value to obtain a required voltage slope. The start-time adapts itself to the discharge-time. In Fig. 2, a high current setting is indicated by a thin line, while a low current setting is indicated by a fat line. 7. Current sources do not completely turn-off after charging.

During

and t_neg>h_id the current consumption from HV must be low, but the current sources should not be completely turned -off. The load voltage must remain at the HV voltage level, even when there is some leakage in the lamp or when tlie HV voltage increased during the hold-time (t_negιhoid and t_pos,hoid)-

Fig. 3 shows a preferred embodiment of tlie full-bridge driver circuit with single, low-voltage, constant slope control circuit. This circuit has all above-mentioned properties to efficiently convert a high voltage DC voltage (HV) into an AC voltage with controlled voltage slopes at the terminals EL1/EL2.

The circuit does not sense Hie high voltage at both sides of the load like in US Patent 6,320,323. The control part Cont within Hie dashed box is a single, low voltage circuit that monitors and controls the load. It uses the load current as input. For tlie timing the circuit only has one low frequency clock signal input which determines the lamp frequency. The timing for charge and discharge is handled by the circuit itself.

The + and - signs at tlie load shown in Fig. 3 are only to define tlie polarity of the load voltage, the real load has no + or - terminal.

The Fig. 3 circuit comprises:

Two high-side current mirrors made with high voltage pmos transistors.

Components: MP_lhl/MP_lh2 and MP_rhl/MP_rh2. They amplify tlie control current I_hs to charge ELI or EL2. The mirror has a high ratio (e.g. 20x), as is illustrated by tlie area indications 10/6 and 200/6 shown next to the respective transistors. Two high voltage diodes

Components: D_l and D_r. They provide tlie current path to ground when ELI or EL2 is discharged.

Four high voltage nmos transistors

Components: MN_lh, MN_11, MN_rl, MN_rh. They handle the high voltages. Below these transistors low-voltage circuitry can be used for current and timing control. They also function as switches to select tlie polarity of tlie lamp voltage.

Clock input

Components: input elk and inverter DO. The elk input switches tlie two pairs of high voltage nmos transistors on and off. I_nfLoad current source

Components: R_ext, TN_3, TN_4, D_5, 1_bias, D_4 and V_ref. The load current source determines the charge and discharge current of tlie load. I -ias, D_4 and V_ref make a reference voltage that is fed to the Darlington connected emitter-follower TN_4 and TN_3. This emitter-follower and R_ext form a current source. The current into the collector of TN_3 will be constant as long as there is current available from the load. This current can be adjusted by the (external) resistor R_ext coupled to a current setting node curset. Charge current control

Components: D_8, TN_0, TN_2, V_reg, C_0. This part regulates tlie charge current to the load in a closed regulation loop.

Six different states can be distinguished. See the signals in Fig. 4. tp_∞.dis ■' Discharge ELI side of load. Discharge the positive load voltage (dash line). elk switches to high (V_dd), MN_11 and MN_rh turn-on, MN li and MN_rl turn-off. Via MN_11 tlie I_ref current source is connected to ELI and the load is discharged. The dash line indicates the current path. The voltage at Vsource is limited to a few volts by the high voltage nmos transistor MN_11. There is sufficient current available from the load so TN_0 will not supply any current. No current is drawn from HV. The current through D_5 is zero. The ELI voltage decreases at a constant rate determined by the load capacitance and I_rβf. This continues until ELI is discharged and the load caimot supply the I_rβf current anymore. This state has tlie properties 1, 2, 3 and 5. t_{n g}. _h •' Charge EL2 side of load. Charge the negative load voltage (dash-dot line) ELI is discharged. Since the load cannot supply the I_ref current, TN_0 will start to supply current to tlie I_ref current source. This current I_hs flows via MN_rh to tlie high side current mirror that amplifies the current to I_r and charges the EL2 side of the load. A closed regulation loop now exists. The I_hs will increase until tlie current through the load (=I_rh=Iιι) is equal to I_rβf (I_hs ^<<:Iιι)- The voltage at EL2 increases with a constant rate whic is equal to the discharge rate of ELI during t_p-s,dis- HV now supplies only slightly more than the charge current, namely (1+1/n) x I_ref. The current path is shown by tlie dash-dot line. This state has the properties 1, 2, 3, 4, 5 and 6. During Hie transition from discharge to charge there is no fast slope on tlie electrodes of tlie load as occurs in the Toko TK6593 and in the US Patent 6,297,597. t_mg iou •' Hold negative load voltage (dot line)

When EL2 has reached V_HV, tlie output current of the current mirror (l ) will become zero although the input current 1^ is not. Again, not enough current can be delivered from the load to the I_ref current source. It decreases to zero. Diode D_5 will come into conduction and the current from I_bias will flow to TN_3. This will pull down the base voltage of TN_4, and thereby reduce the voltage at R_ext. The current through TN_2 has a fixed ratio to the TN_3 current, so TN_2 will drop to I_bias/10 (5 μA). In this way I_hs is reduced to low value (I_hoia).

HV only supplies a small current (I_hoid) in this condition. The dot line indicates both current paths. This small input current will result in an output current when there is a leakage current in the load, or when the HV voltage is increased. The ELI voltage is kept at the HV level in this way. This state has property 3 and 7. t_mg,_dis ■' Discharge EL2 side of load. Discharge the negative load voltage.

Comparable to t_pos,dis. elk switches to low. EL2 is now discharged instead of ELI and the load voltage is negative. t_p0SιCι, : Charge ELI side of load. Charge the positive load voltage.

Comparable to t_neg,c_h. ELI is now charged instead of EL2 and tlie load voltage is positive. tpos.hoid •' Hold positive load voltage.

Comparable to t-_egιhoid. ELI is charged, EL2 is discharged and the load voltage is positive.

The main properties of the driver circuit in accordance with a preferred embodiment of the invention are: a full-bridge circuit having a limited current to reverse the voltage across the capacitive load (property 1), which current is (almost) continuous and constant during the complete voltage transition (property 4 and 6), and realized by single current control circuit, using tlie load current as input for tlie current control. Advantageously, the inventive driver circuit uses the same current source to define Hie load current in all stages. Prior art circuits have four current sources.

Some kind of sensing is needed to have a continuous slope across the load without fast common mode voltage steps on tlie electrodes (property 2). With use of the US Patent 6,320,323, this can also be obtained, although both sides of the load need a monitor circuit and it is not described how the output should control the current sources.

US Patent 6,297,597 and the Toko circuit TK6593 obtain a continuous slope across the load, but fast voltage slopes are present on the electrodes. In an advantageous embodiment, a low current consumption is obtained by die proper switching sequence (property 3).

In another advantageous embodiment, tlie current sources switch to a reduced current after the voltage transition is completed (property 7). The current through tlie load will automatically reduce to zero when the load voltage has reached the supply voltage. In tlie driver circuit in accordance with the present invention, the input current of tlie high side mirror is switched to a lower value, thereby reducing the current consumption from the supply. Also the current consumption from the low-voltage supply is reduced, since the I_ref current is reduced. In another advantageous embodiment, the full slope is adjustable by one component (property 5). It is common knowledge how to make multiple equal current sources whose value is determined by one component. This circuit however has one reference current source (single current control circuit) so it is even easier to control the value with one component. No additional current consuming current mirroring is needed.

In a preferred embodiment of the invention, the current control circuit Cont: a, discharges the load with a constant current, b detects end-of discharge, c charges the load with a regulated charge current, detects end-of -charge, e. switches to a small hold current, f. senses only one terminal of the load for end-of-discharge and end-of-charge, g. is used for both the positive and negative load voltage slope, and h. does not need memory elements to define states.

As to aspect e, tlie end-of-charge information is advantageously used to switch to a lower input current of Hie high-side current mirror to save supply current in the EL-driver after tlie load is charged.

As to aspect f, end-of-discharge and end-of-charge sensing is done at the same terminal of the load, i.e. the terminal connected to the bridge transistor MN that is conducting.

As to aspect h, three states can be distinguished: discharge, charge and hold. A common way to implement this is to use memory elements (flip-flops) to define the states. On command of the sense circuit(s) the system goes from state to state. The present invention does not contain memory elements to define the states. It is a continuous function and Hie state is determined by tlie voltage and current at node Vsource. This solution needs only a small number of components to implement, as the circuit can go back from charge state to discharge state by changing the voltage/current at the load terminals. A circuit with memory elements will normally not do that because that functionality is not required. Once is the transition from discharge to charge is made, it camiot be reversed unless extra fmictionality is added which allows a transition back to charge.

It should be noted that the above-mentioned embodiments illustrate rather than limit the invention, and that those skilled in the art will be able to design many alternative embodiments without departing from tlie scope of the appended claims. In the claims, any reference signs placed between parentheses shall not be construed as limiting the claim. The word "comprising" does not exclude tlie presence of elements or steps other than those listed in a claim. The word "a" or "an" preceding an element does not exclude the presence of a plurality of such elements. The mere fact that certain measures are recited in mutually different dependent claims does not indicate that a combination of these measures caimot be used to advantage.

Claims

CLAIMS:

1. A driver circuit, comprising: a full-bridge circuit (MP, MN) for driving a load (EL) external to the driver circuit; and a current control circuit (Cont) coupled to tlie full-bridge circuit for controlling a current through the load in dependence upon the current through the load.

2. A driver circuit as claimed in claim 1, wherein the full bridge circuit includes first (MP_lh2) and second (MP_rh2) transistors for respectively coupling first (ELI) and second (EL2) terminals of the load (EL) to a supply line (HV), and third (MN_11) and fourth (MN_rl) transistors for respectively coupling said first (ELI) and second (EL2) terminals of the load to said current control circuit (Cont).

3. A driver circuit as claimed in claim 2, further comprising switch control means (elk, D_0, MP, MN_lh, MN_rh) for switching said transistors on and off, said third and fourth transistors being switched in anti-phase, said switch control means comprising switched current mirrors (MP, MN_lh, MN_rh) for switching said first and second transistors in anti-phase with said third and fourth transistors, respectively.

4. A driver circuit as claimed in claim 1, wherein the current control circuit comprises charge current control means (D_8, TN_0, TN_2, V_reg, C_0) for regulating a charge current to the load in a closed regulation loop.

5. A driver circuit as claimed in claim 1, wherein there is no delay between an end of a discharge period and a start of a charge period immediately following the discharge period.

6. A driver circuit as claimed in claim 1, wherein both discharge current and charge current are set by a same external component (R_ext).

7. A driver circuit as claimed in claim 1, wherein said current is substantially continuous and constant during a complete voltage transition in which a voltage across the load is reversed.

8. A driver circuit as claimed hi claim 1, wherein current mirrors in tlie full- bridge circuit do not completely turn-off after charging.

9. An electro-luminescence lamp circuit, comprising: a load formed by an electro -luminescence lamp (EL); and a driver circuit as claimed in claim 1 for driving tlie electro-luminescence lamp

(EL).