WO2004105090A3 - Structure and method for forming a trench mosfet having self-aligned features - Google Patents

Structure and method for forming a trench mosfet having self-aligned features Download PDF

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Publication number
WO2004105090A3
WO2004105090A3 PCT/US2004/015059 US2004015059W WO2004105090A3 WO 2004105090 A3 WO2004105090 A3 WO 2004105090A3 US 2004015059 W US2004015059 W US 2004015059W WO 2004105090 A3 WO2004105090 A3 WO 2004105090A3
Authority
WO
WIPO (PCT)
Prior art keywords
silicon layer
trench
exposed surface
self
forming
Prior art date
Application number
PCT/US2004/015059
Other languages
French (fr)
Other versions
WO2004105090A2 (en
Inventor
Robert Herrick
Becky Losee
Dean Probst
Original Assignee
Fairchild Semiconductor
Robert Herrick
Becky Losee
Dean Probst
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Family has litigation
First worldwide family litigation filed litigation Critical https://patents.darts-ip.com/?family=33450258&utm_source=google_patent&utm_medium=platform_link&utm_campaign=public_patent_search&patent=WO2004105090(A3) "Global patent litigation dataset” by Darts-ip is licensed under a Creative Commons Attribution 4.0 International License.
Application filed by Fairchild Semiconductor, Robert Herrick, Becky Losee, Dean Probst filed Critical Fairchild Semiconductor
Priority to JP2006533042A priority Critical patent/JP4981450B2/en
Priority to DE112004000872.7T priority patent/DE112004000872B4/en
Priority to KR1020077005684A priority patent/KR100804865B1/en
Publication of WO2004105090A2 publication Critical patent/WO2004105090A2/en
Publication of WO2004105090A3 publication Critical patent/WO2004105090A3/en

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Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • H01L29/7801DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
    • H01L29/7802Vertical DMOS transistors, i.e. VDMOS transistors
    • H01L29/7813Vertical DMOS transistors, i.e. VDMOS transistors with trench gate electrode, e.g. UMOS transistors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/40Electrodes ; Multistep manufacturing processes therefor
    • H01L29/41Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
    • H01L29/417Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions carrying the current to be rectified, amplified or switched
    • H01L29/41725Source or drain electrodes for field effect devices
    • H01L29/41766Source or drain electrodes for field effect devices with at least part of the source or drain electrode having contact below the semiconductor surface, e.g. the source or drain electrode formed at least partially in a groove or with inclusions of conductor inside the semiconductor
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • H01L29/7801DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
    • H01L29/7802Vertical DMOS transistors, i.e. VDMOS transistors
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S257/00Active solid-state devices, e.g. transistors, solid-state diodes
    • Y10S257/905Plural dram cells share common contact or common trench

Abstract

In accordance with an embodiment of the present invention, a semiconductor device is formed as follows. An exposed surface area of a silicon layer where silicon can be removed is defined. A portion of the silicon layer is removed to form a middle section of a trench extending into the silicon layer from the exposed surface area of the silicon layer. Additional exposed surface areas of the silicon layer where silicon can be removed are defined. Additional portions of the silicon layer are removed to form outer sections of the trench such that the outer sections of the trench extend into the silicon layer from the additional exposed surface areas of the silicon layer. The middle section of the trench extends deeper into the silicon layer than the outer sections of the trench.
PCT/US2004/015059 2003-05-20 2004-05-14 Structure and method for forming a trench mosfet having self-aligned features WO2004105090A2 (en)

Priority Applications (3)

Application Number Priority Date Filing Date Title
JP2006533042A JP4981450B2 (en) 2003-05-20 2004-05-14 Method for forming self-aligned trench MOSFET
DE112004000872.7T DE112004000872B4 (en) 2003-05-20 2004-05-14 Arrangement of a trench MOSFET with self-alignment features
KR1020077005684A KR100804865B1 (en) 2003-05-20 2004-05-14 A semiconductor device having self-aligned features and a method for forming it

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US10/442,670 US6916745B2 (en) 2003-05-20 2003-05-20 Structure and method for forming a trench MOSFET having self-aligned features
US10/442,670 2003-05-20

Publications (2)

Publication Number Publication Date
WO2004105090A2 WO2004105090A2 (en) 2004-12-02
WO2004105090A3 true WO2004105090A3 (en) 2005-11-17

Family

ID=33450258

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/US2004/015059 WO2004105090A2 (en) 2003-05-20 2004-05-14 Structure and method for forming a trench mosfet having self-aligned features

Country Status (6)

Country Link
US (6) US6916745B2 (en)
JP (2) JP4981450B2 (en)
KR (2) KR100804864B1 (en)
DE (2) DE202004021554U1 (en)
TW (1) TWI389199B (en)
WO (1) WO2004105090A2 (en)

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US7344943B2 (en) 2008-03-18
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US20040232481A1 (en) 2004-11-25
WO2004105090A2 (en) 2004-12-02
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US20110003449A1 (en) 2011-01-06
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JP2007500454A (en) 2007-01-11
US8034682B2 (en) 2011-10-11

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