WO2004109775A3 - Formation of highly dislocation free compound semiconductor on a lattice mismatched substrate - Google Patents

Formation of highly dislocation free compound semiconductor on a lattice mismatched substrate Download PDF

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Publication number
WO2004109775A3
WO2004109775A3 PCT/US2004/016481 US2004016481W WO2004109775A3 WO 2004109775 A3 WO2004109775 A3 WO 2004109775A3 US 2004016481 W US2004016481 W US 2004016481W WO 2004109775 A3 WO2004109775 A3 WO 2004109775A3
Authority
WO
WIPO (PCT)
Prior art keywords
compound semiconductor
formation
substrate
free compound
lattice mismatched
Prior art date
Application number
PCT/US2004/016481
Other languages
French (fr)
Other versions
WO2004109775A2 (en
Inventor
Fatemeh Shahedipour-Sandvik
Di Wu
Original Assignee
Univ New York State Res Found
Fatemeh Shahedipour-Sandvik
Di Wu
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Univ New York State Res Found, Fatemeh Shahedipour-Sandvik, Di Wu filed Critical Univ New York State Res Found
Publication of WO2004109775A2 publication Critical patent/WO2004109775A2/en
Priority to US11/342,095 priority Critical patent/US8889530B2/en
Publication of WO2004109775A3 publication Critical patent/WO2004109775A3/en

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02656—Special treatments
    • H01L21/02664—Aftertreatments
    • H01L21/02694—Controlling the interface between substrate and epitaxial layer, e.g. by ion implantation followed by annealing
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02367—Substrates
    • H01L21/0237—Materials
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02436—Intermediate layers between substrates and deposited layers
    • H01L21/02439—Materials
    • H01L21/02455—Group 13/15 materials
    • H01L21/02458—Nitrides
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02518—Deposited layers
    • H01L21/02521—Materials
    • H01L21/02538—Group 13/15 materials
    • H01L21/0254—Nitrides

Abstract

A highly dislocation free compound semiconductor, e.g. AlxInyGa1-x-yN (0<x, y<1), is formed on a lattice mismatched substrate, 24 e.g. Si, by first depositing a polycrystalline buffer layer 22 on the substrate. An amorphous layer 28 is then created at the interface of the substrate and the polycrystalline buffer layer, e.g. through ion implantation. A monocrystalline template layer 30 of the compound semiconductor is then deposited on the buffer layer, and an epilayer 32 of the compound semiconductor is grown on the template layer. A compound semiconductor based device structure may be formed in the epilayer.
PCT/US2004/016481 2003-06-03 2004-05-25 Formation of highly dislocation free compound semiconductor on a lattice mismatched substrate WO2004109775A2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
US11/342,095 US8889530B2 (en) 2003-06-03 2006-01-27 Formation of highly dislocation free compound semiconductor on a lattice mismatched substrate

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US47555203P 2003-06-03 2003-06-03
US60/475,552 2003-06-03

Related Child Applications (2)

Application Number Title Priority Date Filing Date
US10563179 A-371-Of-International 2004-05-25
US11/342,095 Continuation-In-Part US8889530B2 (en) 2003-06-03 2006-01-27 Formation of highly dislocation free compound semiconductor on a lattice mismatched substrate

Publications (2)

Publication Number Publication Date
WO2004109775A2 WO2004109775A2 (en) 2004-12-16
WO2004109775A3 true WO2004109775A3 (en) 2008-01-17

Family

ID=33511692

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/US2004/016481 WO2004109775A2 (en) 2003-06-03 2004-05-25 Formation of highly dislocation free compound semiconductor on a lattice mismatched substrate

Country Status (1)

Country Link
WO (1) WO2004109775A2 (en)

Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61189621A (en) * 1985-02-18 1986-08-23 Sharp Corp Compound semiconductor device
US4845044A (en) * 1987-07-29 1989-07-04 Murata Manufacturing Co., Ltd. Producing a compound semiconductor device on an oxygen implanted silicon substrate
US5141894A (en) * 1989-08-01 1992-08-25 Thomson-Csf Method for the manufacture, by epitaxy, of monocrystalline layers of materials with different lattice parameters
FR2774511A1 (en) * 1998-01-30 1999-08-06 Commissariat Energie Atomique SUBSTRATE COMPLIANT IN PARTICULAR FOR A DEPOSIT BY HETERO-EPITAXY
US6032611A (en) * 1993-10-14 2000-03-07 Neuralsystems Corporation Apparatus for forming single-crystalline thin film by beam irradiator and beam reflecting device
US6392257B1 (en) * 2000-02-10 2002-05-21 Motorola Inc. Semiconductor structure, semiconductor device, communicating device, integrated circuit, and process for fabricating the same
US6464780B1 (en) * 1998-01-27 2002-10-15 Forschungszentrum Julich Gmbh Method for the production of a monocrystalline layer on a substrate with a non-adapted lattice and component containing one or several such layers

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61189621A (en) * 1985-02-18 1986-08-23 Sharp Corp Compound semiconductor device
US4845044A (en) * 1987-07-29 1989-07-04 Murata Manufacturing Co., Ltd. Producing a compound semiconductor device on an oxygen implanted silicon substrate
US5141894A (en) * 1989-08-01 1992-08-25 Thomson-Csf Method for the manufacture, by epitaxy, of monocrystalline layers of materials with different lattice parameters
US6032611A (en) * 1993-10-14 2000-03-07 Neuralsystems Corporation Apparatus for forming single-crystalline thin film by beam irradiator and beam reflecting device
US6464780B1 (en) * 1998-01-27 2002-10-15 Forschungszentrum Julich Gmbh Method for the production of a monocrystalline layer on a substrate with a non-adapted lattice and component containing one or several such layers
FR2774511A1 (en) * 1998-01-30 1999-08-06 Commissariat Energie Atomique SUBSTRATE COMPLIANT IN PARTICULAR FOR A DEPOSIT BY HETERO-EPITAXY
US6392257B1 (en) * 2000-02-10 2002-05-21 Motorola Inc. Semiconductor structure, semiconductor device, communicating device, integrated circuit, and process for fabricating the same

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
PATENT ABSTRACTS OF JAPAN vol. 0110, no. 17 (E - 471) 17 January 1987 (1987-01-17) *

Also Published As

Publication number Publication date
WO2004109775A2 (en) 2004-12-16

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