WO2005006458A2 - Test structures and methods - Google Patents

Abstract

This invention generally relates to apparatus and methods for testing molecular electronic devices, especially organic light emitting diodes (OLEDs). More particularly the invention relates to substrates and masks for such devices, particularly including test structures, and methods of use of these. We therefore describe a substrate having formed thereon a plurality of organic molecular electronic devices, in particular OLEDs, and at least one test structure, the test structure being configured for evaluating the devices or for characterising a layer of active organic material of the devices, or, for example, for monitoring ingress of a contaminant.

Description

TEST STRUCTURES AND METHODS

This invention generally relates to apparatus and methods for testing molecular electronic devices, especially organic light emitting diodes. More particularly the invention relates to substrates and masks for such devices, particularly including test structures, and methods of use of these.

Organic light emitting diodes (OLEDs) comprise a particularly advantageous form of electro-optic display. They are bright, colourful, fast-switching, provide a wide viewing angle and are easy and cheap to fabricate on a variety of substrates. Organic (which here includes organometallic) LEDs may be fabricated using either polymers or small molecules in a range of colours (or in multi-coloured displays), depending upon the materials used. Examples of polymer-based organic LEDs are described in WO 90/13148, WO 95/06400 and WO 99/48160; examples of so called small molecule based devices are described in US 4,539,507.

A typical OLED device comprises two layers of organic material, one of which is a layer of light emitting material such as a light emitting polymer (LEP), oligomer or a light emitting low molecular weight material, and the other of which is a layer of a hole transporting material such as a polythiophene derivative or a polyaniline derivative.

A cross-section through a basic structure 100 of a typical organic LED is shown in Figure l . A glass or plastic substrate 102 supports a transparent anode layer 104 comprising, for example, indium tin oxide (1TO) on which is deposited a hole transport layer 106, an electroluminescent layer 108, and a cathode 110. The electroluminescent layer 108 may comprise, for example, a PPV (poly(p-phenylenevinylene)) and the hole transport layer 106, which helps match the hole energy levels of the anode layer 104 and electroluminescent layer 108, may comprise a conductive transparent polymer, for example PEDOT:PSS (polystyrene-sulphonate-doped polyethylene-dioxythiophene) from Bayer AG of Germany. Cathode layer 110 typically comprises a low work function metal such as calcium or barium and may include an additional layer immediately adjacent electroluminescent layer 108, such as a layer of lithium fluoride, for improved electron energy level matching. Contact wires 114 and 116 to the anode and the cathode respectively provide a connection to a power source 118. The same basic structure may also be employed for small molecule devices.

In the example shown in Figure la light 120 is emitted through transparent anode 104 and substrate 102 and the cathode is reflective; such devices are referred to as "bottom emitters". Devices which emit through the cathode may also be constructed, for example by keeping the thickness of cathode layer 110 less than around 50-100 nm so that the cathode is substantially transparent.

Organic LEDs may be deposited on a substrate in a matrix of pixels to form a single or multi-colour pixellated display. A multicoloured display may be constructed using groups of red, green, and blue emitting pixels. In such displays the individual elements are generally addressed by activating row (or column) lines to select the pixels, and rows (or columns) of pixels are written to, to create a display. So-called active matrix displays have a memory element, typically a storage capacitor and a transistor, associated with each pixel whilst passive matrix displays have no such memory element and instead are repetitively scanned, somewhat similarly to a TV picture, to give the impression of a steady image.

Figure lb shows a simplified cross-section through a practical example of a passive matrix OLED display 150 in which like elements to those of figure la are indicated by like reference numerals. The substrate 102 typically comprises 0.7 mm or 1.1 mm glass and the anode layer which may comprise a substantially transparent layer of ITO adjacent the substrate, typically of around 150 nm thickness, over which a metal contact layer is provided, the metal contact layer sometimes being refeπ-ed to as an anode metal layer. The metal contact layer typically has a thickness of around 500 nm and may comprise aluminium or a layer of aluminium sandwiched between layers of chrome. Glass substrates coated with ITO and contact metal may be purchased, for example from Coming, USA. The contact metal over the ITO helps provide reduced resistance pathways where the anode connections do not need to be transparent, in particular for external contacts to the device. The contact metal may be removed from the ITO where it is not wanted, in particular where it would otherwise obscure electroluminescing areas of the display, by a process of photolithography followed by etching (these are standard processes known in the semicondutor industry) .

As previously described a substantially transparent hole transport layer 106 is provided over the anode metal, typically comprising around 200 nm of PEDOT, followed by an eleclroluminescent layer 108 of light emitting polymer, typically around 70 nm thickness. These active organic layers may be deposited by spin coating, for example from aqueous solution or by inkjet printing as described further below. Where a spin coating deposition technique is employed the organic layers may be deposited over both ITO from which contact metal has been removed and over ITO bearing contact metal providing that the organic layer is sufficiently thick to provide adequate step coverage. Organic material may then be removed from areas where it is not wanted, for example by mechanical scraping, or by laser ablation as described in the applicant's earlier UK patent application number 0300105.4 filed on 3^rd January 2003, or by plasma etching as described in WO01/39287. Where laser ablation is used a preferred excimer based process tool is the M5000P laser tool available from Exitech of Oxford, UK operating at a wavelength of 248 n and with a fluence dependent upon the type and thickness of materials used and determined, for example, by routine experiment.

As shown in figure lb the hole transport 106 and electroluminescent 108 layers are subdivided either physically or notionally into a plurality of pixels 152, defined by the intersection of a plurality of mutually perpendicular anode lines and cathode lines defined in anode metal 105 and cathode layer 110 respectively. In the vertical cross- section shown in figure lb a plurality of mutually electrically insulated conductive lines 154 defined in the cathode layer 1 10 runs into the page and a cross-section through one anode line 158 of a plurality of anode lines in anode metal layer 105 running at right angles to the cathode lines are shown. An electroluminescent pixel 152 at the intersection of a cathode line and an anode line may be addressed by applying a voltage between the relevant lines. The above mentioned OLED materials, and in particular the light emitting polymer material and the cathode, are susceptible to oxidation and to moisture. The device is therefore encapsulated in a metal can 11 1 which is attached by UV-curable epoxy glue 113 onto anode metal layer 105, small glass beads within the glue preventing the metal can touching and shorting out the contacts. As shown in figure lb the anode metal layer 105 provides external contacts to the display 150, in preferced arrangements for both anode and cathode connections to the OLEDs. To achieve this the organic layers may be removed from patterned portions of the anode metal layer, for example by laser ablation prior to deposition of the cathode layer, so that the cathode lines may be connected to anode metal providing external cathode connections. For simplicity anode metal to cathode contacts are not shown in figure lb. Preferably the anode metal contacts are thinned where they pass under the lip of the metal can 111 to facilitate exposure of glue 1 13 to UN light for curing.

The cathode layer 110, as previously described, comprises a layer of barium or calcium, typically around 50 nm thickness, over which is provided a thicker layer of aluminium, typically around 100 nm, which is a better conductor. The cathode layers may be deposited by physical vapour deposition using a first shadow mask for the calcium and a second shadow mask for the aluminium. Mutual electrical isolation of cathode lines is achieved through the use of cathode separators (not shown in figure lb) as described later.

Background prior art relating to the testing and monitoring of conventional silicon semiconductor devices is described in US 2002/0130675 (describes thin film silicon transistor testing), US 4,343,688, GB 1,535,902, JP 03-0278552, JP 02-0035760 and EP 0665577.

Heretofore organic molecular electronic systems such as the display shown in figure lb have been fabricated along the lines described above but large scale manufacture of the devices is difficult because of the relatively large number of variables which must be controlled. The present invention addresses these difficulties and by making use of embodiments of the invention has for the first time achieved production scale manufacture of passive matrix OLED displays. According to a first aspect of the present invention there is therefore provided a substrate having fom-ed thereon a plurality of organic molecular electronic devices and at least one test structure, said test structure being configured for evaluating said devices.

Preferably the electronic devices comprise organic light emitting diodes, for example configured as a passive matrix OLED display. By incorporating one or more test structures onto a substrate for an OLED display the fabrication steps mentioned above may be monitored and controlled in order to achieve devices with consistent, reliable and repeatable performance. This enables embodiments of the invention to be employed to scale up fabrication of devices in a laboratory to production line manufacture.

In one embodiment of the invention the test structure is configured to monitor ingress of a contaminant such as water or oxygen, and comprises an exposed layer of material whose optical properties change on reacting with the contaminant. Preferably the material is one which is used in fabrication of the devices to avoid the need for an additional deposition step. In a particularly preferred embodiment a bare layer of cathode material such as calcium or barium is employed.

In another embodiment the test structure comprises a reduced size matrix of OLEDs to evaluate crosstalk between passive matrix pixels. This may be caused, for example, by poor organic layer deposition or ink-jet leakage. With this structure one of the test OLEDs may be driven and the others inspected either visually in the dark, or electronically, to determine whether pixels which are not driven electroluminesce. It is therefore preferable that the test matrix has a size of at least two pixels by two pixels so that at least one alternative conduction path may be made available by faulty pixels, as described later.

In another embodiment the test structure is configured for evaluating properties of one of more of the (active) organic layers, such as the resistance or conductance of PEDOT with or without overlying light emitting polymer. Thus the test structure may have both hole transport and light emitting layers, or just a hole transport layer or, with ink-jet printing or by employing laser ablation prior to spin coating, just a light emitting layer. Such a test structure preferably comprises a comb-like structure of interdigitated electrodes since this facilitates electrical measurements on relatively low conductivity organic material. Preferably a plurality of sets of electrodes are employed in parallel, for similar reasons. In a particularly prefeired arrangement of the test structure the electrodes are disposed on a pixelated arrangement of organic layers such as a pixelated arrangement of wells containing the organic material, so as to mimic conditions in the actual display. More preferably this pixelated structure is extended beyond the region in which the electrodes are located to provide a guard band of dummy cells or pixels in the vicinity of the cells or pixels on which the electrodes are sited. This is because experimentally it is observed that edge pixels dry differently from other pixels and may therefore not have representative properties. Thus, for example, the test structure may be located in the centre of a matrix of wells when used for evaluating a passive matrix display. For example electrodes may be provided on a 3x3 matrix of pixels in an at least partial 5x5 pixel matrix. The electrodes may comprise ITO, preferably with overlying aluminium metalisation for reduced resistance.

In the above described test structure the interdigitated electrodes may be replaced by other electrode arrangements which facilitate measurement of an organic layer's properties across a long, naπ'ow gap, and thus any suitable equivalent structure may be employed. It will further be recognised that the fingers of the interdigitated structure need not be straight.

A similar test structure to that described above may be employed with a cathode layer on top to detemiine step coverage of the cathode layer over the anode metal and organic layers, that is over multiple anode lines or, when viewed in cross-section, pillars. Since the step up from ITO to anode metal is relatively high there is a risk of incomplete coverage of such a step, and a consequent risk of punch-through (that is, in effect, shorts) at the comers of such a step where the electric field is high. The above described structure with a cathode layer on top can be used to evaluate the risk of shorts and related problems. In a further embodiment the test structure is configured to evaluate the electrical connection between a cathode line and anode metal in a substrate employing such connections. For a substrate fabricated using spin coating rather than ink-jet printing this structure can also be used to evaluate the effectiveness of the removal of organic material from underlying anode metal. Thus the test structure comprises a layer of cathode material in contact with a layer of anode material, preferably the cathode material overlying the anode material and separated therefrom by a layer of dielectric, a contact region being provided by a window in this dielectric layer. The cathode material contacting the anode material may consist of or include low work function material such as calcium, barium or lithium fluoride in addition to or instead of, for example to check the evenness of deposition of this material. The test structure then approximates a leaky capacitor since these low work function materials are in general not highly conductive.

This test structure may comprise a chain or ladder of anode-cathode connections to amplify any defects in the anode-cathode contacts. However in a preferred arrangement the test structure has four connections to the anode-cathode contact, two for each of the anode and cathode layers, to facilitate four-terminal or "Kelvin" resistance measurements. Such a structure allows the interlayer resistance to be measured for a range of electrical currents flowing through the contact. Where the dielectric window includes active organic material such as PEDOT and/or light emitting polymer such a structure facilitates four-tenninal measurements on this organic material, which simplifies measurement of forward and reverse current voltage characteristics, leakage current and the like.

Optionally an additional electrode strip, preferably of anode material, may be positioned nearby the above test structures to check for stray drips in an ink-jet deposition process. Such a strip may be positioned at a distance of between one and five pixel lengths from the structure, preferably approximately two pixel lengths from the structure.

In another embodiment, where the molecular electronic devices are arranged in a matrix the test structure may comprise an extension of this matrix such as an additional row of a passive matrix display. The devices in this additional row may then be provided with separate electrodes to those of the main display, for example by breaking the anode lines adjacent the additional row and taking the anode connections for the additional row out to a separate set of contacts on the substrate. Such an arrangement allows devices within this additional row to be individually addressed without the risk of crosstalk energising other devices within the substrate or, in embodiments, within the passive matrix display. This facilitates accurate measurements of properties of devices in an active matrix display such as diode leakage, efficiency, earner mobility and the like, using devices which can be expected to closely approximate those within the actual display. In a preferred embodiment one or more additional rows of dummy devices or pixels is provided beyond the additional row on which measurements are made, again to reduce edge effects associated with the drying of the organic layers of a passive matrix display. These additional rows of dummy devices preferably lack an overlying cathode.

An extension of this structure can be used to evaluate step coverage by the cathode layer by depositing strips of cathode with and without underlying topography. More particularly one cathode strip may be deposited over banks and wells (or the cathode strip over the additional row of test devices may be employed for this purpose) and a second adjacent strip of cathode material may be deposited over a portion of the substrate lacking these banks/wells (but without, or insulated from, underlying anode metal). In this way a comparison of the resistance of these two cathode strips may be employed to evaluate the effects of the underlying topography on the resistance of a cathode connection. Such a structure may also be used to evaluate cathode separation, for example by measuring the resistance between the strips of cathode with and without underlying topography. Since these cathode strips are preferably adjacent one another, and hence separated by a cathode separator, such a resistance measurement can be used to deteπυine the effectiveness of a cathode separator.

In embodiments of the substrate the test structure may be incorporated into a matrix of devices such as a matrix of OLEDs, to save space. Thus a test structure to evaluate organic layer thickness and/or uniformity may comprise a hole or aperture in a bank defining a well for the organic material, the aperture preferably extending down to the underlying ITO or anode metal. This provides a base or reference level adjacent a pixel which may be employed in making an interferometric measurement of the height or thickness of the organic layer in a neighbouring pixel. This facilitates the evaluation of organic layer deposition flatness and uniformity, and an evaluation of edge effects such as the 'coffee ring' effect (caused by edge pinning during solvent drying). In a passive matrix display with a grid-like arrangement of banks to define the pixels the apertures may be provided at intersections of the grid lines. The banks may either be fonned with the apertures or the apertures may be cut after formation of the banks, for example by means of laser ablation. Such a structure may be used for in-line monitoring of a substrate production process as set out in a further aspect of the invention below.

In another embodiment the test structure is configured to evaluate cathode continuity over underlying banks or other topography. Such a test structure preferably comprises a plurality of banks, preferably more closely spaced than when defining pixels of a display, over which is fonned a cathode layer. Preferably the cathode layer has a serpentine configuration so that by winding back and forth over the banks a large number of bank edges can be covered. For this test structure the banks need only define lines rather than wells and organic material need not be deposited between the banks (although if the underlying anode metallisation is not removed an insulating organic layer may be provided). In a preferred arrangement a second, control structure is provided in which a similar serpentine electrode is formed on a portion of the substrate without banks, so that a comparison of the resistance of the two electrodes may be made. Preferably the cathode layer is configured to cross approximately the same number of bank edges as a cathode strip in the display itself, so that an estimate may be made of the resistance of a strip of cathode when driving an end pixel of a row of a display on the same substrate, which can be dimmed when the cathode strip resistance is high. A similar structure can be employed over anode metal pillars covered by a dielectric, rather than over banks, to evaluate cathode layer coverage of anode metal steps. In another configuration of a test structure the banks may be replaced by cathode separators to check cathode separation.

In general a substrate may be configured for fabrication of a plurality of components or systems, such as a plurality of displays as well as a plurality of test structures. Some of these test stmctures may be combined with one another as mentioned above; others may be fonned at positions across the substrate. One preferred location for test structures is on or across scribe lines since in this way the test structures take up less of the space available on the substrate for the fabrication of displays or other components. The skilled person will understand that the above described embodiments of the invention may be combined in any penrmtation to fom- larger test structures or cells.

In many of the above described embodiments a substrate may be provided with one or more test structures without the presence of the molecular electronic or OLED devices, for example prior to the fabrication of such devices. Thus a further aspect of the invention provides such a substrate, and also a photolithographic mask for fabricating such a substrate.

In another aspect the invention provides a substrate for an organic molecular electronic component, the substrate having one or more active organic molecular electronic layers, said one or more layers having a first region within which are defined a plurality of organic molecular electronic devices and a second, guard band region outside said first region.

The organic molecular electronic component may comprise, for example, a passive matrix OLED display and the guard band region may comprise an additional row of OLED devices at the edge of the display, alongside devices forming part of an active area of the display. These devices may either comprise dummy devices or active devices, for example with dedicated electrodes, to facilitate test measurements. The guard band, as described above, facilitates uniform drying of the active organic material for the active display devices when ink-jet-type deposition techniques are employed.

In another related aspect the invention provides an organic molecular electronic component comprising a substrate bearing a plurality of organic molecular electronic devices, and further comprising a contaminant ingress monitor.

Preferably the ingress monitor comprises a layer of material on the substrate, observable from outside the display, which has an optical property such as transparency which changes on exposure to the contaminant. This facilitates monitoring the shelf life of a component such as an OLED display. In preferred embodiments the ingress monitor comprises a layer of barium or calcium, preferably of thickness between 5 nm and 100 nm.

In a further aspect the invention provides a method of monitoring a manufacturing process for producing a substrate, said substrate having formed thereon a plurality of organic molecular electronic devices and at least one test structure, the method comprising monitoring deposition of a layer of molecular organic material for a said device by comparing a level of a deposited layer of said material with a reference level during said manufacturing process.

This method may be employed with the embodiment of the test structure described above, in which an aperture through banks defining wells for inlc-jet printing provides a reference level against which the deposition of the molecular electronic layers can be measured. In a preferred embodiment the method is used in-line in an OLED display device production process.

These and other aspects of the present invention will now be further described, by way of example only, with reference to the accompanying figures in which:

Figures la and lb show, respectively, a cross-section through an organic light emitting diode (OLED), and a cross-section through a passive matrix OLED display;

Figures 2a and 2b show, respectively, a substrate for a passive matrix OLED display including test structures, and a layout for a 64 x 96 passive matrix OLED display;

Figures 3a to 3c show a view from above of a portion of a passive matrix OLED display substrate for ink-jet-type organic layer deposition, and cross-sectional views of the substrate of figure 3a along lines Y-Y' and X-X' respectively;

Figures 4a and 4b show, respectively, a passive matrix OLED substrate test structure according to an embodiment of the present invention, and an enlargement of a portion of figure 4a; Figures 5a to 5c show, respectively, a test structure for a passive matrix OLED display substrate according to a second embodiment of the present invention, an electrode layer of figure 5a, and a bank/well layer of figure 5 a;

Figures 6a and 6b show first and second embodiments of anode metal to cathode contact evaluation test structures;

Figures 7a and 7b show, respectively, a portion of a substrate for a passive matrix OLED display incorporating a test structure according to a further embodiment of the present invention, and a generic circuit for a passive matrix OLED display and driver; and

Figure 8 shows a layout for a cathode continuity test structure according to an embodiment of the present invention.

Referring to figure 2a this shows one example of a substrate 200 carrying a plurality of passive matrix OLED displays 150 similar to those previously described, together with a plurality of test devices 202, which are also referred to herein as test cells or test structures. Also shown in figure 2a are general features of a photomask 204 which may be used to fabricate the substrate. The mask 204 includes markers 206 to allow the mask to be aligned to the edge 208 of the substrate 202. Exclusion zones 210, 212 are preferably also provided around the perimeter of the substrate, these being zones in which no devices are fonned. hi one embodiment substrate 200 has dimensions 400 mm x 400 mm and can be subdivided along lines 214 into four 150 mm x 150 mm substrates each comprising two displays, four test cells and two layer inspection areas 216.

Figure 2b shows an example of a layout of a 64 x 96 passive matrix OLED device 250 such as may be formed on substrate 200. Device 250 comprises a plurality of anode lines 252 and a plurality of cathode lines 254, the cathode lines being brought out of the device by anode metal 256. The lines in figure 2b outline the edges of the anode and cathode metal but the resolution of this Figure is such that the gaps between adjacent anode and cathode lines are not visible. As previously described, a substrate with ITO or ITO and an overlying metal layer is obtained and then patterned using a photoresist such as polyimide. Organic layers 106, 108 are then deposited by spin coating and removed where necessary, in particular from areas where the encapsulating can 111 is to be attached to the substrate and from areas where electrical connections are made, for example mechanically, or with a wet chemical photolithographic process, or preferably by laser ablation. The cathode layer 110 is then applied and the substrate is scribed along lines 258, indicated by markers 260, to separate the displays before the encapsulating can 1 11 is attached. Polyimide photoresist may also be used to provide one or more (patterned) insulating layers in the device.

The above described fabrication procedure employs spin coating but in other fabrication processes inkjet-type printing is used to deposit the organic material, which has the advantage that the organic material can be deposited selectively only where necessary.

The deposition of material for organic light emitting diodes (OLEDs) using ink jet printing techniques is described in, for example, T.R. Hebner, C.C. Wu, D. Marcy, M.H. Lu and J.C. Stunn, "Ink-jet Printing of doped Polymers for Organic Light Emitting Devices", Applied Physics Letters, Vol. 72, No. 5, pp.519- 521, 1998; Y. Yang, "Review of Recent Progress on Polymer Electroluminescent Devices," SPIE Photonics West: Optoelectronics '98, Conf. 3279, San Jose, Jan., 1998; EP O 880 303; and "Ink-Jet Printing of Polymer Light-Emitting Devices", Paul C. Duineveld, Margreet M. de Kok, Michael Buechel, Aad H. Sempel, Kees A.H. Mutsaers, Peter van de Weijer, Ivo G.J. Camps, Ton J.M. van den Biggelaar, Jan-Eric J.M. Rubingh and Eliav I. Haskal, Organic Light-Emitting Materials and Devices V, Zakya H. Kafafi, Editor, Proceedings of SPIE Vol. 4464 (2002). Ink jet techniques can be used to deposit materials for both small molecule and polymer LEDs. Use of an ink jet printer to deposit red, green and blue colour filters for an electroluminescent display is described in EP 1,219,980A; a similar technique is described in US 2002/0105688.

To deposit a molecular electronic material a volatile solvent is employed with 1-2% dissolved solvent material. This results in a relatively thin film in comparison with the initial "ink" volume. The drying time is dependent upon the solvent mix and the atmosphere above the substrate, but typically varies between a few seconds and some minutes; preferably all the drops comprising material which are eventually to make up a pixel are deposited before drying begins. Solvents which may be used include alkylated benzenes, in particular toluene or xylene. Other solvents for inkjet printing are described in WO 00/59267, WO 01/16251 and WO 02/18513. Either a thermal or piezoelectrically-driven print head may be employed, such as the XJ126, XJ128 and XJ500 print heads available from Xaar of Cambridge, UK.

The pattern of material to be deposited is made up of pixels fonned by depositing the electroluminescent material into a well (see for example EP 0 880 303) on the substrate, usually fonned by photolithography of a photoresist (see EP 0 862 156). In the case of OLEDs and other molecular electronic devices such as polymer FETs (Field Effect Transistors) these pixels and wells generally have regular shapes and a regular pattern, but in other cases the pixels can have irregular shapes. The substrate typically comprises a substantially non-absorbent material such as, for OLED displays, glass, clear plastics such as polyethylene or PET, or other materials such as polyvinylidene fluoride or polyimide. In some OLED displays the pixels may be around 30μm to 50μm across the widest dimension in a colour display and approximately three times this size in a monochrome display; the gap between the pixels may be 10-20 μm. In other displays larger pixels, for example of the order of 300 μm square, may be employed. Some particularly advantageous print strategies are described in the applicant's UK patent application number 0227778.8 filed on 28^lh November 2002.

Figure 3a shows a view from above of a substrate 300 suitable for inkjet printing of molecular electronic devices. Figures 3b and 3c show, respectively, cross-sections through the substrate of figure 3a along lines Y-Y' and X-X'. Refeιτing to figures 3a to 3c the substrate is provided with a plurality of cathode separators 302 each of which comprises a surface relief feature to separate adjacent cathode lines, which will be deposited in regions 304. Preferably a cathode separator is undercut, having a top wider than its base, as shown in figure 3b. In figures 3a to 3c a plurality of wells 308 are defined over anode ITO layer 306 by banks 310 as shown. Thus a bank is constructed around the perimeter of each well 308 leaving the ITO 306 exposed within the well. This assists in controlling where the organic material is deposited on the substrate. The edges of the banks may be tapered onto the surface of the substrate as shown. Preferably the banlcs are fonned from a hydrophobic material so that they are not wetted by the solution of deposited organic material, this assisting in containing the deposited material within a well.

The bank and separator structures may be formed from resist material, for example using a positive resist for the banlcs and a negative resist for the separators; both these resists may be based upon polyimide and spin coated onto the substrate or a fluorinated photoresist may be employed. In the example shown the cathode separators are around 5 μm in height and approximately 20 μm wide. The banks are generally between 20 μm and 100 μm in width and in the example shown have a 4 μm taper at each edge. The pixels in the illustrated example are approximately 300 μm square but in other examples may be smaller.

Refenϊng now to figure 4a this shows a set of test structures which can be included on a substrate for a molecular electronic component, in particular a passive matrix OLED display as described above. Figure 4a shows a substrate layout (viewed from above) of the lest structures and shows a plurality of layers superimposed upon one another as explained further below. The test slmcture includes a contaminant ingress monitor 400 in the top left comer for monitoring the ingress of water and oxygen. This ingress monitor comprises a bare layer of cathode material, either calcium or barium depending upon which is also used for fabricating the OLEDs, in one embodiment with lateral dimensions 4 mm x 4 mm and approximately 5 nm in thickness. The ingress monitor becomes transparent when it reacts with oxygen or water and can thus indicate a poor encapsulation seal, saturated getter material, a poorly cleaned encapsulating can, and other sources of oxygen/water ingress. A thicker layer, for example a layer having the same thickness as the cathode material after aluminium has been deposited, can be used to monitor the shelf-life of a passive matrix OLED display and/or monitor the device in use. The ingress monitor 400 may either be used as a diagnostic tool to detemiine the cause of failure of a non-functioning device or, with a window in the encapsulating can or an electronic monitor of the ingress monitor's transparency, as a monitor of a functioning device. For the example of calcium the chemical equations which cause the monitor to become transparent in the presence of oxygen/water are shown below:

2 Ca + O₂ <=> 2 CaO 2Ca + 2 H₂0 2 CaOH

Also shown in figure 4a is a single, large OLED pixel 402 with anode 404 and cathode 406 connections to allow the diode to be driven to electroluminesce. In one arrangement this pixel has dimensions 9.6 x 7.6 mm. This large pixel facilitates measurement of the dc properties of the OLED structure such as efficiency and leakage current, as well as other properties such as uniformity of luminance. It also assists in determining whether defects such as black spots are present. In this and subsequently described structures the active organic layers 408 preferably slightly overlap the underlying anode layer 404 and are themselves preferably slightly overlapped by the calcium/barium layer, which is in turn overlapped by the aluminium cathode layer in order to encapsulate the calcium.

Figure 4a also shows a third test structure, a small (3 x 3) passive matrix display 410 which can be used to measure OLED diode efficiency, luminance uniformity and defects, leakage current under pulsed driving conditions and, in particular, crosstalk. The small passive matrix 410 has three anode column contacts 412a-c and three cathode row contacts 414a-c which contact anode lines 412 and cathode strips 414 respectively. An enlargement of the passive matrix 410 is shown in figure 4b where it can be seen that, in a preferred embodiment, the gap between the ITO anode tracks 412 narrows from 50 μm for the bottom row to 30 μm for the middle row, and to 20 μm for the top row. In figures 4a and 4b the active organic layers are not explicitly shown but lie underneath calcium layers 416; in one embodiment the pixels have lateral dimensions 300 μm x 300 μm.

To use the small passive matrix 410 to test for crosstalk the display may be driven to illuminate one of the pixels and then viewed in the dark by eye to see whether any other non-driven pixels light up. A similar procedure may be performed electronically using a camera and image capture equipment. Such a measurement may be perfomied on a complete passive matrix display but it is more easily performed with a much smaller display, provided that the display has at least two rows and two columns. Crosstalk can arise where the deposited diodes are leaky, which may be due to a number of causes, including a problem with the active polymer itself. Furthermore in the case of a device fabricated by means of ink-jet printing techniques stray droplets of active material may also give rise to crosstalk. Such problems can be addressed by employing design rules based upon deteπnined limitations of a production process.

Referring next to figures 5a to 5c, these show (viewed from above) a substrate layout for an interdigitated test structure 500 for measuring electrical properties of one or more deposited active organic layers, typically in the case of an OLED PEDOT with or without light emitting polymer (LEP). Figure 5b shows an electrode layout, figure 5c a bank/well layout and figure 5a a superimposition of the layouts of figures 5b and 5c. In figures 5a to 5c like elements are indicated by like reference numerals.

The test structure 500 comprises an electrode layer 502 over which one or more organic layers (not shown in figure 5) are deposited. The electrode layer 502 preferably comprises first 504 and second 506 electrodes formed from ITO with respective anode metal contacts 508, 510. Since the resistivity of PEDOT is relatively high it is not necessary for anode metal to entirely cover the electrode structure.

The electrodes are preferably arranged similarly to a pattern of pixels, as shown in a 3 x 3 matrix. This matrix is preferably surrounded by further pixels on which electrodes are not placed, to provide a guard band to reduce drying edge effects for the organic layers. Thus in the illustrated example the test structure approximates a 5 x 5 matrix so that an additional row of pixels is present to either side of the 3 x 3 matrix. The test structure may be employed with spin coated or 'ink-jet' deposited organic films; the illustrated embodiment shows the layout for a substrate for ink-jet-type deposition having a bank layer 511 defining a plurality of wells 512 into which organic material is deposited. Where the test structure is part of a substrate on which actual displays are fonned a spin coated test structure comprises a layer of both PEDOT and LEP but where ink-jet deposition is employed, if desired, PEDOT may be deposited without overlying LEP. As previously mentioned organic material is deposited in dummy rows 514 as well as in the area over the electrodes 504, 506. Referring to figure 5b it can be seen that the electrode structure for each pixel comprises comb-like interdigitated electrodes defining a serpentine gap of typical width between 5 μm and 500 μm depending upon the expected resistance of the organic layer. The top electrodes 506a of each pixel are linked by means of bridges 506b, 506c and the bottom electrodes 504a of each pixel are likewise linked by bridge 504b so that the test structure in effect comprises a plurality of sets of interdigitated electrodes in parallel, one for each pixel. This helps to reduce the expected resistance between electrodes 504 and 506 thus facilitating measurement of this resistance. In one embodiment the structure is approximately 1 mm square .

In use a resistance measurement is made between electrode contacts 508, 510 to detemiine electrical conductivity properties of the organic layer or layers overlying the electrodes, for example the lateral conductance of the layer or layers. A variant of the above described structure has anode metal covering the interdigitated portions of electrodes 504, 506 and a cathode layer over the organic layer to allow a measurement of anode-cathode resistance to be used to check for adequate anode metal step coverage.

Figure 6 shows a top view of a layout of a first test structure 600 for measuring the resistance of a connection between the cathode layer of a device and underlying anode metal. As previously mentioned in practical devices it is preferable to make external connections to a test structure or display using the anode metal by appropriately patterning the anode metal and depositing cathode layer material over the anode metal where a connection is needed.

In figure 6a anode metal 602 is covered by a dielectric layer 604 of typical thickness 100 - 500nm in which a window 606 to the anode metal is provided. The cathode layer 608 is then deposited over anode metal 602 and the window 606 foπning a contact with the anode metal through window 606. In one embodiment anode metal 602 comprises an ITO layer, for example 150 nm thickness, over which a metal layer, for example 500 nm of Cr/Al/Cr, is provided. The dielectric layer may be fonned of the same material as is used for the banks in an ink-jet deposition substrate, that is polyimide. The cathode layer 608 may comprise just a work function matching metal such as calcium or a complete cathode layer including, for example, overlying aluminium. The anode layer 602 has a pair of contacts 602a, b, one on either side of the connection through window 606 and the cathode layer 608 likewise has a pair of contacts 608a, b on either side of window 606, in this latter case preferably fonned from anode metal overlying cathode layer 608. These two pairs of contacts may be used to make a four tenninal resistance measurement as described below. The window 606 may provide a direct contact between the anode 602 and cathode 608 layers or window 606 may be filled with organic material such as PEDOT and/or LEP. Cathode layer 608 may comprise calcium or barium, or just aluminium, or both.

The test structure can be used to measure the anode/cathode interlayer resistance under a range of different drive current conditions or may be used to detemiine the uniformity of a calcium or barium cathode layer, or may be used to detemiine the electrical thickness or other properties of an organic material within window 606. Where a spin coated substrate is employed window 606 may be created by means of laser ablation and in this case test structure 600 may be used to detemiine the effectiveness of this ablation.

In use a four terminal measurement may be performed by passing a cuiτent between a first pair of temiinals such as temiinals 602a, 608a and measuring the voltage across the second pair of temiinals, for example temiinals 602b, 608b. Such a four terminal measurement can substantially eliminate the contact resistances at the measurement temiinals and thus facilitates accurate determination of the anode-metal-to-cathode contact resistance itself.

Figure 6b shows a second embodiment 650 of a test structure for measuring contact resistance between a cathode layer, for example of calcium and/or aluminium, and an ITO and anode metal layer. In figure 6b lines 652 and contacts 652a, b are fonned from anode metal and interconnecting bars 654 are formed using cathode layer material. In the embodiment shown in figure 6b a total of 28 contacts between the anode and cathode layers is provided, connected in series so that the total resistance is increased and hence easier to measure. In one embodiment each contact has an area of 0.24 x 0.5 mm and for the arrangement shown this area is substantially independent of the alignment between the anode and cathode layers provided that any misalignment is less than 0.24 mm in either direction. In one embodiment the anode lines 652 have a length of approximately 2 mm and a width of 0.24 mm and the cathode bars have a length of approximately 1.5 mm and a width of 0.5 mm. The resistance of the structure is determined by measuring the resistance between terminals 652a and 652b and the resistance of an individual anode-cathode contact is obtained by dividing the total resistance by the total number of contacts, in the illustrated embodiment 28.

Referring next to figure 7a, this shows a schematic view from above of a portion of a layout 700 for a passive matrix display incorporating a test structure according to an embodiment of the present invention. More particularly figure 7a shows a top active row 702 of pixels of the passive matrix display above which is a further row 704 of test pixels, followed by an additional row 706 of dummy pixels and then by a cathode strip 708 without any underlying topography such as wells, beyond which are contact electrodes for the device (not shown in figure 7a). Each pixel of the display 710 is addressed by an anode line 712 under the pixel and a cathode line 714 over the pixel; connections to the anode and cathode lines are brought outside an encapsulating can for the display, the cathode lines 714 via anode metal, via additional contact lines not shown in figure 7a. As can be seen anode lines 712 stop at the top row 704 of the display and begin again to provide a separate set of anode lines 716 for the row of test pixels 704, cathode line 718 providing a cathode connection for these pixels. Anode and cathode lines 716, 718 may be connected to contacts outside an encapsulating can for the device if the test pixels need to be accessed after encapsulation but in many instances this is not necessary, in which case anode and cathode lines 716, 718 may terminate on internal test pads (not shown).

The row of dummy pixels 706 preferably lacks an overlying cathode strip to prevent leaky diodes or partial shorts causing crosstalk between pixels of test row 704. Thus preferably each pixel of row 704 is addressed by a dedicated anode electrode line 716, and each pixel may therefore be addressed, activated and tested separately for luminance, leakage and the like. As previously mentioned after deposition of an organic layer the solvent vapour characteristics are different above the edge of a display device as compared with the centre portion of the display so that the edge pixels dry differently and potentially have different characteristics. For this reason one or more rows of dummy pixels may be provided outside the top active row 702 of the display and outside the row 704 of test pixels but inside the contact electrodes.

It will be recognised that there is some benefit in providing a layout for a passive matrix OLED display with one or more rows of dummy pixels adjacent one, or preferably each, edge of the display to improve unifoπnity of pixel characteristics, whether or not the display layout includes a test structure such as row 704 of test pixels.

In an embodiment of a substrate for ink-jet-type deposition as previously described the positions of pixels 710 are defined by wells with walls provided by banks defined, for example, in photoresist. It will therefore be understood that cathode strips 714, 718 cover an undulating surface profile and it is useful to be able to detemiine the quality of such coverage, in particular over step changes in height. This may be conveniently performed by adding an additional cathode strip 708 without any underlying banks or wells. The resistance of a cathode strip 714, 718 may then be compared with the resistance of strip 708 to detemiine the effect of the underlying wells on the cathode strip conductivity, and more particularly step coverage of a cathode layer. Such a cathode strip comprising aluminium and/or barium/calcium. In a variant of this structure the dummy row of pixels 706 is left out so that cathode strip 708 is adjacent cathode strip 718 so that by measuring the resistance between strip 708 (without underlying pixels and wells) and strip 718 the effectiveness of a cathode separator (described previously) in helping to electrically isolate adjacent cathode strips may be detennined.

Figure 7b shows a schematic diagram 750 of a generic driver circuit for a passive matrix OLED display, The OLED display is indicated by dashed line 752 and comprises a plurality n of row lines 754 each with a corresponding row electrode contact 756 and a plurality m of column lines 758 with a corresponding plurality of column electrode contacts 760. An OLED is connected between each pair of row and column lines with, in the illustrated arrangement, its anode connected to the column line. A y-driver 764 drives d e column lines 758 with a constant current and an x-driver 766 drives the row lines 754, selectively connecting the row lines to ground. The y-driver 764 and x-driver 766 are typically both under the control of a processor 718. A power supply 770 provides power to the circuitry and, in particular, to y-driver 764. It will be appreciated that which lines are labelled as "row" lines and which are labelled as "column" lines is arbitrary.

Continuing to refer to figure 7b, the origin of the crosstalk mentioned above, which the test structure of figure 7a helps to avoid can be seen by considering a case where OLED 762 is driven on, by applying a positive voltage on anode line 1 of Y-driver 764 and grounding cathode line 2 within X-driver 766. If diodes 762b and 762c are both leaky, that is to some extent conduct current in a reverse direction, then current can also flow through OLED 762d via diodes 762c and 762b to tenninal 2 of X-driver 766, thus causing OLED 762d to illuminate. It will be recognised that similar effects may occur with other arrangements of leaky diodes.

A further test structure will next be described with reference back to figure 5c. The pixel wells 512 in this figure are defined by banlcs 516 around the wells, as previously explained with reference to figures 3a to 3c. However the banks 516 in figure 5c show an additional lest structure, that is a triangular window 518 in the comer of each well 512 which extends down to the underlying ITO (see also figure 3c). Such a window may either be defined when fabricating the banks 516 or may be cut into the banks after they have been fabricated, for example by laser ablation.

The windows 518 are located adjacent the wells 512 into which layers of organic material are to be deposited and have the same base reference level, that is the ITO level, and thus facilitate measuring a thickness and/or flatness of the deposited organic material. Preferably such windows are incorporated into the banlcs defining wells in the passive matrix of displays on the substrate as well as in test structure wells. Windows 518 are particularly useful for intoferometric measurements on deposited organic material as the window to the ITO provides a base level in comparison to which the film thicknesses can be measured. Suitable instruments for making such measurements are available, for example from Zygo Corporation, Middlefield, CT, USA. Depending upon the relative hydrophilicity/liydrophobicity of the bank and organic material solution, as well as on the bank profile, deposition at the edge of a well and effects such as wetting of the banks may be monitored together with the evenness of drying. This can help avoiding problems such as the coffee-ring effect (caused by solution edge pinning as drying occurs).

Referring now to figure 8, this shows a top view of a layout 800 of a test structure for determining cathode layer (calcium/barium and/or aluminium) continuity over banlcs. Such coverage may depend, for example, upon the profile of a bank edge so that with a gently sloping bank of, for example 15 degrees good coverage may be obtained whereas with a more steeply sloping bank of, say, 60 degrees or with an undercut bank good cathode coverage may be difficult to achieve. One effect of poor cathode coverage is incrementally increased cathode resistance between a cathode contact and a pixel with each successive pixel along a cathode line, and this in tum can cause pixels at the end of a line to be dimmed. It is therefore useful to be able to detemiine the magnitude of any such effect with the aim of selecting design rules to minimise the problem.

Referring to figure 8 the test structure 800 comprises first 802 and second 804 serpentine electrodes of cathode material, the first electrode being fabricated over a plurality of banlcs 806, the second electrode 804 having no underlying banlcs and therefore acting as a control. Contacts 802a, 802b and 804a, 804b are provided for each electrode, for example using anode metal. Preferably the number of banlcs under serpentine electrode 802 is such that the electrode traverses approximately the same number of bank edges as a cathode strip in a display on the same substrate - for example the same number of edges as required for the 96 pixels in each row of the display of figure 2b. However these banlcs can be more closely spaced than the actual pixels of the display, for example 40 μm apart rather than with the approximately 300 μm pixel spacing. Thus a relatively compact test structure may be achieved, typically a few millimetres square. The cathode layer electrode width may be detennined by routine experiment to give an easily measured resistance of, say, 100 ohms, for example by choosing an electrode width of approximately 300 μm. In use the resistance of serpentine track 802 is measured and compared with that of track 804, the difference between these two measurements being an indication of the increase in cathode resistance due to the bank edges and by dividing by the number of bank edges an incremental resistance per banlc edge may be obtained. A similar test structure may be used with anode metal lines or pillars covered by a thin layer of dielectric to detemiine a measure of cathode continuity over anode metal patterning. The skilled person will recognise that other variants along these lines are also possible, for example by including an active organic layer in the test structure as well as the anode metal.

The skilled person will understand that the above described test stmctures and variants thereof may all be incoiporated on a substrate together with one or more passive matrix OLED displays. The above described test structures may be employed prior to commencing a production process, for example to determine design rules for the process, during a production process, for example for in-line monitoring of production performance, or after a production process to evaluate the perfoπnance of displays or other components or devices produced. Test structures may also be incoiporated within a final product such as an encapsulated passive matrix display, for example to allow testing at some later stage. Since it is normally desirable to employ as much of the useable area of a substrate as possible for the fabrication of actual components it is preferable to locate at least some of the test structures on scribe lines, such structures being used prior to scribing of the substrate to separate the individual components thereon.

No doubt many other effective alternatives will occur to the skilled person. It will be understood that the invention is not limited to the described embodiments and encompasses modifications apparent to those skilled in the art lying within the spirit and scope of the claims appended hereto.

Claims

CLAIMS:

1. A substrate having fonned thereon a plurality of organic molecular electronic devices and at least one test stnicture, said test structure being configured for evaluating said devices.

2. A substrate as claimed in claim 1 wherein a said molecular electronic device comprises an organic light emitting diode.

3. A substrate as claimed in claim 1 for a display, wherein said plurality of organic molecular electronic devices comprise a matrix of organic light emitting devices.

4. A substrate as claimed in any one of claims 1 to 3 wherein said test structure is configured to evaluate ingress of a contaminant to said devices.

5. A substrate as claimed in claim 4 wherein each said device has an anode connection comprising anode material and a cathode connection comprising cathode material, and wherein said test structure comprises a bare layer of said cathode material.

6. A substrate as claimed in claim 5 wherein said bare layer of cathode material comprises calcium or barium.

7. A substrate as claimed in claim 3 wherein said test structure comprises a second, reduced size matrix of organic light emitting devices.

8. A substrate as claimed in any one of claims 1 to 3 wherein a said organic molecular electronic device has at least one active layer of organic material, and wherein said test structure is configured for evaluating a characteristic of said active layer, and wherein said test structure comprises a first electrode and a second electrode, said active organic layer extending between said first and second electrodes.

9. A substrate as claimed in claim 8 wherein said first electrode has a plurality of first fingers, and wherein said second electrode has a plurality of second fingers, said first fingers being interdigitated with said second fingers.

10. A substrate as claimed in claim 8 or 9 wherein a guard band of said active organic layer is provided beyond said first and second electrodes.

11. A substrate as claimed in any one of claims 8 to 10 wherein said test structure comprises a matrix of pixels of said organic material, and wherein dummy pixels lacking said electrodes are disposed adjacent pixels bearing said electrodes.

12. A substrate as claimed in any one of claims 8 to 11 wherein said active layer includes PEDOT.

13. A substrate as claimed in any one of claims 8 to 12 wherein said active layer includes a light emitting organic layer.

14. A substrate as claimed in claim 12 or 13 wherein said active layer has an overlying metallisation layer.

15. A substrate as claimed in any one of claims 1 to 3 wherein each said device has an anode connection comprising anode material and a cathode connection comprising cathode material, wherein said test structure is configured to evaluate an electrical contact between said anode material and said cathode material, and wherein said test structure comprises a layer of said cathode material in electrical contact with a layer of said anode material,

16. A substrate as claimed in claim 15 wherein said test structure comprises a chain of said electrical contacts.

17. A substrate as claimed in claim 15 wherein said test structure has four connections, two to said layer of anode material and two to said layer of cathode material, whereby one pair of said anode and cathode layer connections may be used to pass a current through said electrical contact whilst a voltage across said electrical contact may be sensed with a second pair of said anode and cathode layer connections.

18. A substrate as claimed in claim 15 or 16 wherein said layer of said cathode material overlies said layer of anode material, wherein said anode and cathode layers are separated by a dielectric layer, and wherein said electrical contact comprises a window in said dielectric layer.

19. A substrate as claimed in claim 1 , 2 or 3 wherein said molecular electronic devices are arranged in a matrix, and wherein said test structure comprises an extension of said matrix of devices.

20. A substrate as claimed in claim 19 wherein said matrix has a plurality of rows of said devices, and wherein said test structure comprises an additional row of said devices.

21. A substrate as claimed in claim 20 wherein each said device of said row of devices has at least one dedicated electrode.

22. A substrate as claimed in claim 20 or 21 further comprising a guard band of dummy devices adjacent said additional row of devices.

23. A substrate as claimed in any one of claims 19 to 22 wherein each said device has an anode connection and a cathode connection, wherein a said cathode connection is deposited over a said device, and wherein said test structure further comprises an additional dummy cathode connection, a said cathode connection and said dummy cathode connection being divided by a cathode separator.

24. A substrate as claimed in claim 1, 2 or 3 wherein said molecular electronic devices are arranged in a matrix, and wherein said test structure is incorporated into said matrix.

25. A substrate as claimed in claim 24 having a plurality of wells, each said device being formed in a said well, each well comprising a bank defining a boundary of the well, said test structure comprising an aperture in a said bank, a region of said substrate within said aperture defining a reference substrate level.

26. A substrate as claimed in claim 25 wherein a said aperture comprises a window through said bank to a substrate portion underlying the bank.

27. A substrate as claimed in claim 25 or 26 wherein said matrix is defined by a grid of rows and columns of said banlcs, and wherein said test stnicture comprises a plurality of said apertures located at intersections of said rows and columns of said banks.

28. A substrate as claimed in any one of claims 1 to 3 having a plurality of wells, each said device being formed in a said well, each well comprising a bank defining a boundary of the well, said devices having an overlying metallisation layer for providing electrical contacts to said devices, said test structure comprising a plurality of said banks and a first serpentine electrode over said banlcs.

29. A substrate as claimed in claim 28 wherein said test structure further comprises a second serpentine electrode over a portion of the substrate without banks.

30. A substrate as claimed in claim 28 or 29 wherein said molecular electronic devices are arranged in a matrix, and wherein said first serpentine electrode crosses substantially the same or a greater number of banlcs as an electrode of said matrix formed from said metallisation layer.

31. A substrate as claimed in any one of claims 4 to 30 lacking said molecular electronic devices.

32. A photolithographic mask for fabricating a substrate as claimed in claim 31.

33. A substrate for an organic molecular electronic component, the substrate having one or more active organic molecular electronic layers, said one or more layers having a first region within which are defined a plurality of organic molecular electronic devices and a second, guard band region outside said first region.

34. A substrate as claimed in claim 33 for a passive matrix display, wherein said devices comprise display devices and said first region comprises a matrix of rows of said devices, and wherein said guard band region comprises at least one additional row of devices.

35. An organic light emitting diode display incorporating the substrate of claim 33 or 34.

36. An organic molecular electronic component comprising a substrate bearing a plurality of organic molecular electronic devices, and further comprising a contaminant ingress monitor.

37. An organic molecular electronic component as claimed in claim 36 wherein said ingress monitor comprises a layer of material on said substrate having an optical property which changes on exposure to said contaminant.

38. A method of monitoring a manufacturing process for producing a substrate, said substrate having fonned thereon a plurality of organic molecular electronic devices and at least one test structure, the method comprising monitoring deposition of a layer of molecular organic material for a said device by comparing a level of a deposited layer of said material with a reference level during said manufacturing process.

39. A method as claimed in claim 38 wherein said substrate has a plurality of wells, each said device being fonned in a said well, each well comprising a bank defining a boundary of the well, said test structure comprising an aperture in a said bank, a region of said substrate within said aperture defining said reference level.

40. A method as claimed in claim 38 or 39 wherein said comparing comprises measuring said level of said layer with respect to said reference level using interferometry.