WO2005015250A1 - 試験装置、補正値管理方法、及びプログラム - Google Patents
試験装置、補正値管理方法、及びプログラム Download PDFInfo
- Publication number
- WO2005015250A1 WO2005015250A1 PCT/JP2004/010964 JP2004010964W WO2005015250A1 WO 2005015250 A1 WO2005015250 A1 WO 2005015250A1 JP 2004010964 W JP2004010964 W JP 2004010964W WO 2005015250 A1 WO2005015250 A1 WO 2005015250A1
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- correction value
- identification information
- test
- unit
- correction
- Prior art date
Links
Classifications
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/317—Testing of digital circuits
- G01R31/3181—Functional testing
- G01R31/319—Tester hardware, i.e. output processing circuits
- G01R31/31903—Tester hardware, i.e. output processing circuits tester configuration
- G01R31/31908—Tester set-up, e.g. configuring the tester to the device under test [DUT], down loading test patterns
- G01R31/3191—Calibration
Definitions
- Test apparatus correction value management method, and program
- a timing generator that generates timing for supplying a test signal to the device under test, a driver that exchanges test signals with the device under test, Calibration of comparators and the like is performed to improve measurement accuracy in testing devices under test. Since the existence of prior art documents is not recognized at this time, the description of the prior art documents is omitted.
- a test apparatus for testing a device under test, wherein a correction for correcting a timing of supplying a test signal to the device under test or a voltage level of the test signal for the device under test.
- a test module having a correction value holding unit for holding a correction value used for correction by the correction unit, and an identification information storage unit for storing test module identification information as test module identification information;
- the correction value database storing the correction values to be held by the correction value holding unit of the test module identified by the test module identification information is associated with the test module identification information stored by the identification information storage unit.
- Control means for extracting the correction values stored in the correction value database and storing the correction values in the correction value holding unit. That.
- the test module further includes a timing generation unit that generates a timing at which a test signal is supplied to the device under test, and the correction value holding unit includes a timing setting unit that holds timing data indicating a predetermined timing.
- a timing calibration memory for storing timing calibration data for calibrating timing data for causing a test signal to be supplied to the timing generation unit at a predetermined timing, and a correction unit for controlling the timing data as a correction value.
- a timing correction unit for correcting the timing at which the timing generation unit generates based on the timing calibration data.
- the identification information storage unit further stores the test apparatus identification information that is the identification information of the test apparatus, and the correction value database stores the correction value in association with the test module identification information and the test apparatus identification information.
- the control unit may extract the correction value stored in the correction value database in association with the test module identification information and the test device identification information stored in the identification information storage unit, and cause the correction value storage unit to store the correction value.
- the apparatus further includes a plurality of slots for detachably holding a test board provided with a correction unit, a correction value holding unit, and an identification information storage unit, and the identification information storage unit holds the test board. Slot identification information, which is slot identification information, is further stored.
- the correction value database stores correction values in association with the test module identification information and the slot identification information.
- the correction value stored in the correction value database may be extracted in association with the slot identification information and the test apparatus identification information stored by the storage unit, and may be stored in the correction value storage unit.
- the identification information storage unit further stores an error flag indicating whether an error has occurred in the generation of the correction value to be held by the correction value storage unit, and the control unit performs the test stored in the identification information storage unit.
- the control unit performs the test stored in the identification information storage unit.
- a correction value generation step for generating a correction value to be held by the correction value holding unit, and a correction module generated in the correction value generation step for identifying a test module of a test module having the correction value holding unit.
- FIG. 4 is a diagram showing an example of a data configuration of a database 120.
- FIG. 5 is a diagram showing an example of a process for generating calibration data 410.
- FIG. 7 is a diagram showing an example of a hardware configuration of a system control device 110.
- the system controller 110 displays an error message on the display device to notify the user that the calibration has not been completed normally (S560). Then, the system controller 110 stores in the identification information storage unit 230 a calibration flag 306 indicating that the calibration has not been performed normally and an error has occurred in the generation of the calibration data 410 (S570).
- the identification information storage unit 230 stores the calibration flag 306 and clearly records whether or not the appropriate calibration data 410 exists, so that the inappropriate calibration data 410 is erroneously used. The ability to prevent things.
- the system control device 110 generates new calibration data 410 by performing the process of generating the calibration data 410 shown in FIG. 5, and stores it in the database 120 (S670). Then, the calibration data 410 is extracted again by performing the extraction processing of the calibration data 410 shown in FIG. 6 again.
- the timing calibration data and the level calibration data included in the brake data 410 may be held in the timing calibration memory 218 and the level calibration memory 224, respectively.
Abstract
Description
Claims
Priority Applications (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
EP04748125A EP1655614B1 (en) | 2003-08-06 | 2004-07-30 | Test apparatus, correction value managing method, and corresponding computer program |
JP2005512922A JP4707557B2 (ja) | 2003-08-06 | 2004-07-30 | 試験装置、補正値管理方法、及びプログラム |
DE602004017327T DE602004017327D1 (de) | 2003-08-06 | 2004-07-30 | Testvorrichtung, korrekturwert-verwaltungsverfahren und entsprechendes computerprogramm |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2003-287376 | 2003-08-06 | ||
JP2003287376 | 2003-08-06 |
Publications (1)
Publication Number | Publication Date |
---|---|
WO2005015250A1 true WO2005015250A1 (ja) | 2005-02-17 |
Family
ID=34114018
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/JP2004/010964 WO2005015250A1 (ja) | 2003-08-06 | 2004-07-30 | 試験装置、補正値管理方法、及びプログラム |
Country Status (9)
Country | Link |
---|---|
US (1) | US7350123B2 (ja) |
EP (1) | EP1655614B1 (ja) |
JP (1) | JP4707557B2 (ja) |
KR (1) | KR20060057600A (ja) |
CN (1) | CN1829919A (ja) |
DE (1) | DE602004017327D1 (ja) |
MY (1) | MY135870A (ja) |
TW (1) | TWI353516B (ja) |
WO (1) | WO2005015250A1 (ja) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2006300894A (ja) * | 2005-04-25 | 2006-11-02 | Advantest Corp | 試験装置、及びプログラム |
JP2006317256A (ja) * | 2005-05-12 | 2006-11-24 | Advantest Corp | 試験装置、診断プログラムおよび診断方法 |
Families Citing this family (14)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
TW525216B (en) * | 2000-12-11 | 2003-03-21 | Semiconductor Energy Lab | Semiconductor device, and manufacturing method thereof |
SG111923A1 (en) | 2000-12-21 | 2005-06-29 | Semiconductor Energy Lab | Light emitting device and method of manufacturing the same |
DE10324080B4 (de) * | 2003-05-27 | 2006-03-23 | Infineon Technologies Ag | Verfahren zum Testen von zu testenden Schaltungseinheiten in einer Testvorrichtung |
JP2006275986A (ja) * | 2005-03-30 | 2006-10-12 | Advantest Corp | 診断プログラム、切替プログラム、試験装置、および診断方法 |
US8242796B2 (en) * | 2008-02-21 | 2012-08-14 | Advantest (Singapore) Pte Ltd | Transmit/receive unit, and methods and apparatus for transmitting signals between transmit/receive units |
JP4772920B2 (ja) * | 2008-05-30 | 2011-09-14 | 株式会社アドバンテスト | 試験装置および送信装置 |
KR101137537B1 (ko) | 2008-05-30 | 2012-04-23 | 가부시키가이샤 어드밴티스트 | 시험 장치 및 정보 처리 시스템 |
KR100912716B1 (ko) * | 2009-02-24 | 2009-08-19 | 한영흠 | 비파괴 도막 두께 측정기의 캘리브레이션 이식 방법 |
JP5359570B2 (ja) * | 2009-06-03 | 2013-12-04 | 富士通株式会社 | メモリ試験制御装置およびメモリ試験制御方法 |
KR20120061140A (ko) * | 2010-10-25 | 2012-06-13 | 삼성전자주식회사 | 피시험 소자의 테스트 장치 및 이를 이용한 피시험 소자의 테스트 방법 |
JP5841458B2 (ja) * | 2012-03-01 | 2016-01-13 | 株式会社アドバンテスト | 試験装置および試験モジュール |
DE102012108458A1 (de) * | 2012-09-11 | 2014-03-13 | Endress + Hauser Process Solutions Ag | Verfahren zum sicheren Betreiben einer Anlage der Prozess- und/oder Automatisierungstechnik |
US20220299567A1 (en) * | 2021-03-17 | 2022-09-22 | Changxin Memory Technologies, Inc. | Method and device for testing integrated circuit |
CN113064048A (zh) * | 2021-03-17 | 2021-07-02 | 长鑫存储技术有限公司 | 集成电路测试方法及设备 |
Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH06148279A (ja) * | 1992-10-30 | 1994-05-27 | Yokogawa Hewlett Packard Ltd | 電子デバイス試験・測定装置、およびそのタイミングならびに電圧レベル校正方法 |
JPH10105385A (ja) * | 1996-09-27 | 1998-04-24 | Ando Electric Co Ltd | オブジェクトファイル情報表示装置 |
JP2000137057A (ja) * | 1998-10-30 | 2000-05-16 | Ando Electric Co Ltd | Ic試験装置 |
JP2001124817A (ja) * | 1999-10-28 | 2001-05-11 | Ando Electric Co Ltd | バーンインボード、テストバーンイン装置およびテストバーンイン装置におけるスキュー補正方法 |
Family Cites Families (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5262716A (en) * | 1992-04-21 | 1993-11-16 | Hewlett-Packard Company | Tester calibration procedure which includes fixturing |
US5793815A (en) * | 1996-12-13 | 1998-08-11 | International Business Machines Corporation | Calibrated multi-voltage level signal transmission system |
JPH10170603A (ja) * | 1996-12-13 | 1998-06-26 | Ando Electric Co Ltd | Icテスタのキャリブレーション方法 |
IL137899A (en) * | 1999-07-05 | 2005-11-20 | Vasu Tech Ltd | Digital electronic control unit |
KR100341599B1 (ko) * | 2000-02-12 | 2002-06-22 | 장성환 | 모듈디바이스용 테스팅장치 및 방법 |
US6573990B1 (en) * | 2000-02-21 | 2003-06-03 | Tektronix, Inc. | Optical system providing concurrent detection of a calibration signal and a test signal in an optical spectrum analyzer |
JP2002199217A (ja) * | 2000-12-25 | 2002-07-12 | Canon Inc | 画像読み取り装置及び画像読み取り方法 |
JP4366018B2 (ja) * | 2001-01-17 | 2009-11-18 | キヤノン株式会社 | キャリブレーション方法およびプリント装置 |
WO2002075343A1 (en) * | 2001-03-19 | 2002-09-26 | Teradyne, Inc. | Ate calibration method and corresponding test equipment |
-
2004
- 2004-07-30 EP EP04748125A patent/EP1655614B1/en not_active Expired - Fee Related
- 2004-07-30 WO PCT/JP2004/010964 patent/WO2005015250A1/ja active Application Filing
- 2004-07-30 DE DE602004017327T patent/DE602004017327D1/de active Active
- 2004-07-30 KR KR1020067002513A patent/KR20060057600A/ko not_active Application Discontinuation
- 2004-07-30 JP JP2005512922A patent/JP4707557B2/ja not_active Expired - Fee Related
- 2004-07-30 CN CNA2004800217978A patent/CN1829919A/zh active Pending
- 2004-08-03 TW TW093123202A patent/TWI353516B/zh not_active IP Right Cessation
- 2004-08-06 US US10/913,763 patent/US7350123B2/en not_active Expired - Fee Related
- 2004-08-06 MY MYPI20043200A patent/MY135870A/en unknown
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH06148279A (ja) * | 1992-10-30 | 1994-05-27 | Yokogawa Hewlett Packard Ltd | 電子デバイス試験・測定装置、およびそのタイミングならびに電圧レベル校正方法 |
JPH10105385A (ja) * | 1996-09-27 | 1998-04-24 | Ando Electric Co Ltd | オブジェクトファイル情報表示装置 |
JP2000137057A (ja) * | 1998-10-30 | 2000-05-16 | Ando Electric Co Ltd | Ic試験装置 |
JP2001124817A (ja) * | 1999-10-28 | 2001-05-11 | Ando Electric Co Ltd | バーンインボード、テストバーンイン装置およびテストバーンイン装置におけるスキュー補正方法 |
Non-Patent Citations (1)
Title |
---|
See also references of EP1655614A4 * |
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2006300894A (ja) * | 2005-04-25 | 2006-11-02 | Advantest Corp | 試験装置、及びプログラム |
JP4721762B2 (ja) * | 2005-04-25 | 2011-07-13 | 株式会社アドバンテスト | 試験装置 |
TWI395967B (zh) * | 2005-04-25 | 2013-05-11 | Advantest Corp | 測試裝置、電腦程式產品以及記錄媒體 |
JP2006317256A (ja) * | 2005-05-12 | 2006-11-24 | Advantest Corp | 試験装置、診断プログラムおよび診断方法 |
JP4571534B2 (ja) * | 2005-05-12 | 2010-10-27 | 株式会社アドバンテスト | 試験装置、診断プログラムおよび診断方法 |
Also Published As
Publication number | Publication date |
---|---|
TW200516383A (en) | 2005-05-16 |
TWI353516B (en) | 2011-12-01 |
KR20060057600A (ko) | 2006-05-26 |
EP1655614A1 (en) | 2006-05-10 |
DE602004017327D1 (de) | 2008-12-04 |
US7350123B2 (en) | 2008-03-25 |
US20050034043A1 (en) | 2005-02-10 |
MY135870A (en) | 2008-07-31 |
JPWO2005015250A1 (ja) | 2007-09-27 |
EP1655614B1 (en) | 2008-10-22 |
JP4707557B2 (ja) | 2011-06-22 |
CN1829919A (zh) | 2006-09-06 |
EP1655614A4 (en) | 2006-08-16 |
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