WO2005038571A3 - Data processing system having a serial data controller - Google Patents

Data processing system having a serial data controller Download PDF

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Publication number
WO2005038571A3
WO2005038571A3 PCT/US2004/032254 US2004032254W WO2005038571A3 WO 2005038571 A3 WO2005038571 A3 WO 2005038571A3 US 2004032254 W US2004032254 W US 2004032254W WO 2005038571 A3 WO2005038571 A3 WO 2005038571A3
Authority
WO
WIPO (PCT)
Prior art keywords
serial data
processing system
controller
data processing
ports
Prior art date
Application number
PCT/US2004/032254
Other languages
French (fr)
Other versions
WO2005038571A2 (en
Inventor
Mark E Elledge
John J Vaglica
Sreedharan Bhaskaran
Allen Guoyuan Deng
Original Assignee
Freescale Semiconductor Inc
Mark E Elledge
John J Vaglica
Sreedharan Bhaskaran
Allen Guoyuan Deng
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Freescale Semiconductor Inc, Mark E Elledge, John J Vaglica, Sreedharan Bhaskaran, Allen Guoyuan Deng filed Critical Freescale Semiconductor Inc
Publication of WO2005038571A2 publication Critical patent/WO2005038571A2/en
Publication of WO2005038571A3 publication Critical patent/WO2005038571A3/en

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38Information transfer, e.g. on bus
    • G06F13/40Bus structure
    • G06F13/4004Coupling between buses
    • G06F13/4027Coupling between buses using bus bridges
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02DCLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00Energy efficient computing, e.g. low power processors, power management or thermal management

Abstract

A data processing system (30) includes two processors (70, 80) and a serial data controller (36) for selectively multiplexing serial data signals between one or more of a plurality of serial data devices (40, 42, 44, 46, 74, 76, 82) The serial data controller (36) includes one or more host ports (50, 52, 54) and one or more peripheral ports (56, 58, 60, 62) coupled together through a switching matrix (64). A control circuit (66) and a plurality of control registers (68) are used to configure and control a serial data path created between two or more ports including clock and frame synchronization timing of the data path.
PCT/US2004/032254 2003-10-10 2004-09-30 Data processing system having a serial data controller WO2005038571A2 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US10/683,778 2003-10-10
US10/683,778 US7047350B2 (en) 2003-10-10 2003-10-10 Data processing system having a serial data controller

Publications (2)

Publication Number Publication Date
WO2005038571A2 WO2005038571A2 (en) 2005-04-28
WO2005038571A3 true WO2005038571A3 (en) 2005-12-01

Family

ID=34422828

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/US2004/032254 WO2005038571A2 (en) 2003-10-10 2004-09-30 Data processing system having a serial data controller

Country Status (3)

Country Link
US (1) US7047350B2 (en)
TW (1) TWI354895B (en)
WO (1) WO2005038571A2 (en)

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JP2005135269A (en) * 2003-10-31 2005-05-26 Toshiba Corp Electronic equipment
US20050136992A1 (en) * 2003-12-23 2005-06-23 Mueller Peter D. Providing access to auxiliary hardware in multiprocessor devices
US8565345B2 (en) * 2005-10-04 2013-10-22 Hypres Inc. Oversampling digital radio frequency transmitter
US8462889B2 (en) 2005-10-04 2013-06-11 Hypres, Inc. Oversampling digital receiver for radio-frequency signals
GB2432765B (en) 2005-11-26 2008-04-30 Wolfson Microelectronics Plc Audio device
KR101201317B1 (en) * 2005-12-08 2012-11-14 엘지디스플레이 주식회사 Apparatus and method for driving liquid crystal display device
CN200976109Y (en) * 2006-10-20 2007-11-14 东莞东城威仪塑胶电子制品厂 Reciprocating object control system
US7542365B2 (en) 2007-09-27 2009-06-02 Freescale Semiconductor, Inc. Apparatus and method for accessing a synchronous serial memory having unknown address bit field size
JP5346978B2 (en) * 2011-04-15 2013-11-20 シャープ株式会社 Interface device, wiring board, and information processing device
JP5346979B2 (en) * 2011-04-18 2013-11-20 シャープ株式会社 Interface device, wiring board, and information processing device
US9026253B2 (en) 2011-11-22 2015-05-05 Honeywell International Inc. Building controller with operating system interaction through an integrated display
US8775714B2 (en) 2012-01-30 2014-07-08 Infineon Technologies Ag System and method for a bus interface
TWI477120B (en) * 2012-11-13 2015-03-11 Askey Computer Corp Signal expansion selection device
JP2015043170A (en) * 2013-08-26 2015-03-05 株式会社東芝 Interface circuit and system
CN103984659B (en) * 2014-05-15 2017-07-21 华为技术有限公司 The method and apparatus that timesharing uses serial ports
US11100963B1 (en) * 2020-07-22 2021-08-24 Elite Semiconductor Microelectronics Technology Inc. Data first-in first-out (FIFO) circuit
CN112199316B (en) * 2020-10-10 2024-01-05 海尔海斯(西安)控制技术有限公司 Configuration method and communication method of chain-type master-slave serial port communication device
US11451233B2 (en) * 2020-11-20 2022-09-20 Stmicroelectronics International N.V. Pulse width modulator with reduced pulse width

Citations (2)

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Publication number Priority date Publication date Assignee Title
US6188686B1 (en) * 1996-08-14 2001-02-13 Fujitsu Limited Switching apparatus
US6760328B1 (en) * 1999-10-14 2004-07-06 Synchrodyne Networks, Inc. Scheduling with different time intervals

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Publication number Priority date Publication date Assignee Title
US4736362A (en) 1985-07-26 1988-04-05 Advanced Micro Devices, Inc. Programmable data-routing multiplexer
US5596578A (en) 1993-10-04 1997-01-21 Fostex Corporation Of America Time division multiplexing data transfer system for digital audio data distribution
US5796733A (en) * 1996-07-03 1998-08-18 General Signal Corporation Time division switching system
US6377575B1 (en) * 1998-08-05 2002-04-23 Vitesse Semiconductor Corporation High speed cross point switch routing circuit with word-synchronous serial back plane
US7720515B2 (en) 2001-05-24 2010-05-18 Qualcomm Incorporated Apparatus and method for reducing power consumption in a mobile unit

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6188686B1 (en) * 1996-08-14 2001-02-13 Fujitsu Limited Switching apparatus
US6760328B1 (en) * 1999-10-14 2004-07-06 Synchrodyne Networks, Inc. Scheduling with different time intervals

Also Published As

Publication number Publication date
TW200525914A (en) 2005-08-01
WO2005038571A2 (en) 2005-04-28
TWI354895B (en) 2011-12-21
US20050080975A1 (en) 2005-04-14
US7047350B2 (en) 2006-05-16

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