WO2005038571A3 - Data processing system having a serial data controller - Google Patents
Data processing system having a serial data controller Download PDFInfo
- Publication number
- WO2005038571A3 WO2005038571A3 PCT/US2004/032254 US2004032254W WO2005038571A3 WO 2005038571 A3 WO2005038571 A3 WO 2005038571A3 US 2004032254 W US2004032254 W US 2004032254W WO 2005038571 A3 WO2005038571 A3 WO 2005038571A3
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- serial data
- processing system
- controller
- data processing
- ports
- Prior art date
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/40—Bus structure
- G06F13/4004—Coupling between buses
- G06F13/4027—Coupling between buses using bus bridges
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
- Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management
Abstract
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US10/683,778 | 2003-10-10 | ||
US10/683,778 US7047350B2 (en) | 2003-10-10 | 2003-10-10 | Data processing system having a serial data controller |
Publications (2)
Publication Number | Publication Date |
---|---|
WO2005038571A2 WO2005038571A2 (en) | 2005-04-28 |
WO2005038571A3 true WO2005038571A3 (en) | 2005-12-01 |
Family
ID=34422828
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/US2004/032254 WO2005038571A2 (en) | 2003-10-10 | 2004-09-30 | Data processing system having a serial data controller |
Country Status (3)
Country | Link |
---|---|
US (1) | US7047350B2 (en) |
TW (1) | TWI354895B (en) |
WO (1) | WO2005038571A2 (en) |
Families Citing this family (18)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2005135269A (en) * | 2003-10-31 | 2005-05-26 | Toshiba Corp | Electronic equipment |
US20050136992A1 (en) * | 2003-12-23 | 2005-06-23 | Mueller Peter D. | Providing access to auxiliary hardware in multiprocessor devices |
US8565345B2 (en) * | 2005-10-04 | 2013-10-22 | Hypres Inc. | Oversampling digital radio frequency transmitter |
US8462889B2 (en) | 2005-10-04 | 2013-06-11 | Hypres, Inc. | Oversampling digital receiver for radio-frequency signals |
GB2432765B (en) | 2005-11-26 | 2008-04-30 | Wolfson Microelectronics Plc | Audio device |
KR101201317B1 (en) * | 2005-12-08 | 2012-11-14 | 엘지디스플레이 주식회사 | Apparatus and method for driving liquid crystal display device |
CN200976109Y (en) * | 2006-10-20 | 2007-11-14 | 东莞东城威仪塑胶电子制品厂 | Reciprocating object control system |
US7542365B2 (en) | 2007-09-27 | 2009-06-02 | Freescale Semiconductor, Inc. | Apparatus and method for accessing a synchronous serial memory having unknown address bit field size |
JP5346978B2 (en) * | 2011-04-15 | 2013-11-20 | シャープ株式会社 | Interface device, wiring board, and information processing device |
JP5346979B2 (en) * | 2011-04-18 | 2013-11-20 | シャープ株式会社 | Interface device, wiring board, and information processing device |
US9026253B2 (en) | 2011-11-22 | 2015-05-05 | Honeywell International Inc. | Building controller with operating system interaction through an integrated display |
US8775714B2 (en) | 2012-01-30 | 2014-07-08 | Infineon Technologies Ag | System and method for a bus interface |
TWI477120B (en) * | 2012-11-13 | 2015-03-11 | Askey Computer Corp | Signal expansion selection device |
JP2015043170A (en) * | 2013-08-26 | 2015-03-05 | 株式会社東芝 | Interface circuit and system |
CN103984659B (en) * | 2014-05-15 | 2017-07-21 | 华为技术有限公司 | The method and apparatus that timesharing uses serial ports |
US11100963B1 (en) * | 2020-07-22 | 2021-08-24 | Elite Semiconductor Microelectronics Technology Inc. | Data first-in first-out (FIFO) circuit |
CN112199316B (en) * | 2020-10-10 | 2024-01-05 | 海尔海斯(西安)控制技术有限公司 | Configuration method and communication method of chain-type master-slave serial port communication device |
US11451233B2 (en) * | 2020-11-20 | 2022-09-20 | Stmicroelectronics International N.V. | Pulse width modulator with reduced pulse width |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6188686B1 (en) * | 1996-08-14 | 2001-02-13 | Fujitsu Limited | Switching apparatus |
US6760328B1 (en) * | 1999-10-14 | 2004-07-06 | Synchrodyne Networks, Inc. | Scheduling with different time intervals |
Family Cites Families (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4736362A (en) | 1985-07-26 | 1988-04-05 | Advanced Micro Devices, Inc. | Programmable data-routing multiplexer |
US5596578A (en) | 1993-10-04 | 1997-01-21 | Fostex Corporation Of America | Time division multiplexing data transfer system for digital audio data distribution |
US5796733A (en) * | 1996-07-03 | 1998-08-18 | General Signal Corporation | Time division switching system |
US6377575B1 (en) * | 1998-08-05 | 2002-04-23 | Vitesse Semiconductor Corporation | High speed cross point switch routing circuit with word-synchronous serial back plane |
US7720515B2 (en) | 2001-05-24 | 2010-05-18 | Qualcomm Incorporated | Apparatus and method for reducing power consumption in a mobile unit |
-
2003
- 2003-10-10 US US10/683,778 patent/US7047350B2/en active Active
-
2004
- 2004-09-30 WO PCT/US2004/032254 patent/WO2005038571A2/en active Application Filing
- 2004-10-08 TW TW093130608A patent/TWI354895B/en active
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6188686B1 (en) * | 1996-08-14 | 2001-02-13 | Fujitsu Limited | Switching apparatus |
US6760328B1 (en) * | 1999-10-14 | 2004-07-06 | Synchrodyne Networks, Inc. | Scheduling with different time intervals |
Also Published As
Publication number | Publication date |
---|---|
TW200525914A (en) | 2005-08-01 |
WO2005038571A2 (en) | 2005-04-28 |
TWI354895B (en) | 2011-12-21 |
US20050080975A1 (en) | 2005-04-14 |
US7047350B2 (en) | 2006-05-16 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
WO2005038571A3 (en) | Data processing system having a serial data controller | |
IL132983A0 (en) | Emulation system with time-multiplexed interconnect | |
WO2002079990A3 (en) | Apparatus and methods for fault-tolerant computing using a switching fabric | |
AU2003290760A8 (en) | Active termination control through on module register | |
WO2000000900A3 (en) | Method and apparatus for providing modular i/o expansion of computing devices | |
AU6864400A (en) | Control unit and recorded medium | |
WO2005006183A3 (en) | Method and apparatus for shuffling data | |
AU2002238325A1 (en) | Data processing apparatus and system and method for controlling memory access | |
GB2403572B (en) | Instruction timing control within a data processing system | |
TW200705441A (en) | Processor controlled interface | |
FR2834403B1 (en) | CRYPTOGRAPHIC GROUP SIGNATURE SYSTEM | |
TW200506596A (en) | Transfer of error-analysis and statistical data in a fibre channel input/output system | |
WO2004092904A3 (en) | Memory system having a multiplexed high-speed channel | |
WO2007032895A3 (en) | Data structures and circuit for multi-channel data transfers using a serial peripheral interface | |
WO2002101938A3 (en) | Method and circuit for transmitting data from a system which is operated by means of a first clock pulse to a system which is operated by means of a second clock pulse | |
AU2002340667A1 (en) | Thin small functionally large data input board | |
AU3222400A (en) | A regionally time multiplexed emulation system | |
WO2000079398A3 (en) | Common motherboard interface for processor modules of multiple architectures | |
WO2005001686A3 (en) | Data packet arithmetic logic devices and methods | |
WO2002023941A3 (en) | Layouts for an integrated circuit to perform time and space switching of sonet framed data | |
WO2003003221A3 (en) | Method for enabling a communication between processes, processing system, integrated chip and module for such a chip | |
WO2002060103A3 (en) | T1/e1 framer array | |
CA2447876A1 (en) | Self-synchronizing half duplex matrix switch | |
KR100970615B1 (en) | Synchronous Input/Output port expansion apparatus | |
WO2005006194A3 (en) | Efficient memory controller |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
AK | Designated states |
Kind code of ref document: A2 Designated state(s): AE AG AL AM AT AU AZ BA BB BG BR BW BY BZ CA CH CN CO CR CU CZ DE DK DM DZ EC EE EG ES FI GB GD GE GH GM HR HU ID IL IN IS JP KE KG KP KR KZ LC LK LR LS LT LU LV MA MD MG MK MN MW MX MZ NA NI NO NZ OM PG PH PL PT RO RU SC SD SE SG SK SL SY TJ TM TN TR TT TZ UA UG US UZ VC VN YU ZA ZM ZW |
|
AL | Designated countries for regional patents |
Kind code of ref document: A2 Designated state(s): BW GH GM KE LS MW MZ NA SD SL SZ TZ UG ZM ZW AM AZ BY KG KZ MD RU TJ TM AT BE BG CH CY CZ DE DK EE ES FI FR GB GR HU IE IT LU MC NL PL PT RO SE SI SK TR BF BJ CF CG CI CM GA GN GQ GW ML MR NE SN TD TG |
|
121 | Ep: the epo has been informed by wipo that ep was designated in this application | ||
122 | Ep: pct application non-entry in european phase |