WO2005104324A3 - Folded, fully buffered memory module - Google Patents

Folded, fully buffered memory module Download PDF

Info

Publication number
WO2005104324A3
WO2005104324A3 PCT/US2005/012854 US2005012854W WO2005104324A3 WO 2005104324 A3 WO2005104324 A3 WO 2005104324A3 US 2005012854 W US2005012854 W US 2005012854W WO 2005104324 A3 WO2005104324 A3 WO 2005104324A3
Authority
WO
WIPO (PCT)
Prior art keywords
leaves
folded
memory
medium
buffer
Prior art date
Application number
PCT/US2005/012854
Other languages
French (fr)
Other versions
WO2005104324A2 (en
Inventor
Gary W Smith
Original Assignee
Gary W Smith
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Gary W Smith filed Critical Gary W Smith
Publication of WO2005104324A2 publication Critical patent/WO2005104324A2/en
Publication of WO2005104324A3 publication Critical patent/WO2005104324A3/en

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/16Constructional details or arrangements
    • G06F1/18Packaging or power distribution
    • G06F1/183Internal mounting support structures, e.g. for printed circuit boards, internal connecting means
    • G06F1/186Securing of expansion boards in correspondence to slots provided at the computer enclosure
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/16Constructional details or arrangements
    • G06F1/18Packaging or power distribution
    • G06F1/183Internal mounting support structures, e.g. for printed circuit boards, internal connecting means
    • G06F1/184Mounting of motherboards
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/16Constructional details or arrangements
    • G06F1/18Packaging or power distribution
    • G06F1/183Internal mounting support structures, e.g. for printed circuit boards, internal connecting means
    • G06F1/185Mounting of expansion boards
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/52Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/538Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
    • H01L23/5387Flexible insulating substrates
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/18Printed circuits structurally associated with non-printed electric components
    • H05K1/189Printed circuits structurally associated with non-printed electric components characterised by the use of a flexible or folded printed circuit
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30Technical effects
    • H01L2924/301Electrical effects
    • H01L2924/3011Impedance
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/0213Electrical arrangements not otherwise provided for
    • H05K1/0216Reduction of cross-talk, noise or electromagnetic interference
    • H05K1/023Reduction of cross-talk, noise or electromagnetic interference using auxiliary mounted passive components or auxiliary substances
    • H05K1/0231Capacitors or dielectric substances
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/18Printed circuits structurally associated with non-printed electric components
    • H05K1/181Printed circuits structurally associated with non-printed electric components associated with surface mounted components
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09Shape and layout
    • H05K2201/09209Shape and layout details of conductors
    • H05K2201/09654Shape and layout details of conductors covering at least two types of conductors provided for in H05K2201/09218 - H05K2201/095
    • H05K2201/09709Staggered pads, lands or terminals; Parallel conductors in different planes
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10007Types of components
    • H05K2201/10159Memory
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/15Position of the PCB during processing
    • H05K2203/1572Processing both sides of a PCB by the same process; Providing a similar arrangement of components on both sides; Making interlayer connections from two sides

Abstract

A folded, fully buffered memory module (6) comprising: a planar flexible circuit medium (12); first and second generally quadrangular printed circuit leaves (8, 10) flexibly joined in juxtaposed, spaced disposition by the flexible circuit medium (12), the flexible circuit medium (12) including a network of conductive leads for signal communication between the leaves, the flexible medium being (12) folded to an extent that the leaves are adjacent and parallel to each other; a memory buffer (26) disposed centrally on a face of the second leaf; a plurality of memory devices (28) distributed on the leaves in a star topology about the memory buffer. Preferably the backside of the memory buffer is clear enough for close decoupling of the buffer. Preferably the memory devices are staggered to allow close decoupling of the each memory devices at its backside.
PCT/US2005/012854 2004-04-15 2005-04-15 Folded, fully buffered memory module WO2005104324A2 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US56295604P 2004-04-15 2004-04-15
US60/562,956 2004-04-15

Publications (2)

Publication Number Publication Date
WO2005104324A2 WO2005104324A2 (en) 2005-11-03
WO2005104324A3 true WO2005104324A3 (en) 2006-03-16

Family

ID=35197635

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/US2005/012854 WO2005104324A2 (en) 2004-04-15 2005-04-15 Folded, fully buffered memory module

Country Status (1)

Country Link
WO (1) WO2005104324A2 (en)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2006028643A2 (en) * 2004-09-03 2006-03-16 Staktek Group L.P. Circuit module system and method
US20160118734A1 (en) * 2014-10-28 2016-04-28 Hamilton Sundstrand Corporation Single flex printed wiring board for electric system controller
FR3038130B1 (en) 2015-06-25 2017-08-11 3D Plus 3D ELECTRONIC MODULE COMPRISING A STACK OF BALL CASES

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6021048A (en) * 1998-02-17 2000-02-01 Smith; Gary W. High speed memory module
US6222739B1 (en) * 1998-01-20 2001-04-24 Viking Components High-density computer module with stacked parallel-plane packaging
US6590781B2 (en) * 2000-05-10 2003-07-08 Rambus, Inc. Clock routing in multiple channel modules and bus systems
US6614664B2 (en) * 2000-10-24 2003-09-02 Samsung Electronics Co., Ltd. Memory module having series-connected printed circuit boards
US6762942B1 (en) * 2002-09-05 2004-07-13 Gary W. Smith Break away, high speed, folded, jumperless electronic assembly
US6891729B2 (en) * 2001-09-10 2005-05-10 Samsung Electronics Co., Ltd. Memory module

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6222739B1 (en) * 1998-01-20 2001-04-24 Viking Components High-density computer module with stacked parallel-plane packaging
US6021048A (en) * 1998-02-17 2000-02-01 Smith; Gary W. High speed memory module
US6590781B2 (en) * 2000-05-10 2003-07-08 Rambus, Inc. Clock routing in multiple channel modules and bus systems
US6614664B2 (en) * 2000-10-24 2003-09-02 Samsung Electronics Co., Ltd. Memory module having series-connected printed circuit boards
US6891729B2 (en) * 2001-09-10 2005-05-10 Samsung Electronics Co., Ltd. Memory module
US6762942B1 (en) * 2002-09-05 2004-07-13 Gary W. Smith Break away, high speed, folded, jumperless electronic assembly

Also Published As

Publication number Publication date
WO2005104324A2 (en) 2005-11-03

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