WO2006012311A1 - Using different gate dielectrics with nmos and pmos transistors of a complementary metal oxide semiconductor integrated circuit - Google Patents
Using different gate dielectrics with nmos and pmos transistors of a complementary metal oxide semiconductor integrated circuit Download PDFInfo
- Publication number
- WO2006012311A1 WO2006012311A1 PCT/US2005/022529 US2005022529W WO2006012311A1 WO 2006012311 A1 WO2006012311 A1 WO 2006012311A1 US 2005022529 W US2005022529 W US 2005022529W WO 2006012311 A1 WO2006012311 A1 WO 2006012311A1
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- dielectric
- gate
- gate dielectric
- nmos
- dielectrics
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
- H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
- H01L21/8232—Field-effect technology
- H01L21/8234—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
- H01L21/8238—Complementary field-effect transistors, e.g. CMOS
- H01L21/823828—Complementary field-effect transistors, e.g. CMOS with a particular manufacturing method of the gate conductors, e.g. particular materials, shapes
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
- H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
- H01L21/8232—Field-effect technology
- H01L21/8234—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
- H01L21/8238—Complementary field-effect transistors, e.g. CMOS
- H01L21/823857—Complementary field-effect transistors, e.g. CMOS with a particular manufacturing method of the gate insulating layers, e.g. different gate insulating layer thicknesses, particular gate insulator materials or particular gate insulator implants
Definitions
- Figure 2 is an enlarged, partial, cross-sectional view of the embodiment shown in Figure 1 at a subsequent stage of manufacture in accordance with one embodiment of the present invention
- a single gate dielectric material may not provide the highest performance for both NMOS and PMOS structures. This may be due, for example, to poor band offset with conduction or valence bonds, incompatibility to the gate electrode material, incompatibility with gate electrode processing or thickness requirements.
- higher performance complementary metal oxide semiconductor devices may be created in some embodiments.
- better gate dielectric material of optimal thickness for each electrode stack higher performance structures may be created that may exhibit higher mobility, higher saturation current, or better threshold voltage in some embodiments .
Abstract
Description
Claims
Priority Applications (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
EP05767666A EP1761952B1 (en) | 2004-06-30 | 2005-06-24 | Using different gate dielectrics with nmos and pmos transistors of a complementary metal oxide semiconductor integrated circuit |
JP2007518323A JP4767946B2 (en) | 2004-06-30 | 2005-06-24 | Complementary metal oxide semiconductor integrated circuit with NMOS and PMOS transistors using different gate dielectrics |
CN2005800211389A CN1973368B (en) | 2004-06-30 | 2005-06-24 | Using different gate dielectrics with NMOS and PMOS transistors of a complementary metal oxide semiconductor integrated circuit |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US10/881,055 US7060568B2 (en) | 2004-06-30 | 2004-06-30 | Using different gate dielectrics with NMOS and PMOS transistors of a complementary metal oxide semiconductor integrated circuit |
US10/881,055 | 2004-06-30 |
Publications (1)
Publication Number | Publication Date |
---|---|
WO2006012311A1 true WO2006012311A1 (en) | 2006-02-02 |
Family
ID=34981845
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/US2005/022529 WO2006012311A1 (en) | 2004-06-30 | 2005-06-24 | Using different gate dielectrics with nmos and pmos transistors of a complementary metal oxide semiconductor integrated circuit |
Country Status (7)
Country | Link |
---|---|
US (2) | US7060568B2 (en) |
EP (1) | EP1761952B1 (en) |
JP (1) | JP4767946B2 (en) |
KR (1) | KR20070029830A (en) |
CN (2) | CN1973368B (en) |
TW (1) | TWI287863B (en) |
WO (1) | WO2006012311A1 (en) |
Cited By (2)
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WO2009072421A1 (en) * | 2007-12-03 | 2009-06-11 | Renesas Technology Corp. | Cmos semiconductor device and method for manufacturing the same |
US8288221B2 (en) | 2008-08-13 | 2012-10-16 | Renesas Electronics Corporation | Method of manufacturing semiconductor device and semiconductor device |
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US6921691B1 (en) * | 2004-03-18 | 2005-07-26 | Infineon Technologies Ag | Transistor with dopant-bearing metal in source and drain |
US8178902B2 (en) * | 2004-06-17 | 2012-05-15 | Infineon Technologies Ag | CMOS transistor with dual high-k gate dielectric and method of manufacture thereof |
US7592678B2 (en) * | 2004-06-17 | 2009-09-22 | Infineon Technologies Ag | CMOS transistors with dual high-k gate dielectric and methods of manufacture thereof |
US8399934B2 (en) * | 2004-12-20 | 2013-03-19 | Infineon Technologies Ag | Transistor device |
US7344934B2 (en) | 2004-12-06 | 2008-03-18 | Infineon Technologies Ag | CMOS transistor and method of manufacture thereof |
US7160781B2 (en) * | 2005-03-21 | 2007-01-09 | Infineon Technologies Ag | Transistor device and methods of manufacture thereof |
US7361538B2 (en) * | 2005-04-14 | 2008-04-22 | Infineon Technologies Ag | Transistors and methods of manufacture thereof |
US8188551B2 (en) | 2005-09-30 | 2012-05-29 | Infineon Technologies Ag | Semiconductor devices and methods of manufacture thereof |
US20070052036A1 (en) * | 2005-09-02 | 2007-03-08 | Hongfa Luan | Transistors and methods of manufacture thereof |
US20070052037A1 (en) * | 2005-09-02 | 2007-03-08 | Hongfa Luan | Semiconductor devices and methods of manufacture thereof |
US7462538B2 (en) * | 2005-11-15 | 2008-12-09 | Infineon Technologies Ag | Methods of manufacturing multiple gate CMOS transistors having different gate dielectric materials |
US7495290B2 (en) * | 2005-12-14 | 2009-02-24 | Infineon Technologies Ag | Semiconductor devices and methods of manufacture thereof |
US7510943B2 (en) * | 2005-12-16 | 2009-03-31 | Infineon Technologies Ag | Semiconductor devices and methods of manufacture thereof |
US20080050898A1 (en) * | 2006-08-23 | 2008-02-28 | Hongfa Luan | Semiconductor devices and methods of manufacture thereof |
JP5104373B2 (en) * | 2008-02-14 | 2012-12-19 | 日本ゼオン株式会社 | Production method of retardation plate |
US20090206405A1 (en) * | 2008-02-15 | 2009-08-20 | Doyle Brian S | Fin field effect transistor structures having two dielectric thicknesses |
KR20100082574A (en) * | 2009-01-09 | 2010-07-19 | 삼성전자주식회사 | Method of manufacturing cmos transistor |
KR101634748B1 (en) | 2009-12-08 | 2016-07-11 | 삼성전자주식회사 | method for manufacturing MOS transistor and forming method of integrated circuit using the sime |
KR101692362B1 (en) * | 2011-06-22 | 2017-01-05 | 삼성전자 주식회사 | Method for manufacturing semiconductor device using etch stop dielectric layer |
US8586436B2 (en) * | 2012-03-20 | 2013-11-19 | Taiwan Semiconductor Manufacturing Company, Ltd. | Method of forming a variety of replacement gate types including replacement gate types on a hybrid semiconductor device |
CN104347507B (en) * | 2013-07-24 | 2017-07-14 | 中芯国际集成电路制造(上海)有限公司 | The forming method of semiconductor devices |
US20180078091A1 (en) * | 2016-09-21 | 2018-03-22 | Matthew Chubb | Surface-Mounted Toasting Device |
US11114347B2 (en) * | 2017-06-30 | 2021-09-07 | Taiwan Semiconductor Manufacturing Co., Ltd. | Self-protective layer formed on high-k dielectric layers with different materials |
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- 2005-06-24 KR KR1020077002322A patent/KR20070029830A/en active Search and Examination
- 2005-06-24 EP EP05767666A patent/EP1761952B1/en not_active Not-in-force
- 2005-06-24 CN CN2010102864950A patent/CN101982874A/en active Pending
- 2005-06-24 JP JP2007518323A patent/JP4767946B2/en not_active Expired - Fee Related
- 2005-06-24 WO PCT/US2005/022529 patent/WO2006012311A1/en active Application Filing
- 2005-06-27 TW TW094121499A patent/TWI287863B/en not_active IP Right Cessation
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2006
- 2006-05-05 US US11/418,577 patent/US20060214237A1/en not_active Abandoned
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Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2009072421A1 (en) * | 2007-12-03 | 2009-06-11 | Renesas Technology Corp. | Cmos semiconductor device and method for manufacturing the same |
JP5284276B2 (en) * | 2007-12-03 | 2013-09-11 | ルネサスエレクトロニクス株式会社 | CMOS semiconductor device and manufacturing method thereof |
US8698249B2 (en) | 2007-12-03 | 2014-04-15 | Renesas Electronics Corporation | CMOS semiconductor device and method for manufacturing the same |
US8288221B2 (en) | 2008-08-13 | 2012-10-16 | Renesas Electronics Corporation | Method of manufacturing semiconductor device and semiconductor device |
Also Published As
Publication number | Publication date |
---|---|
TW200605303A (en) | 2006-02-01 |
JP2008504693A (en) | 2008-02-14 |
US20060214237A1 (en) | 2006-09-28 |
US20060001106A1 (en) | 2006-01-05 |
CN101982874A (en) | 2011-03-02 |
US7060568B2 (en) | 2006-06-13 |
JP4767946B2 (en) | 2011-09-07 |
CN1973368A (en) | 2007-05-30 |
EP1761952A1 (en) | 2007-03-14 |
CN1973368B (en) | 2010-11-17 |
KR20070029830A (en) | 2007-03-14 |
TWI287863B (en) | 2007-10-01 |
EP1761952B1 (en) | 2012-10-24 |
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