WO2006024226A1 - Dispositif et procede de realisation d'un contact bout-a-bout avec une plate-forme d'echange avance - Google Patents
Dispositif et procede de realisation d'un contact bout-a-bout avec une plate-forme d'echange avance Download PDFInfo
- Publication number
- WO2006024226A1 WO2006024226A1 PCT/CN2005/001346 CN2005001346W WO2006024226A1 WO 2006024226 A1 WO2006024226 A1 WO 2006024226A1 CN 2005001346 W CN2005001346 W CN 2005001346W WO 2006024226 A1 WO2006024226 A1 WO 2006024226A1
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- WIPO (PCT)
- Prior art keywords
- packet
- module
- advanced switching
- frame
- payload
- Prior art date
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Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L49/00—Packet switching elements
- H04L49/60—Software-defined switches
- H04L49/602—Multilayer or multiprotocol switching, e.g. IP switching
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L49/00—Packet switching elements
- H04L49/10—Packet switching elements characterised by the switching fabric construction
- H04L49/102—Packet switching elements characterised by the switching fabric construction using shared medium, e.g. bus or ring
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L49/00—Packet switching elements
- H04L49/35—Switches specially adapted for specific applications
- H04L49/356—Switches specially adapted for specific applications for storage area networks
- H04L49/357—Fibre channel switches
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S370/00—Multiplex communications
- Y10S370/901—Wide area network
- Y10S370/902—Packet switching
- Y10S370/903—Osi compliant network
- Y10S370/907—Synchronous optical network, SONET
Definitions
- the invention relates to a service platform docking technology in network communication, in particular to a synchronous digital sequence (SDH, Synchronous Digital Hierarchy) or Synchronous Optical Network (SONET) network and an Advanced Switching (AS) platform. Docked protocol interface (PI, Protocol Interface) device and method thereof.
- SDH Synchronous Digital Hierarchy
- SONET Synchronous Optical Network
- AS Advanced Switching
- AS is an advanced cross-structure.
- PCI-E bus structure PCI-Express
- ATM Asynchronous Transfer Mode
- SDH/SONET SDH/SONET
- IP Internet Protocol
- the processing of the data service and the SDH/SONE service is to complete the service scheduling in different cross planes, and the AS uses the unified packet switching technology to put various services in the same switching plane.
- Conduct a unified exchange at present, the AS core (AS CORE) has been released.
- AS CORE AS can be connected to 128 kinds of PIs. Each type of service has a corresponding PI.
- PCI-Express is a serial differential bus structure. The current rate is 2.5Gbps.
- PIx, Ply, PIz and Plr in the figure are the protocol processing interfaces corresponding to different services.
- PIx corresponds to ATM service
- Ply corresponds to SDH/S0NET service
- PIz corresponds to Ethernet.
- GE Gigabit Ethernet
- Plr corresponds to Ethernet Fast Ethernet (FE) service, where x, y, z, r are positive integers less than 128.
- SDH/SONET, ATM, GE, and FE networks pass their respective PI and AS The cross structures are connected and exchanged.
- the first main object of the present invention is to provide an apparatus for interfacing with an advanced switching platform for interfacing SDH/SONET networks with an AS platform, so that SDH/SONET services can be exchanged through the AS platform. deal with.
- a first line side interface processing module configured to receive a synchronous digital sequence/synchronous optical network network frame and perform frame scheduling and descrambling processing
- a de-frame processing module configured to de-frame the signal output by the first line-side interface processing module, and extract a payload
- a packaging module configured to output the payload of the demapping processing module into a high-level exchange package according to a packet format of the advanced switching platform
- a first advanced switching interface processing module configured to send the advanced switching package output by the packaging module to a switching fabric of the advanced switching platform
- the device In the direction of transmission from an advanced switching platform to a synchronous digital sequence/synchronous optical network, the device includes:
- a second advanced switching interface processing module configured to receive an advanced switching package sent by the advanced switching platform
- An unpacking module configured to enter an advanced exchange packet received by the second advanced switching interface processing module Line unpacking processing, extracting the payload in the advanced exchange package;
- mapping module configured to map the payload into a synchronous digital sequence/synchronous optical network network frame
- the second line side interface processing module is configured to perform scrambling processing on the synchronous digital sequence/synchronous optical network network frame output by the mapping module, and send the data to the synchronous digital sequence/synchronous optical network network.
- the device is further provided with a cross module between the deframe processing module and the packaging module for time division cross processing;
- a cross module is further disposed between the packaging module and the first advanced switching interface processing module for packet switching processing.
- a cross module is further disposed between the unpacking module and the mapping module, and is used for time division cross processing
- a cross module is further disposed between the unpacking module and the second advanced switching interface processing module for packet switching processing.
- the first line side interface processing module and the second line side interface processing module of the device are integrated together;
- the first advanced switching interface processing module and the second advanced switching interface processing module are integrated together.
- Another main object of the present invention is to provide a method for interfacing with an advanced switching platform, which is used for interfacing between an SDH/SONET network and an AS platform, so as to implement SDH/SONET services to exchange services through the AS platform.
- a method for interfacing with an advanced switching platform, in a transmission direction of a synchronous digital sequence/synchronous optical network to an advanced switching platform includes:
- the extracted payload is packaged into an advanced exchange package according to the packet format of the advanced switching platform, and sent to the advanced switching platform;
- the method includes:
- the synchronized digital sequence/synchronous optical network network frame is scrambled and sent to the synchronous digital sequence/synchronous optical network network.
- the packaging process is: converting each complete low-order service signal into a high-level exchange packet;
- each low-order service signal into multiple parts and make each part into a high-level exchange package
- the packaging process is: splitting a high-order service into multiple parts, and each part is formed into an advanced exchange package.
- the method of splitting each low-order or high-order traffic signal into multiple parts by the method is to split the traffic signal by column average.
- the method further includes: pre-scheduling the service packet size, the allowed delay, the packet utilization, the maximum length allowed by the advanced switching packet, and one of the maximum packet lengths that the physical chip can actually support.
- the item or multiple determines the number of packages for each service signal.
- the step B and C of the method further includes: performing time division cross processing on the payload by time slot; Or before performing the packet processing after the packet processing in step C, the method further includes: performing packet switching processing on the obtained advanced switching packet.
- the step of performing the unpacking after receiving the advanced switching packet in the method step D further includes: performing packet switching processing on the received advanced switching packet;
- step D Or further comprising, between step D and step E, performing time division cross processing on the payload after the unpacking process.
- the method further inserts useful overhead bytes as needed during the packaging process described in step C.
- the present invention provides a complete interworking scheme between the SDH/SONET network and the AS platform, so that the SDH/SONET service can easily exchange and transmit services of any granularity in the AS platform.
- the present invention further adds a partial data crossover function to the PI, so that the present invention can also perform time division crossing of the first level packet in the PI, and reduce the buffer space for the intermediate level cross (ie, AS exchange). The need to greatly increase the achievability of the physical chip and reduce the complexity and difficulty of the AS implementation.
- Figure 1 is a schematic diagram of a network structure based on AS
- FIG. 2 is a schematic structural diagram of a PI in an uplink direction according to an embodiment of the present invention
- FIG. 3 is a schematic structural diagram of a PI in a downlink direction according to an embodiment of the present invention
- FIG. 5 is a schematic diagram of processing logic of a PI according to the present invention
- FIG. 6 is a schematic diagram of a cross process according to a preferred embodiment of the present invention.
- FIG. 7 is a schematic diagram of an uplink structure of a PI that increases crossover according to an embodiment of the present invention.
- FIG. 8 is a schematic diagram of a downlink structure of a PI that increases crossover according to an embodiment of the present invention. Mode for carrying out the invention
- the core of the present invention is to provide a PI device and method for interfacing between an SDH/SONET network and an AS platform system, so that the SDH/SONET service can smoothly enter the AS platform system for processing.
- the PI device of the present invention can be applied to the upstream direction from the SDH/SONET network to the AS platform, and the downstream direction from the AS platform to the SDH/SONET network.
- the uplink processing unit is configured to send the SDH/SONET service to the AS platform system for exchange processing, and the downlink portion of the PI processing device is configured to exchange the processed AS package through the AS platform system.
- the mapping process is framed and transmitted to the SDH/SONET network for transmission.
- FIG. 2 The structure of the PI device used for uplink processing is shown in Figure 2, including:
- the line side interface processing module 201 provides an interface for the SDH/SONET service to enter the PI device, and mainly performs a framing and descrambling function for the service signal, and cooperates with the frame alignment and the B1 check, and also performs processing. Frame detection function, etc. are available.
- the de-frame processing module 202 is configured to perform de-frame processing on the data frame after descrambling the interface processing module 201, obtain an overhead in the frame, interpret the pointer, and extract a payload in the frame.
- the processing of the overhead includes processing the segment overhead and the channel overhead; the pointer interpretation and the payload extraction include: for the high-order service, by interpreting the pointers H1, H2, and H3 to find a high-order service such as VC4.
- For low-order services by processing the higher-order path overhead, the positions of VI, V2, V3, and V4 are known by H4, and then V5 bytes are located by VI and V2. In this way, the payload of the low-order service can be extracted into the corresponding data RAM for the next step of packet processing.
- the packetizing module 203 performs packet processing on the payload of the SDH/SONET frame obtained by the de-frame processing according to the format of the AS packet, and adds corresponding overhead as needed.
- the extracted payloads such as STS-1, STS-3(C)/VC4, etc. are in the format allowed by the AS package. And the length is marked as an AS packet.
- the extracted payloads such as VT1.5/VC11, VT2/VC12, VT3, VT6/VC2 particles, etc. are packaged into AS packets according to the format and length allowed by the AS package.
- the AS interface processing module 204 provides an output interface from the PI device to the AS platform system, and converts the AS package outputted by the packaging module into a format required by the AS platform system, and then sends the AS packet into the AS cross structure to facilitate the AS package. Packet switching processing is performed in the AS cross structure.
- the AS interface module also performs functions such as serial and level shifting. For example, for a 2.5 Gbps signal of an SDH/SONET service, after PI packet processing, in order to meet the packet requirements and service transmission integrity requirements of the AS platform system, additional overhead is required, and therefore, the signal processed by the PI is processed. The rate is greater than 2.5 Gbps, so since the current PCI-E rate is 2.5 Gbps, serial-to-parallel conversion is required in the AS interface module, so that it can be sent to the cross structure of the AS.
- FIG. 3 The structure of the PI device used for downlink processing is shown in Figure 3, including:
- the AS interface processing module 301 converts the AS packet from the AS cross structure into a format required for the unpacking module to be sent to the unpacking module for processing.
- the specific processing is the reverse process of the upstream processing.
- the unpacking module 302 unpacks the AS package and obtains the overhead and payload. Specifically, after the AS package is unpacked, the extracted overhead is stored in the corresponding random access memory (RAM) for storage, and the extracted payload is stored in the corresponding RAM for further mapping into SDH. Used in the /SONET frame format.
- RAM random access memory
- the mapping module 303 remaps the payload output by the unpacking module 302 into an SDH/SONET frame and inserts a corresponding overhead.
- the line side interface processing module 304 performs a scrambling code, a B1 check, and the like on the data frame output by the mapping module 303, and then transmits the data frame to the SDH/SONET network for transmission.
- the services in the uplink direction and the downlink direction are separated by two PI devices.
- the uplink and downlink PI devices can also be combined, and the structure thereof is shown in FIG. 4.
- the difference from the device of FIG. 2 and FIG. 3 is that: on the line side, the uplink and downlink service signals are uniformly processed by a line side interface processing module 401, and the module 401 has the above-mentioned uplink and downlink line side interface processing modules 201 and 304.
- the uplink and downlink service signals are uniformly processed by an AS interface processing module 402, which has the functions of the above-mentioned uplink and downlink AS interface processing modules 204 and 301.
- the other modules and their functions are the same as the PI devices of Figs. 2 and 3 described above.
- the method for implementing the SDH/SONET network to interface with the AS platform includes the following steps:
- the AS interface processing module sends the AS packet received by the AS cross-connection structure to the unpacked module, and the unpacking module unpacks the AS packet to obtain the overhead and payload. Then, the mapping processing module remaps the payload obtained by the unpacking module and the corresponding overhead information into a data frame, and inserts the overhead information, and the process of unpacking and mapping into the data frame is essentially de-framing and packaging. The inverse process of the processing process; Finally, the data frame obtained by the mapping processing module is scrambled by the interface processing module, processed by B1, and then transmitted to the SDH/SONET network for transmission.
- the core process of the above method is a packing and unpacking process.
- the packing strategy of the preferred embodiment of the present invention is described in detail below.
- all or part of the payload can be directly encapsulated in an AS packet according to the extracted payload size; for the overhead processing in the packaging process, according to the definition of AS-CORE, the AS packet has been fixed. 8 bytes overhead, because the length of the packet in the AS is variable, when the packet is encapsulated, in addition to the fixed overhead of the AS packet, some useful overhead bytes can be added or inserted as needed to ensure that the signal is transmitted. Integrity and the need to meet the functionality. Because of the number of overhead bytes, it only affects the actual utilization and bandwidth of the packet, and the packing method is the same, so in the following description, other overhead bytes are temporarily not considered.
- An SDH/SONET 2.5Gbps rate signal contains several service signals and can be divided into low-order service signals and high-order service signals.
- the low-order service signal contains 1344 VT1.5 signals or 1008 VC12 signals, etc., so if you want to schedule VT1.5 signals or VC12 low-order services, you must at least make 1344 or 1008 AS packets.
- For high-order service signals there are 48 STS - 1 signals or 16 VC4s, etc., so at least 48 or 16 packets are required for STS - 1 signals or VC4 signals. Due to the limitation of the maximum length of the AS packet (2176 bytes), it is important to make a suitable packet in the PI. The following describes the packet processing methods for low-order services and high-order services.
- the present invention preferably adopts two schemes, that is, each particle of the low-order service is grouped into one AS package, or one particle of the low-order service is divided into a plurality of AS packets.
- VC 12 will be used as an example to describe the packaging methods for low-level service signals:
- Solution 1 Make each particle of the low-level business into an AS package:
- the disadvantage is that for the PI device, it is almost impossible to complete the packet processing of the first packet after the completion of one frame reception, resulting in a longer packet delay time, and at least 'requires 2 frames of buffer space. One frame is used to buffer the data, and one frame is used to buffer the data.
- the first packet of the first 1008 VC12 is followed.
- Serial or parallel mode is sent to the virtual channel (VC, Virtual Channel) on the AS cross structure, and then the second packet of each VC12 is sent to the AS platform interface, and so on, until the ninth packet of each VC12 Send it in.
- the AS cross-exchange process it can be sent to the latter PI for unpacking, framing, etc., and then transmitted to the SDH/SONET network.
- mapping one VC12 into two packets which is reduced by nearly half compared to the storage space of one packet, and the time is saved by nearly half, and the utilization rate of the packet is 69.2%. If mapped to 3, 4, 5 packages, etc. are also possible.
- the specific packaging processing method is the same as the above-mentioned 9 packets, except that the required storage space and the corresponding delay time are reduced correspondingly.
- the selection of the mapping into 9 packets in the above embodiment takes into account that 4 columns of each VC12 in each row in the SDH frame can be grouped into one packet, which is easy to understand and relatively easy to implement.
- VC4 is used as an example to describe the packaging processing of high-order services:
- the above packages can enter the AS cross structure for exchange. Specifically, the number of packets can be determined according to actual needs or the actual packet length that the physical chip can support and the utilization rate of the packet.
- one VC4 signal is divided into 2 packets in one row of the SDH frame, and each packet has a size of 143 bytes.
- the specific method of packetization is similar to the processing scheme of the second low-order service described above, but for high-order services, the payload extraction performed before packing does not need to locate the low-order service, because the location of the payload is first passed. After the pointer finds the high order and then finds the low order, it only needs to extract the VC4 payload, which is much more convenient to handle than the low-level business.
- the unpacking process is the reverse process of each of the above packaging processes, which is exactly the opposite of the packaging process, and will not be described here.
- the storage of part of the service, and the time division or packet switching processing function may be further added in the PI.
- different services can be stored and exchanged in different PIs, and each service can be shared by several different PIs to reduce the storage space requirement of the AS.
- the corresponding cross-module can be added in the uplink and downlink sections of the PI device to complete the above-mentioned storage, and time-division cross-over or packet-switching processing functions.
- firstly pack/unpack and then cross When hardware is implemented, in the uplink direction, the crossover module is set after the packaging module; in the downstream direction, the crossover module is set. After unpacking the module. Or first pack and then unpack/unpack.
- the intersecting particles are packets; on the contrary, if they are firstly cross-packed, the intersecting particles are time slots, such as: VC12 of low-order services, VC4 of high-order service particles, and the like.
- the intersecting particles are packets; on the contrary, if the packets are first unpacked, the intersecting particles are time slots.
- the specific crossover method is performed according to the rules defined in AS-CORE.
- the process of crossover on the AS platform based on the above scheme is shown in Figure 6.
- the STM-n/OC-n service signal of SDH/SONET completes the processing of the first time slot or the packet through the uplink PI device. After the intersection of the intermediate AS cross structure, the first time slot or packet is completed in the downlink direction. Cross.
- This scheme is similar to the current time-space-time division (TST) cross-structure, but the difference is that all-packet switching or partial packet switching is implemented.
- a cross-module 701 is added between the de-frame processing module 202 and the packetizing module 203.
- the payload of the SDH/SONET frame outputted by the de-frame processing module 202 is time-divisionally intersected by the time slot in the cross-module, and then output to the packing module 203. Packing processing.
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Priority Applications (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE602005013486T DE602005013486D1 (de) | 2004-08-29 | 2005-08-29 | Eine vorrichtung und verfahren zum erreichen eines stumpfen kontakts mittels der fortschrittlichen austauschplatform |
EP05781835A EP1708430B1 (en) | 2004-08-29 | 2005-08-29 | A means and method for achieving butt-contact with the advanced exchange platform |
US11/505,954 US7961757B2 (en) | 2004-08-29 | 2006-08-18 | Device and method for interfacing to advanced switching platform |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
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CN200410076717.0 | 2004-08-29 | ||
CNB2004100767170A CN100421434C (zh) | 2004-08-29 | 2004-08-29 | 同步数字序列/同步光纤网网络与高级交换平台对接的装置及方法 |
Related Child Applications (1)
Application Number | Title | Priority Date | Filing Date |
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US11/505,954 Continuation US7961757B2 (en) | 2004-08-29 | 2006-08-18 | Device and method for interfacing to advanced switching platform |
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Publication Number | Publication Date |
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WO2006024226A1 true WO2006024226A1 (fr) | 2006-03-09 |
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PCT/CN2005/001346 WO2006024226A1 (fr) | 2004-08-29 | 2005-08-29 | Dispositif et procede de realisation d'un contact bout-a-bout avec une plate-forme d'echange avance |
Country Status (6)
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US (1) | US7961757B2 (zh) |
EP (1) | EP1708430B1 (zh) |
CN (1) | CN100421434C (zh) |
AT (1) | ATE426978T1 (zh) |
DE (1) | DE602005013486D1 (zh) |
WO (1) | WO2006024226A1 (zh) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
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CN104202109A (zh) * | 2014-09-11 | 2014-12-10 | 深圳供电局有限公司 | 一种sdh设备中内部时隙自动选择方法 |
Families Citing this family (1)
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CN101166062B (zh) * | 2006-10-18 | 2011-04-20 | 华为技术有限公司 | 一种光网络传送同步数字体制帧的方法和系统 |
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CN1310905A (zh) * | 1999-07-14 | 2001-08-29 | 信息产业部武汉邮电科学研究院 | 物理层与网络层侧设备间传输数据的数据传输装置和方法 |
US20030074449A1 (en) * | 2001-10-12 | 2003-04-17 | Rory Smith | Bandwidth allocation in a synchronous transmission network for packet oriented signals |
CN1492643A (zh) * | 2002-10-21 | 2004-04-28 | 华为技术有限公司 | 一种实现在光网络中传输InfiniBand数据的设备及方法 |
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US6006069A (en) * | 1994-11-28 | 1999-12-21 | Bosch Telecom Gmbh | Point-to-multipoint communications system |
DE69926599T2 (de) * | 1999-02-16 | 2006-06-08 | Alcatel | Verfahren und Vorrichtung zur Reglementierung des Datenverkehrs |
CN1246012A (zh) * | 1999-07-14 | 2000-03-01 | 邮电部武汉邮电科学研究院 | 一种用于英特网与同步数字体系融合的适配方法 |
-
2004
- 2004-08-29 CN CNB2004100767170A patent/CN100421434C/zh not_active Expired - Fee Related
-
2005
- 2005-08-29 AT AT05781835T patent/ATE426978T1/de not_active IP Right Cessation
- 2005-08-29 WO PCT/CN2005/001346 patent/WO2006024226A1/zh active Application Filing
- 2005-08-29 DE DE602005013486T patent/DE602005013486D1/de active Active
- 2005-08-29 EP EP05781835A patent/EP1708430B1/en not_active Not-in-force
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- 2006-08-18 US US11/505,954 patent/US7961757B2/en not_active Expired - Fee Related
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CN1310905A (zh) * | 1999-07-14 | 2001-08-29 | 信息产业部武汉邮电科学研究院 | 物理层与网络层侧设备间传输数据的数据传输装置和方法 |
US20030074449A1 (en) * | 2001-10-12 | 2003-04-17 | Rory Smith | Bandwidth allocation in a synchronous transmission network for packet oriented signals |
CN1492643A (zh) * | 2002-10-21 | 2004-04-28 | 华为技术有限公司 | 一种实现在光网络中传输InfiniBand数据的设备及方法 |
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Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
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CN104202109A (zh) * | 2014-09-11 | 2014-12-10 | 深圳供电局有限公司 | 一种sdh设备中内部时隙自动选择方法 |
CN104202109B (zh) * | 2014-09-11 | 2017-05-24 | 深圳供电局有限公司 | 一种sdh设备中内部时隙自动选择方法 |
Also Published As
Publication number | Publication date |
---|---|
CN1741509A (zh) | 2006-03-01 |
DE602005013486D1 (de) | 2009-05-07 |
EP1708430A4 (en) | 2007-03-14 |
EP1708430A1 (en) | 2006-10-04 |
CN100421434C (zh) | 2008-09-24 |
EP1708430B1 (en) | 2009-03-25 |
US20070041389A1 (en) | 2007-02-22 |
US7961757B2 (en) | 2011-06-14 |
ATE426978T1 (de) | 2009-04-15 |
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