WO2006083693A3 - Etchant treatment processes for substrate surfaces and chamber surfaces - Google Patents

Etchant treatment processes for substrate surfaces and chamber surfaces Download PDF

Info

Publication number
WO2006083693A3
WO2006083693A3 PCT/US2006/002841 US2006002841W WO2006083693A3 WO 2006083693 A3 WO2006083693 A3 WO 2006083693A3 US 2006002841 W US2006002841 W US 2006002841W WO 2006083693 A3 WO2006083693 A3 WO 2006083693A3
Authority
WO
WIPO (PCT)
Prior art keywords
substrate
chamber
etchant
silicon
treatment processes
Prior art date
Application number
PCT/US2006/002841
Other languages
French (fr)
Other versions
WO2006083693A2 (en
WO2006083693B1 (en
Inventor
Arkadii V Samoilov
Ali Zojaji
Original Assignee
Applied Materials Inc
Arkadii V Samoilov
Ali Zojaji
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US11/047,323 external-priority patent/US7235492B2/en
Application filed by Applied Materials Inc, Arkadii V Samoilov, Ali Zojaji filed Critical Applied Materials Inc
Priority to JP2007553243A priority Critical patent/JP5329094B2/en
Priority to EP06719625A priority patent/EP1848550A4/en
Priority to CN200680010817.0A priority patent/CN101155648B/en
Publication of WO2006083693A2 publication Critical patent/WO2006083693A2/en
Publication of WO2006083693A3 publication Critical patent/WO2006083693A3/en
Publication of WO2006083693B1 publication Critical patent/WO2006083693B1/en

Links

Classifications

    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B08—CLEANING
    • B08B—CLEANING IN GENERAL; PREVENTION OF FOULING IN GENERAL
    • B08B7/00—Cleaning by methods not provided for in a single other subclass or a single group in this subclass
    • B08B7/0035—Cleaning by methods not provided for in a single other subclass or a single group in this subclass by radiant energy, e.g. UV, laser, light beam or the like
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B08—CLEANING
    • B08B—CLEANING IN GENERAL; PREVENTION OF FOULING IN GENERAL
    • B08B6/00—Cleaning by electrostatic means
    • C—CHEMISTRY; METALLURGY
    • C25—ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
    • C25F—PROCESSES FOR THE ELECTROLYTIC REMOVAL OF MATERIALS FROM OBJECTS; APPARATUS THEREFOR
    • C25F1/00—Electrolytic cleaning, degreasing, pickling or descaling
    • C—CHEMISTRY; METALLURGY
    • C25—ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
    • C25F—PROCESSES FOR THE ELECTROLYTIC REMOVAL OF MATERIALS FROM OBJECTS; APPARATUS THEREFOR
    • C25F3/00—Electrolytic etching or polishing
    • C25F3/16—Polishing
    • C25F3/30—Polishing of semiconducting materials
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02041—Cleaning
    • H01L21/02043—Cleaning before device manufacture, i.e. Begin-Of-Line process
    • H01L21/02046—Dry cleaning only
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02041—Cleaning
    • H01L21/02057—Cleaning during device manufacture
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/3065—Plasma etching; Reactive-ion etching
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
    • H01L21/8232—Field-effect technology
    • H01L21/8234—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
    • H01L21/823418—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type with a particular manufacturing method of the source or drain structures, e.g. specific source or drain implants or silicided source or drain structures or raised source or drain structures
    • H01L21/823425—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type with a particular manufacturing method of the source or drain structures, e.g. specific source or drain implants or silicided source or drain structures or raised source or drain structures manufacturing common source or drain regions between a plurality of conductor-insulator-semiconductor structures
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02367—Substrates
    • H01L21/0237—Materials
    • H01L21/02373—Group 14 semiconducting materials
    • H01L21/02378—Silicon carbide
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02367—Substrates
    • H01L21/0237—Materials
    • H01L21/02373—Group 14 semiconducting materials
    • H01L21/02381—Silicon, silicon germanium, germanium
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02518—Deposited layers
    • H01L21/02521—Materials
    • H01L21/02524—Group 14 semiconducting materials
    • H01L21/02529—Silicon carbide
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02518—Deposited layers
    • H01L21/02521—Materials
    • H01L21/02524—Group 14 semiconducting materials
    • H01L21/02532—Silicon, silicon germanium, germanium
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02612—Formation types
    • H01L21/02617—Deposition types
    • H01L21/0262—Reduction or decomposition of gaseous compounds, e.g. CVD
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02656—Special treatments
    • H01L21/02658—Pretreatments
    • H01L21/02661—In-situ cleaning
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
    • H01L21/8232—Field-effect technology
    • H01L21/8234—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
    • H01L21/8238—Complementary field-effect transistors, e.g. CMOS
    • H01L21/823807—Complementary field-effect transistors, e.g. CMOS with a particular manufacturing method of the channel structures, e.g. channel implants, halo or pocket implants, or channel materials
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
    • H01L21/8232—Field-effect technology
    • H01L21/8234—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
    • H01L21/8238—Complementary field-effect transistors, e.g. CMOS
    • H01L21/823814—Complementary field-effect transistors, e.g. CMOS with a particular manufacturing method of the source or drain structures, e.g. specific source or drain implants or silicided source or drain structures or raised source or drain structures

Abstract

In one embodiment, a method for treating a silicon-containing surface is provided which includes removing contaminants and/or smoothing the substrate surface by a slow etch process (e.g., about <100 Å/min). The substrate is exposed to an etching gas that contains an etchant and a silicon source. Preferably, the etchant is chlorine gas and the substrate is heated to a temperature of less than about 800°C. In another embodiment, a fast etch process (e.g., about >100 Å/min) is provided which includes removing silicon material while forming a recess within a source/drain (S/D) area on the substrate surface. In another embodiment, a method for cleaning a process chamber is provided which includes exposing the interior surfaces with a chamber clean gas that contains an etchant and a silicon source. The chamber clean process limits the etching of quartz and metal surfaces within the process chamber.
PCT/US2006/002841 2005-01-31 2006-01-27 Etchant treatment processes for substrate surfaces and chamber surfaces WO2006083693A2 (en)

Priority Applications (3)

Application Number Priority Date Filing Date Title
JP2007553243A JP5329094B2 (en) 2005-01-31 2006-01-27 Etch treatment process for substrate and chamber surfaces
EP06719625A EP1848550A4 (en) 2005-01-31 2006-01-27 Etchant treatment processes for substrate surfaces and chamber surfaces
CN200680010817.0A CN101155648B (en) 2005-01-31 2006-01-27 The etchant process technique of substrate surface and chamber surface

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
US11/047,323 US7235492B2 (en) 2005-01-31 2005-01-31 Low temperature etchant for treatment of silicon-containing surfaces
US11/047,323 2005-01-31
US11/242,613 US8093154B2 (en) 2005-01-31 2005-10-03 Etchant treatment processes for substrate surfaces and chamber surfaces
US11/242,613 2005-10-03

Publications (3)

Publication Number Publication Date
WO2006083693A2 WO2006083693A2 (en) 2006-08-10
WO2006083693A3 true WO2006083693A3 (en) 2006-12-07
WO2006083693B1 WO2006083693B1 (en) 2007-01-18

Family

ID=36777783

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/US2006/002841 WO2006083693A2 (en) 2005-01-31 2006-01-27 Etchant treatment processes for substrate surfaces and chamber surfaces

Country Status (3)

Country Link
EP (1) EP1848550A4 (en)
KR (1) KR100938301B1 (en)
WO (1) WO2006083693A2 (en)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4809175B2 (en) * 2006-09-28 2011-11-09 株式会社日立国際電気 Manufacturing method of semiconductor device
KR100868228B1 (en) * 2007-12-04 2008-11-11 주식회사 켐트로닉스 Etchant composition for glass substrate
US8530286B2 (en) 2010-04-12 2013-09-10 Suvolta, Inc. Low power semiconductor transistor structure and method of fabrication thereof
KR101478331B1 (en) * 2010-11-17 2014-12-31 신닛테츠스미킨 카부시키카이샤 Method for producing epitaxial silicon carbide single crystal substrate
US10504717B2 (en) 2016-09-16 2019-12-10 Applied Materials, Inc. Integrated system and method for source/drain engineering
KR102599378B1 (en) * 2017-09-29 2023-11-08 솔브레인 주식회사 Composition for etching and manufacturing method of semiconductor device using the same

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6171965B1 (en) * 1999-04-21 2001-01-09 Silicon Genesis Corporation Treatment method of cleaved film for the manufacture of substrates
US6489241B1 (en) * 1999-09-17 2002-12-03 Applied Materials, Inc. Apparatus and method for surface finishing a silicon film

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05217921A (en) * 1991-09-13 1993-08-27 Motorola Inc Temperature-controlled treatment for execution of epitaxial growth of material film

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6171965B1 (en) * 1999-04-21 2001-01-09 Silicon Genesis Corporation Treatment method of cleaved film for the manufacture of substrates
US6489241B1 (en) * 1999-09-17 2002-12-03 Applied Materials, Inc. Apparatus and method for surface finishing a silicon film

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
See also references of EP1848550A4 *

Also Published As

Publication number Publication date
EP1848550A2 (en) 2007-10-31
WO2006083693A2 (en) 2006-08-10
EP1848550A4 (en) 2008-04-09
WO2006083693B1 (en) 2007-01-18
KR100938301B1 (en) 2010-01-22
KR20070108212A (en) 2007-11-08

Similar Documents

Publication Publication Date Title
EP2023376A3 (en) Etchant treatment processes for substrate surfaces and chamber surfaces
WO2007030476A3 (en) Apparatus and methods for mask cleaning
WO2006083693A3 (en) Etchant treatment processes for substrate surfaces and chamber surfaces
TW200610592A (en) Methods for wet cleaning quartz surfaces of components for plasma processing chambers
WO2005081289A3 (en) Process and apparatus for removing residues from semiconductor substrates
TW200618104A (en) Post-etch treatment to remove residues
WO2007126461A3 (en) Method for removing damaged dielectric material
WO2005114715A8 (en) Method for cleaning substrate surface
JP2009503889A5 (en)
TW200501254A (en) Method for removing silicon oxide film and processing apparatus
TW200718802A (en) Method of using NF3 for removing surface deposits
WO2006104819A3 (en) A method and system for removing an oxide from a substrate
DE502007004113D1 (en) Process for the purification of polysilicon breakage
SG142270A1 (en) Integrated method for removal of halogen residues from etched substrates by thermal process
TW200705120A (en) Device and method for cleaning photomask
WO2002049078A3 (en) Method for cleaning post-etch residues from a substrate
ATE498901T1 (en) ENDPOINT DETECTION FOR ETCHING PHOTOMASKS
JP2012501540A5 (en)
WO2002023611A3 (en) Integration of silicon etch and chamber cleaning processes
WO2007143476A3 (en) Apparatus and method for single substrate processing
TW200717628A (en) Wafer edge cleaning process
JP5529919B2 (en) Substrate processing method
TW200512823A (en) Methods for cleaning processing chambers
WO2008046304A8 (en) A cleaning method for use in post etch and ashing a semiconductor wafer
TW200723391A (en) Surface treatment method for substrate, cleaning method for substrate and program

Legal Events

Date Code Title Description
WWE Wipo information: entry into national phase

Ref document number: 200680010817.0

Country of ref document: CN

121 Ep: the epo has been informed by wipo that ep was designated in this application
WWE Wipo information: entry into national phase

Ref document number: 2007553243

Country of ref document: JP

NENP Non-entry into the national phase

Ref country code: DE

WWE Wipo information: entry into national phase

Ref document number: 2006719625

Country of ref document: EP

Ref document number: 1020077019991

Country of ref document: KR