WO2007001505A2 - Die module system and method - Google Patents
Die module system and method Download PDFInfo
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- WO2007001505A2 WO2007001505A2 PCT/US2006/006935 US2006006935W WO2007001505A2 WO 2007001505 A2 WO2007001505 A2 WO 2007001505A2 US 2006006935 W US2006006935 W US 2006006935W WO 2007001505 A2 WO2007001505 A2 WO 2007001505A2
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/18—Printed circuits structurally associated with non-printed electric components
- H05K1/189—Printed circuits structurally associated with non-printed electric components characterised by the use of a flexible or folded printed circuit
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C5/00—Details of stores covered by group G11C11/00
- G11C5/02—Disposition of storage elements, e.g. in the form of a matrix array
- G11C5/04—Supports for storage elements, e.g. memory modules; Mounting or fixing of storage elements on such supports
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/538—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
- H01L23/5387—Flexible insulating substrates
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
- H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
- H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
- H01L25/065—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L27/00
- H01L25/0652—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L27/00 the devices being arranged next and on each other, i.e. mixed assemblies
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
- H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
- H01L25/10—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices having separate containers
- H01L25/105—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices having separate containers the devices being of a type provided for in group H01L27/00
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- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2225/00—Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
- H01L2225/03—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00
- H01L2225/10—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices having separate containers
- H01L2225/1005—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices having separate containers the devices being of a type provided for in group H01L27/00
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2225/00—Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
- H01L2225/03—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00
- H01L2225/10—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices having separate containers
- H01L2225/1005—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices having separate containers the devices being of a type provided for in group H01L27/00
- H01L2225/1011—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices having separate containers the devices being of a type provided for in group H01L27/00 the containers being in a stacked arrangement
- H01L2225/1047—Details of electrical connections between containers
- H01L2225/107—Indirect electrical connections, e.g. via an interposer, a flexible substrate, using TAB
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/30—Technical effects
- H01L2924/301—Electrical effects
- H01L2924/3011—Impedance
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0201—Thermal arrangements, e.g. for cooling, heating or preventing overheating
- H05K1/0203—Cooling of mounted components
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/11—Printed elements for providing electric connections to or between printed circuits
- H05K1/118—Printed elements for providing electric connections to or between printed circuits specially for flexible printed circuits, e.g. using folded portions
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/18—Printed circuits structurally associated with non-printed electric components
- H05K1/181—Printed circuits structurally associated with non-printed electric components associated with surface mounted components
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/05—Flexible printed circuits [FPCs]
- H05K2201/056—Folded around rigid support or component
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09209—Shape and layout details of conductors
- H05K2201/09372—Pads and lands
- H05K2201/09445—Pads for connections not located at the edge of the PCB, e.g. for flexible circuits
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
- H05K2201/10431—Details of mounted components
- H05K2201/1056—Metal over component, i.e. metal plate over component mounted on or embedded in PCB
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
- H05K2201/10613—Details of electrical connections of non-printed components, e.g. special leads
- H05K2201/10621—Components characterised by their electrical contacts
- H05K2201/10674—Flip chip
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- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
- H05K2201/10613—Details of electrical connections of non-printed components, e.g. special leads
- H05K2201/10621—Components characterised by their electrical contacts
- H05K2201/10734—Ball grid array [BGA]; Bump grid array
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/20—Details of printed circuits not provided for in H05K2201/01 - H05K2201/10
- H05K2201/2018—Presence of a frame in a printed circuit or printed circuit assembly
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/15—Position of the PCB during processing
- H05K2203/1572—Processing both sides of a PCB by the same process; Providing a similar arrangement of components on both sides; Making interlayer connections from two sides
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/0058—Laminating printed circuit boards onto other substrates, e.g. metallic substrates
- H05K3/0061—Laminating printed circuit boards onto other substrates, e.g. metallic substrates onto a metallic substrate, e.g. a heat sink
Definitions
- MDP Multiple die packages
- This scheme increases the capacity of the memory devices on the DIMM by including multiple semiconductor die in a single device package.
- the additional heat generated by the multiple die typically requires, however, additional cooling capabilities to operate at maximum operating speed.
- the MDP scheme may exhibit increased costs because of increased yield loss from packaging together multiple die that are not fully pretested.
- Fig. 1 is a cross-sectional depiction of a preferred embodiment of a module devised in accordance with the present invention.
- Fig. 1 depicts a cross-sectional view of a preferred embodiment of a module 10 devised in accordance with the present invention.
- Module 10 is depicted in Fig. 1 exhibiting CSPs 18 which, in a preferred embodiment, are flip-chip die attached to flex circuit 12.
- Flip-chip CSPs 18 exhibit CSP contacts 17 for connection to the integrated circuit die of the flip-chip device.
- Flex 12 is wrapped about perimeter edge 16A of substrate 14, which in the depicted embodiment, provides the basic shape of a common DIMM board form factor such as that defined by JEDEC standard MO-256.
- Substrate or support structure 14 typically has first and second lateral sides S 1 and S 2 .
- Substrate 14 is preferably comprised of metallic material such as, for example, aluminum or a copper alloy. Substrate 14 is shown with multiple extensions 16T which have been shown to provide thermal advantages for module 10. Other embodiments may have greater or lesser numbers of such extensions and some embodiments lack any such an extension.
- the amount of encapsulant required is affected, as those of skill will recognize, by, for example, die size, initial and collapsed bump height, bump count, and layout of the flex circuit 12. There should be enough encapsulant to wet the bumps but not so much that a large excess fillet is created. Because the substrate is encapsulated during soldering, sometimes a significant amount of gas may outflow into the RE causing voids. Consequently out gassing during mounting should be controlled. After application, X-ray inspection is preferred with relatively low acceleration voltages being adequate. [0023] The mechanical qualities of no-flow underfill are not equal to capillary flow material and coefficients of thermal expansion can be higher while elastic moduli lower.
- Circuits 19 depicted between CSPs 18 may be buffers or controllers or other circuitry and in a later Fig., circuit 19 is depicted as the well known advanced memory buffer or "AMB" as part of a module 10 that implements the fully-buffered DIMM electrical design.
- Fig. 2 shows flex circuit 12 as having first and second fields Fl and F2 for mounting circuit devices. Each of fields Fl and F2 have at least one mounting contact array for CSPs such as the one depicted by reference 1 IA. Contact arrays such as array 11 are disposed beneath CSPs 18 and circuits 19.
- An exemplar contact array HA is shown as is exemplar CSP 18 to be mounted at contact array 1 IA as depicted.
- the contact arrays 1 IA that correspond to an IC plurality may be considered a contact array set.
- Field Fl of side 8 of flex circuit 12 is shown populated with first plurality of CSPs ICR 1 and second plurality of CSPs IC R2 while second field F2 of side 8 of flex circuit 12 is shown populated with first plurality of CSPs IC R1 and second plurality of CSPs ICR 2 .
- the identified pluralities of CSPs are, when disposed in the configurations depicted, typically described as "ranks". Between the ranks ICR 2 of field Fl and IC R2 of field F2, flex circuit 12 bears a plurality of module contacts allocated in this embodiment into two rows (CR 1 and C R2 ) of module contacts 20.
- the advanced memory buffer or "AMB” is the new buffer technology particularly for server memory and typically includes a number of features including pass-through logic for reading and writing data and commands and internal serialization capability, a data bus interface, a deserializing and decode logic capability and clocking functions.
- the functioning of an AMB is the principal distinguishing hard feature of a FB-DIMM module.
Abstract
A flex circuit is populated on one or both sides with plural integrated circuit die. In a preferred mode, the flex circuit is populated with flip-chip die. One side of the flex circuit has a connective facility implemented in a preferred mode with edge connector contacts. The flex circuit is disposed about a substrate to form a circuit module that may be inserted into an edge connector such as ones typically found on a computer board.
Description
DIE MODULE SYSTEM AND METHOD
Field: [001] The present invention relates to systems and methods for creating high density circuit modules and, in particular, systems and methods for creating such modules with integrated circuit die.
Background: [002] The well-known DIMM (Dual In-line Memory Module) board has been used for years, in various forms, to provide memory expansion. A typical DIMM includes a conventional PCB (printed circuit board) with memory devices and supporting digital logic devices mounted on both sides. The DIMM is typically mounted in the host computer system by inserting a contact-bearing edge of the DIMM into a card edge connector. Systems that employ DIMMs provide, however, very limited profile space for such devices and conventional DIMM-based solutions have typically provided only a moderate amount of memory expansion. [003] As bus speeds have increased, fewer devices per channel can be reliably addressed with a DIMM-based solution. For example, 288 ICs or devices per channel may be addressed using the SDRAM-100 bus protocol with an unbuffered DIMM. Using the DDR-200 bus protocol, approximately 144 devices may be address per channel. With the DDR2-400 bus protocol, only 72 devices per channel may be addressed. This constraint has led to the development of the fully-buffered DIMM (FB-DIMM) with buffered C/A and data in which 288 devices per channel may be addressed. With the FB-DIMM, not only has capacity increased, pin count has declined to approximately 69 signal pins from the approximately 240 pins previously required. [004] There are several known methods to improve the limited capacity of a DIMM or other circuit board. In one strategy, for example, small circuit boards (daughter cards) are connected to the DIMM to provide extra mounting space. The additional connection may cause, however, flawed signal integrity for the data signals passing from the DIMM to the daughter card and the additional thickness of the daughter card(s) increases the profile of the DIMM. [005] Multiple die packages (MDP) are also used to increase DIMM capacity while preserving profile conformity. This scheme increases the capacity of the memory devices on the DIMM by including multiple semiconductor die in a single device package. The additional heat generated by the multiple die typically requires, however, additional cooling capabilities to operate at maximum operating speed. Further, the MDP scheme may exhibit increased costs
because of increased yield loss from packaging together multiple die that are not fully pretested.
[006] Stacked packages are yet another strategy used to increase circuit board capacity. This scheme increases capacity by stacking packaged integrated circuits to create a high-density circuit module for mounting on the circuit board. In some techniques, flexible conductors are used to selectively interconnect packaged integrated circuits. Staktek Group L.P., the present assignee, has developed numerous systems for aggregating CSP (chipscale packaged) devices in space saving topologies. The increased component height of some stacking techniques may alter, however, system requirements such as, for example, required cooling airflow or the minimum spacing around a circuit board on its host system.
[007] Whether the application is for general purpose or specialized computing such as, for example, video processing, high capacity circuit modules can benefit from new methods and structures whether such modules are identified electrically, such as the FB-DIMM solution, for example, or by topology, such as SO-DIMMs for example, or by the type of circuitry employed, such as flash memory, for example.
Summary:
[008] A flex circuit is populated on one or both sides with plural integrated circuit die. In a preferred mode, the flex circuit is populated with flip-chip die. One side of the flex circuit has a connective facility implemented in a preferred mode with edge connector contacts. The flex circuit is disposed about a substrate to form a circuit module that may be inserted into an edge connector such as typically found on a computer board.
Brief Description of the Drawings: [009] Fig. 1 is a cross-sectional depiction of a preferred embodiment of a module devised in accordance with the present invention.
[0010] Fig. 2 depicts a contact bearing first side of a flex circuit devised in accordance with a preferred embodiment of the present invention.
[0011] Fig. 3 depicts the second side of the exemplar populated flex circuit of Fig. 2. [0012] Fig. 4 is a depiction of an embodiment in accordance with the present invention.
[0013] Fig. 5 depicts an enlarged area about end of a preferred module devised in accordance with the present invention.
[0014] Fig. 6 depicts a first side of a flex circuit for employment in a preferred embodiment of the present invention.
[0015] Fig. 7 depicts a second side of the flex circuit depicted in Fig. 6.
Detailed Description of Preferred Embodiments:
[0016] Fig. 1 depicts a cross-sectional view of a preferred embodiment of a module 10 devised in accordance with the present invention. Module 10 is depicted in Fig. 1 exhibiting CSPs 18 which, in a preferred embodiment, are flip-chip die attached to flex circuit 12. Flip-chip CSPs 18 exhibit CSP contacts 17 for connection to the integrated circuit die of the flip-chip device. [0017] Flex 12 is wrapped about perimeter edge 16A of substrate 14, which in the depicted embodiment, provides the basic shape of a common DIMM board form factor such as that defined by JEDEC standard MO-256. Substrate or support structure 14 typically has first and second lateral sides S1 and S2. Substrate 14 is preferably comprised of metallic material such as, for example, aluminum or a copper alloy. Substrate 14 is shown with multiple extensions 16T which have been shown to provide thermal advantages for module 10. Other embodiments may have greater or lesser numbers of such extensions and some embodiments lack any such an extension.
[0018] A preferred module 10 devised with flip-chip die would have a dimension Y2 in the range of between 5.0 mm and 8.00 mm, with a more preferred range of approximately 6.0mm (+/- 10%) and a preferred module 10 devised with flip-chip die would have a dimension X in the range between 25 mm and 36 mm with a more preferred range of approximately 30 mm (+/- 10%). Those of skill will note that module 10 may be devised with fewer or more than the 72 ICs 18 depicted populating modules 10 shown in Figs. 1-4.
[0019] Fig. 2 depicts a first side 8 of flex circuit 12 ("flex", "flex circuitry", "flexible circuit") used in constructing a module according to an embodiment of the present invention. Flex circuit 12 is preferably made from one or more conductive layers supported by one or more flexible substrate layers. The construction of flex circuitry is known in the art. The entirety of the flex circuit 12 may be flexible or, as those of skill in the art will recognize, the flexible circuit structure 12 may be made flexible in certain areas to allow conformability to required shapes or bends, and rigid in other areas to provide rigid and planar mounting surfaces. [0020] CSPs 18 on flexible circuit 12 are, in this embodiment, flip-chip devices that are one species of CSP devices of small scale. For purposes of this disclosure, the term chip-scale or "CSP" shall refer to integrated circuitry of any function with an array package providing connection to one or more die through contacts (often embodied as "bumps" or "balls" for example) distributed across a major surface of the package or die. CSP does not refer to leaded
devices that provide connection to an integrated circuit within the package through leads emergent from at least one side of the periphery of the package such as, for example, a TSOP. [0021] Where the term CSP is used, the above definition for CSP should be adopted. Consequently, although CSP excludes leaded devices, references to CSP are to be broadly construed to include the large variety of array devices (and not to be limited to memory only) and whether die-sized or other size such as BGA and micro BGA and flip-chip. [0022] Flip-chip devices typify the CSPs 18 of preferred embodiments of the present disclosure. Mounting flip-chip components directly to flex circuitry is becoming better understood. For example, flip chip on flex (FcoF) typically can be implemented with, for example, a no-flow or reflow encapsulant (RE) underfill technology. The process consists of dispensing underfill, placing the die and processing. Soldering is typically performed concurrently with other devices which are present. Underfill may also be preapplied to the die. The amount of encapsulant required is affected, as those of skill will recognize, by, for example, die size, initial and collapsed bump height, bump count, and layout of the flex circuit 12. There should be enough encapsulant to wet the bumps but not so much that a large excess fillet is created. Because the substrate is encapsulated during soldering, sometimes a significant amount of gas may outflow into the RE causing voids. Consequently out gassing during mounting should be controlled. After application, X-ray inspection is preferred with relatively low acceleration voltages being adequate. [0023] The mechanical qualities of no-flow underfill are not equal to capillary flow material and coefficients of thermal expansion can be higher while elastic moduli lower. However, no- flow technologies are adaptable to contemporary manufacturing and are but one of several techniques known for attachment of flip-chip die to flex circuitry. [0024] While in this embodiment memory flip-chip CSPs are used to provide a memory expansion board or module, various embodiments may include a variety of integrated circuits and other components in a variety of packages. Such variety may include microprocessors, FPGA' s, RF transceiver circuitry, digital logic, as a list of non-limiting examples, or other circuits or systems which may benefit from a high-density circuit board or module capability. Circuits 19 depicted between CSPs 18 may be buffers or controllers or other circuitry and in a later Fig., circuit 19 is depicted as the well known advanced memory buffer or "AMB" as part of a module 10 that implements the fully-buffered DIMM electrical design. [0025] The depiction of Fig. 2 shows flex circuit 12 as having first and second fields Fl and F2 for mounting circuit devices. Each of fields Fl and F2 have at least one mounting contact array for CSPs such as the one depicted by reference 1 IA. Contact arrays such as array 11 are
disposed beneath CSPs 18 and circuits 19. An exemplar contact array HA is shown as is exemplar CSP 18 to be mounted at contact array 1 IA as depicted. The contact arrays 1 IA that correspond to an IC plurality may be considered a contact array set.
[0026] Field Fl of side 8 of flex circuit 12 is shown populated with first plurality of CSPs ICR1 and second plurality of CSPs ICR2 while second field F2 of side 8 of flex circuit 12 is shown populated with first plurality of CSPs ICR1 and second plurality of CSPs ICR2. Those of skill will recognize that the identified pluralities of CSPs are, when disposed in the configurations depicted, typically described as "ranks". Between the ranks ICR2 of field Fl and ICR2 of field F2, flex circuit 12 bears a plurality of module contacts allocated in this embodiment into two rows (CR1 and CR2) of module contacts 20. Module contacts 20 are preferably adapted for connection to a circuit board socket such as, for example, an edge connector socket into which module 10 would be inserted. When flex circuit 12 is folded as later depicted, side 8 depicted in Fig. 2 is presented at the outside of module 10. The opposing side 9 of flex circuit 12 is on the inside in several depicted configurations of module 10 and thus side 9 is closer to the substrate 14 about which flex circuit 12 is disposed than is side 8. Other embodiments may have other numbers of ranks and combinations of plural CSPs connected to create the module of the present invention.
[0027] Fig. 3 shows side 9 of flex circuit 12 depicting the other side of the flex circuit shown in Fig. 2. Side 9 of flex circuit 12 is shown as being populated with multiple flip-chip CSPs 18. Side 9 includes fields Fl and F2 that each include at least one mounting contact array site for CSPs and, in the depicted case, include multiple contact arrays. Each of fields Fl and F2 include, in the depicted preferred embodiment, two pluralities of ICs identified in Fig. 3 as ICR1 and ICR2. Thus, each side of flex circuit 12 has, in a preferred embodiment, two fields Fl and F2 each of which fields includes two ranks of CSPs ICR1 and ICR2. In later Fig. 4, it will be recognized that fields Fl and F2 will be disposed on different sides of substrate 14 in a completed module 10 when CSPs 18 are identified according to the organizational identification depicted in Figs. 2 and 3 but those of skill will recognize that the groupings of CSPs 18 shown in Figs. 2 and 3 are not dictated by the invention but are provided merely as an exemplar organizational strategy to assist in understanding the present invention. [0028] Various discrete components such as termination resistors, bypass capacitors, and bias resistors, in addition to the circuits 19 shown on side 8 of flex circuit 12, may be mounted on either or both of sides 8 and 9 of flex 12. Flex circuit 12 may also depicted with reference to its perimeter edges, two of which are typically long (PEiongi and PEiong 2) and two of which are typically shorter (PEShOrti and PEshort2). Other embodiments may employ flex circuits 12 that
are not rectangular in shape and may be square in which case the perimeter edges would be of equal size or other convenient shape to adapt to manufacturing particulars. Other embodiments may also have fewer or greater numbers of ranks or pluralities of ICs in each field or on a side of a flex circuit. [0029] Those of skill will understand that the present invention may be implemented with only a single row of module contacts 20 rather than the two rows shown and may, in other embodiments, be implemented as a module bearing ICs on only one side of flex circuit 12 or only one side of flex circuit 12. [0030] Fig. 4 is a view of a module 10 devised in accordance with a preferred embodiment of the present invention. Fig. 4 depicts a module 10 that exhibits a single extension 16T for substrate 14 and shows how flex circuitry 12 is disposed about substrate 14 to place side 8 of flex circuit 12 on the exterior side of module 10.
[0031] Fig. 5 is an enlarged view of the area marked 'A' in Fig. 1. Edge 16A of substrate 14 is shaped like a male side edge of an edge card connector. While a particular oval-like configuration is shown, edge 16A may take on other shapes devised to mate with various connectors or sockets. The form and function of various edge card connectors are well know in the art. In many preferred embodiments, flex 12 is wrapped around edge 16A of substrate 14 and may be laminated or adhesively connected to substrate 14 with adhesive 30. The depicted adhesive 30 and flex 12 may vary in thickness and are not drawn to scale to simplify the drawing. The depicted substrate 14 has a thickness such that when assembled with the flex 12 and adhesive 30, the thickness measured between module contacts 20 falls in the range specified for the mating connector. In other instances, multiple flex circuits may be employed in a single module 10 or a single flex circuit may connect one or both sets of contacts 20 to the resident CSPs. [0032] While module contacts 20 are shown protruding from the surface of flex circuit 12, other embodiments may have flush contacts or contacts below the surface level of flex 12. Substrate 14 supports module contacts 20 from behind flex circuit 12 in a manner devised to provide the mechanical form required for insertion into a socket. In other embodiments, the thickness or shape of substrate 14 in the vicinity of perimeter edge 16A may differ from that in the body of substrate 14. Substrate 14 in the depicted embodiment is preferably made of a metal such as aluminum or copper or alloys of such metals, as non-limiting examples, or where thermal management is less of an issue, materials such as FR4 (flame retardant type 4) epoxy laminate, PTFE (poly-tetra-fluoro-ethylene) or plastic. In another embodiment, advantageous features from multiple technologies may be combined with use of FR4 having a layer of
copper on both sides to provide a substrate 14 devised from familiar materials which may provide heat conduction or a ground plane.
[0033] The advanced memory buffer or "AMB" is the new buffer technology particularly for server memory and typically includes a number of features including pass-through logic for reading and writing data and commands and internal serialization capability, a data bus interface, a deserializing and decode logic capability and clocking functions. The functioning of an AMB is the principal distinguishing hard feature of a FB-DIMM module. Those of skill will understand how to implement the connections between ICs 18 and AMB 19 in FB-DIMM circuits implemented by embodiments of the present invention and will recognize that the present invention provides advantages in capacity as well as reduced impedance discontinuity that can hinder larger implementations of FB-DIMM systems. Further, those of skill will recognize that various principles of the present invention can be employed to multiple FB- DIMM circuits on a single substrate or module. [0034] Fig. 6 depicts side 8 of flex circuit 12 populated with plural flip-chip CSPs 18 and an AMB 21. Although AMB 21 is shown on side 8 of the depicted flex circuit, those of skill will recognize that it may be mounted on side 9 of flex circuit 12 although the techniques for space management of packaged devices such as an AMB that are disclosed in co-pending U.S. Pat. App. No. 11/058,979, filed February 16, 2005 and commonly owned by the present assignee Staktek Group L.P., and which application has been incorporated by reference herein, may be profitably used when the AMB is disposed on what will be the inner side of a module 10.
[0035] Fig. 7 depicts side 9 of flex circuit 12 as may be employed in a FB-DIMM instantiation of a preferred embodiment of the present invention.
[0036] The present invention may be employed to advantage in a variety of applications and environment such as, for example, in computers such as servers and notebook computers by being placed in motherboard expansion slots to provide enhanced memory capacity while utilizing fewer sockets. Two high rank embodiments or single rank high embodiments may both be employed to such advantage as those of skill will recognize after appreciating this specification. [0037] One advantageous methodology for efficiently assembling a circuit module 10 such as described and depicted herein is as follows. In a preferred method of assembling a preferred module assembly 10, flex circuit 12 is placed flat and both sides populated according to flip- chip to flex assembly techniques known in the art such as those techniques earlier discussed herein, for example. Flex circuit 12 is then folded about end 16A of substrate 14. Flex 12 may be laminated or otherwise attached to substrate 14.
[0038] Although the present invention has been described in detail, it will be apparent to those skilled in the art that many embodiments taking a variety of specific forms and reflecting changes, substitutions and alterations can be made without departing from the spirit and scope of the invention. Therefore, the described embodiments illustrate but do not restrict the scope of the claims.
Claims
1. A memory expansion module comprising:
(a) a thermally-conductive rigid substrate having first and second lateral sides and an edge; (b) a flex circuit having a first side populated with first and second pluralities of integrated circuit die and a second side populated with first and second pluralities of integrated circuit die, the flex circuit having a plurality of edge connector contacts disposed along its first side between the first and second pluralities of integrated circuit die, the flex circuit being wrapped about the edge of the rigid substrate to dispose the second side of the flex circuit closer to the rigid substrate than is disposed the first side of the flex circuit.
2. The memory expansion module of claim 1 in which the thermally-conductive rigid substrate has at least one extension.
3. The memory expansion module of claim 2 in which the thermally-conductive rigid substrate is comprised of aluminum and has two extensions opposite the edge of the substrate.
4. The memory expansion module of claim 1 further comprising an advanced memory buffer.
5. The memory expansion module of claim 1 in which the integrated circuit die are flip- chip CSP.
6. The memory expansion module of claim 4 in which the thermally-conductive substrate is comprised of aluminum and the integrated circuit die are flip-chip CSP.
7. The memory expansion module of claim 6 in which the thermally conductive substrate has at least one extension.
8. A circuit module comprising: a flexible circuit having a first major side and a second major side, the flexible circuit exhibiting along the first major side, first-side first and second sets of contact site arrays between which is located at least one row of connector contacts, the second major side of the flexible circuit exhibiting second-side first and second sets of contact site arrays which correspond to the first-side first and second sets of contact site arrays, each of the first-side and second-side first and second sets of contact site arrays comprising at least two surface mount arrays, the flexible circuit providing connections between the at least two surface mount arrays of each of the first-side first and second sets of contact site arrays and the at least two surface mount arrays of each of the second-side first and second sets of contact site arrays; first and second pluralities of flip-chip CSPs that populate the at least two surface mount arrays of each of the first-side first and second sets of contact site arrays and the at least two surface mount arrays of each of the second-side first and second sets of contact site arrays, respectively; a substrate comprised from metallic material and having an end about which the flexible circuit is disposed to place the second plurality of flip-chip CSPs closer to the substrate than are disposed the first plurality of flip-chip CSPs.
9. The circuit module of claim 8 in which the substrate has at least one extension.
10. The circuit module of claim 8 further comprising an advanced memory buffer disposed on the first side of the flexible circuit.
11. The circuit module of claim 8 further comprising an advanced memory buffer disposed on the second side of the flexible circuit.
12. A circuit module that encourages the extraction of thermal energy from a flip-chip CSP that operates in conjunction with at least one other flip-chip CSP comprising: a first flip-chip CSP having CSP contacts; a second flip-chip CSP having CSP contacts; a flex circuit having a first side and a second side and a set of module contacts for connection of the module to an edge connector, the first flip-chip CSP being attached to the first side of the flex circuit, the attachment being effectuated employing the CSP contacts of the first flip-chip CSP; the second flip-chip CSP being attached the second side of the flex circuit, the attachment being effectuated employing the CSP contacts of the second flip-chip CSP so that the CSP contacts of the first flip-chip CSP are separated from the CSP contacts of the second flip-chip CSP by at least a part of the flex circuit; and a thermally conductive substrate member about a first end of which substrate the flex circuit is disposed to place the second flip-chip CSP closer to the substrate than is disposed the first flip-chip CSP.
13. The circuit module of claim 12 in which the thermally conductive substrate member is comprised of aluminum and exhibits at least one extension disposed on an opposite end of the substrate from the first end of the substrate.
14. A circuit module comprising: a flex circuit having a first side and a second side, the first side having a first field of flip-chip CSPs and a second field of flip-chip CSPs and plural contacts along the first side adapted for connection to a circuit board socket, the plural contacts being disposed between the first field and the second field; a buffer circuit mounted along a portion of the flex circuit; a rigid substrate having first and second opposing lateral sides and an edge, the flex circuit being disposed about edge of the rigid substrate to place the first side of the flex circuit further from the rigid substrate than is placed the second side of the flex circuit.
15. The circuit module of claim 14 in which the flip-chip CSPs and the buffer circuit comprise a FB-DIMM instantiation.
16. The circuit module of claim 15 in which the rigid substrate is comprised of aluminum and has at least one extension.
17. The circuit module of claim 14 or 15 connected to a main circuit board employed in a computer.
18. The circuit module of claim 17 in which the computer is a server computer.
19. The circuit module of claim 17 in which the computer is a notebook computer.
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US11/157,565 US7423885B2 (en) | 2004-09-03 | 2005-06-21 | Die module system |
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US7768796B2 (en) | 2010-08-03 |
WO2007001505A3 (en) | 2007-10-25 |
US20060050498A1 (en) | 2006-03-09 |
US7423885B2 (en) | 2008-09-09 |
US20080278924A1 (en) | 2008-11-13 |
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