WO2007093741A3 - Transistor mos a seuil reglable - Google Patents
Transistor mos a seuil reglable Download PDFInfo
- Publication number
- WO2007093741A3 WO2007093741A3 PCT/FR2007/050798 FR2007050798W WO2007093741A3 WO 2007093741 A3 WO2007093741 A3 WO 2007093741A3 FR 2007050798 W FR2007050798 W FR 2007050798W WO 2007093741 A3 WO2007093741 A3 WO 2007093741A3
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- mos transistor
- adjustable threshold
- isolated
- channel
- substrate
- Prior art date
Links
- 239000000758 substrate Substances 0.000 abstract 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/7841—Field effect transistors with field effect produced by an insulated gate with floating body, e.g. programmable transistors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0603—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
- H01L29/0642—Isolation within the component, i.e. internal isolation
- H01L29/0649—Dielectric regions, e.g. SiO2 regions, air gaps
- H01L29/0653—Dielectric regions, e.g. SiO2 regions, air gaps adjoining the input or output region of a field-effect device, e.g. the source or drain region
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/10—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
- H01L29/1025—Channel region of field-effect devices
- H01L29/1029—Channel region of field-effect devices of field-effect transistors
- H01L29/1033—Channel region of field-effect devices of field-effect transistors with insulated gate, e.g. characterised by the length, the width, the geometric contour or the doping structure
- H01L29/1054—Channel region of field-effect devices of field-effect transistors with insulated gate, e.g. characterised by the length, the width, the geometric contour or the doping structure with a variation of the composition, e.g. channel with strained layer for increasing the mobility
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/10—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
- H01L29/107—Substrate region of field-effect devices
- H01L29/1075—Substrate region of field-effect devices of field-effect transistors
- H01L29/1079—Substrate region of field-effect devices of field-effect transistors with insulated gate
- H01L29/1083—Substrate region of field-effect devices of field-effect transistors with insulated gate with an inactive supplementary region, e.g. for preventing punch-through, improving capacity effect or leakage current
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/66568—Lateral single gate silicon transistors
- H01L29/66636—Lateral single gate silicon transistors with source or drain recessed by etching or first recessed by etching and then refilled
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/792—Field effect transistors with field effect produced by an insulated gate with charge trapping gate insulator, e.g. MNOS-memory transistors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/792—Field effect transistors with field effect produced by an insulated gate with charge trapping gate insulator, e.g. MNOS-memory transistors
- H01L29/7923—Programmable transistors with more than two possible different levels of programmation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/665—Unipolar field-effect transistors with an insulated gate, i.e. MISFET using self aligned silicidation, i.e. salicide
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/66833—Unipolar field-effect transistors with an insulated gate, i.e. MISFET with a charge trapping gate insulator, e.g. MNOS transistors
Abstract
L'invention concerne un transistor MOS comprenant un prolongement conducteur (10, 28) de sa région de source, isolé (11, 27) de son substrat, et s 'étendant partiellement sous son canal.
Priority Applications (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US12/279,056 US8410539B2 (en) | 2006-02-14 | 2007-02-14 | MOS transistor with a settable threshold |
EP07731623A EP1994567A2 (fr) | 2006-02-14 | 2007-02-14 | Transistor mos a seuil reglable |
JP2008553809A JP2009527103A (ja) | 2006-02-14 | 2007-02-14 | 閾値が調整可能なmosトランジスタ |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FR0650525 | 2006-02-14 | ||
FR0650525 | 2006-02-14 |
Publications (2)
Publication Number | Publication Date |
---|---|
WO2007093741A2 WO2007093741A2 (fr) | 2007-08-23 |
WO2007093741A3 true WO2007093741A3 (fr) | 2007-11-22 |
Family
ID=37069719
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/FR2007/050798 WO2007093741A2 (fr) | 2006-02-14 | 2007-02-14 | Transistor mos a seuil reglable |
Country Status (4)
Country | Link |
---|---|
US (1) | US8410539B2 (fr) |
EP (1) | EP1994567A2 (fr) |
JP (1) | JP2009527103A (fr) |
WO (1) | WO2007093741A2 (fr) |
Families Citing this family (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7948008B2 (en) * | 2007-10-26 | 2011-05-24 | Micron Technology, Inc. | Floating body field-effect transistors, and methods of forming floating body field-effect transistors |
KR101505494B1 (ko) * | 2008-04-30 | 2015-03-24 | 한양대학교 산학협력단 | 무 커패시터 메모리 소자 |
CN104425262B (zh) * | 2013-08-20 | 2017-11-14 | 中芯国际集成电路制造(上海)有限公司 | Pmos晶体管结构及其制造方法 |
TWI675473B (zh) * | 2015-11-16 | 2019-10-21 | 聯華電子股份有限公司 | 高壓半導體裝置 |
US10355104B2 (en) | 2017-10-27 | 2019-07-16 | Globalfoundries Inc. | Single-curvature cavity for semiconductor epitaxy |
US10297675B1 (en) | 2017-10-27 | 2019-05-21 | Globalfoundries Inc. | Dual-curvature cavity for epitaxial semiconductor growth |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
FR2818012A1 (fr) * | 2000-12-12 | 2002-06-14 | St Microelectronics Sa | Dispositif semi-conducteur integre de memoire |
Family Cites Families (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7064399B2 (en) * | 2000-09-15 | 2006-06-20 | Texas Instruments Incorporated | Advanced CMOS using super steep retrograde wells |
US6555437B1 (en) * | 2001-04-27 | 2003-04-29 | Advanced Micro Devices, Inc. | Multiple halo implant in a MOSFET with raised source/drain structure |
US6780776B1 (en) * | 2001-12-20 | 2004-08-24 | Advanced Micro Devices, Inc. | Nitride offset spacer to minimize silicon recess by using poly reoxidation layer as etch stop layer |
US7057234B2 (en) * | 2002-12-06 | 2006-06-06 | Cornell Research Foundation, Inc. | Scalable nano-transistor and memory using back-side trapping |
JP4590884B2 (ja) * | 2003-06-13 | 2010-12-01 | 株式会社デンソー | 半導体装置およびその製造方法 |
US7259083B2 (en) * | 2004-10-22 | 2007-08-21 | Lsi Corporation | Local interconnect manufacturing process |
-
2007
- 2007-02-14 JP JP2008553809A patent/JP2009527103A/ja active Pending
- 2007-02-14 WO PCT/FR2007/050798 patent/WO2007093741A2/fr active Application Filing
- 2007-02-14 EP EP07731623A patent/EP1994567A2/fr not_active Withdrawn
- 2007-02-14 US US12/279,056 patent/US8410539B2/en active Active
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
FR2818012A1 (fr) * | 2000-12-12 | 2002-06-14 | St Microelectronics Sa | Dispositif semi-conducteur integre de memoire |
Non-Patent Citations (4)
Title |
---|
MONFRAY S ET AL: "Emerging silicon-on-nothing (SON) devices technology", SOLID STATE ELECTRONICS, ELSEVIER SCIENCE PUBLISHERS, BARKING, GB, vol. 48, no. 6, June 2004 (2004-06-01), pages 887 - 895, XP004492637, ISSN: 0038-1101 * |
MONFRAY S ET AL: "SON (silicon-on-nothing) technological CMOS platform: highly performant devices and SRAM cells", ELECTRON DEVICES MEETING, 2004. IEDM TECHNICAL DIGEST. IEEE INTERNATIONAL SAN FRANCISCO, CA, USA DEC. 13-15, 2004, PISCATAWAY, NJ, USA,IEEE, 13 December 2004 (2004-12-13), pages 635 - 638, XP010788873, ISBN: 0-7803-8684-1 * |
RANICA R ET AL: "A NEW 40-NM SONOS STRUCTURE BASED ON BACKSIDE TRAPPING FOR NANOSCALE MEMORIES", IEEE TRANSACTIONS ON NANOTECHNOLOGY, IEEE SERVICE CENTER, PISCATAWAY, NJ, US, vol. 4, no. 5, September 2005 (2005-09-01), pages 581 - 587, XP001238537, ISSN: 1536-125X * |
See also references of EP1994567A2 * |
Also Published As
Publication number | Publication date |
---|---|
EP1994567A2 (fr) | 2008-11-26 |
US8410539B2 (en) | 2013-04-02 |
US20100067310A1 (en) | 2010-03-18 |
WO2007093741A2 (fr) | 2007-08-23 |
JP2009527103A (ja) | 2009-07-23 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
WO2010030493A3 (fr) | Transistor muni d'une grille passive et ses procédés de fabrication | |
WO2007012490A3 (fr) | Composant a semi-conducteurs comportant une zone de derive et une zone de commande de derive | |
WO2007097985A8 (fr) | Dispositifs de nettoyage de catheter | |
WO2007133290A3 (fr) | Anticorps anti-ox40l et méthodes correspondantes | |
TW200739911A (en) | Transistor device having an increased threshold stability without drive current degradation | |
AU2003303885A1 (en) | Semiconductor substrate, field-effect transistor, and their production methods | |
WO2008014008A3 (fr) | Compositions et procédés pour moduler l'angiogenèse | |
TW200727498A (en) | Semiconductor device having screening electrode and method | |
WO2007093741A3 (fr) | Transistor mos a seuil reglable | |
WO2007130697A8 (fr) | Anticorps anti-ephb4 et procedes qui les utilisent | |
GB2449023A (en) | Electronic short channel device comprising an organic semiconductor formulation | |
SG126899A1 (en) | Light-emitting device, method for making the same,and nitride semiconductor substrate | |
TW200739907A (en) | CMOS device having PMOS and NMOS transistors with different gate structures | |
EP1974895A3 (fr) | Dispositif de déchargement de pièces moulées provenant d'une presse rotative | |
WO2007014295A3 (fr) | Appareils a vannes a action rapide | |
TW200723409A (en) | Power semiconductor device having improved performance and method | |
WO2006091848A3 (fr) | Bis-linezolide isole, sa preparation et son utilisation comme norme de reference | |
WO2007127506A8 (fr) | Anticorps anti-ephrinb2 et procédés les utilisant | |
MY145788A (en) | Antitumoral dihydropyran-2-one compounds | |
WO2005094761A8 (fr) | Compositions de traitement capillaire comprenant un disaccharide, un diacide et une source d'ions ammonium | |
TW200739747A (en) | Semiconductor device comprising a transistor having a counter-doped channel region and method for forming the same | |
TW200729460A (en) | Semiconductor device | |
WO2006119997A3 (fr) | Sonde de traitement | |
TWI266477B (en) | Chip with adjustable pinout function and method thereof | |
TW200737514A (en) | Semiconductor device and methods of manufacture thereof |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
WWE | Wipo information: entry into national phase |
Ref document number: 2007731623 Country of ref document: EP |
|
WWE | Wipo information: entry into national phase |
Ref document number: 2008553809 Country of ref document: JP |
|
NENP | Non-entry into the national phase |
Ref country code: DE |
|
121 | Ep: the epo has been informed by wipo that ep was designated in this application |
Ref document number: 07731623 Country of ref document: EP Kind code of ref document: A2 |
|
WWE | Wipo information: entry into national phase |
Ref document number: 12279056 Country of ref document: US |