WO2007115227A3 - Multi-port memory device having variable port speeds - Google Patents
Multi-port memory device having variable port speeds Download PDFInfo
- Publication number
- WO2007115227A3 WO2007115227A3 PCT/US2007/065723 US2007065723W WO2007115227A3 WO 2007115227 A3 WO2007115227 A3 WO 2007115227A3 US 2007065723 W US2007065723 W US 2007065723W WO 2007115227 A3 WO2007115227 A3 WO 2007115227A3
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- port
- clock
- memory device
- ports
- operate
- Prior art date
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C8/00—Arrangements for selecting an address in a digital store
- G11C8/16—Multiple access memory array, e.g. addressing one storage element via at least two independent addressing line groups
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/22—Read-write [R-W] timing or clocking circuits; Read-write [R-W] control signal generators or management
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/40—Bus structure
- G06F13/4004—Coupling between buses
- G06F13/4027—Coupling between buses using bus bridges
- G06F13/405—Coupling between buses using bus bridges where the bridge performs a synchronising function
- G06F13/4054—Coupling between buses using bus bridges where the bridge performs a synchronising function where the function is bus cycle extension, e.g. to meet the timing requirements of the target bus
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/42—Bus transfer protocol, e.g. handshake; Synchronisation
- G06F13/4204—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus
- G06F13/4234—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus being a memory bus
- G06F13/4243—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus being a memory bus with synchronous protocol
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
- G11C7/1075—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers for multiport memories each having random access ports and serial ports, e.g. video RAM
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C2207/00—Indexing scheme relating to arrangements for writing information into, or reading information out from, a digital store
- G11C2207/10—Aspects relating to interfaces of memory device to external buses
- G11C2207/108—Wide data ports
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- General Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Multimedia (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Multi Processors (AREA)
- Static Random-Access Memory (AREA)
- Dram (AREA)
- Techniques For Improving Reliability Of Storages (AREA)
- Computer And Data Communications (AREA)
- Stored Programmes (AREA)
Abstract
Priority Applications (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN2007800185044A CN101449334B (en) | 2006-03-30 | 2007-03-30 | Multi-port memory device having variable port speeds |
JP2009503325A JP5188493B2 (en) | 2006-03-30 | 2007-03-30 | Multiport memory device with variable port speed |
EP07759902A EP2008281B1 (en) | 2006-03-30 | 2007-03-30 | Multi-port memory device having variable port speeds |
KR1020087026515A KR101323400B1 (en) | 2006-03-30 | 2007-03-30 | Multi-port memory device having variable port speeds |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US78840106P | 2006-03-30 | 2006-03-30 | |
US60/788,401 | 2006-03-30 |
Publications (2)
Publication Number | Publication Date |
---|---|
WO2007115227A2 WO2007115227A2 (en) | 2007-10-11 |
WO2007115227A3 true WO2007115227A3 (en) | 2007-11-29 |
Family
ID=38421761
Family Applications (2)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/US2007/065722 WO2007115226A2 (en) | 2006-03-30 | 2007-03-30 | Inter-port communication in a multi- port memory device |
PCT/US2007/065723 WO2007115227A2 (en) | 2006-03-30 | 2007-03-30 | Multi-port memory device having variable port speeds |
Family Applications Before (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/US2007/065722 WO2007115226A2 (en) | 2006-03-30 | 2007-03-30 | Inter-port communication in a multi- port memory device |
Country Status (7)
Country | Link |
---|---|
US (2) | US7639561B2 (en) |
EP (2) | EP2008164A2 (en) |
JP (2) | JP5188493B2 (en) |
KR (2) | KR101341286B1 (en) |
CN (3) | CN101438242B (en) |
TW (3) | TWI340982B (en) |
WO (2) | WO2007115226A2 (en) |
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US8443134B2 (en) | 2006-12-06 | 2013-05-14 | Fusion-Io, Inc. | Apparatus, system, and method for graceful cache device degradation |
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US9519540B2 (en) | 2007-12-06 | 2016-12-13 | Sandisk Technologies Llc | Apparatus, system, and method for destaging cached data |
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-
2007
- 2007-03-30 TW TW096111507A patent/TWI340982B/en active
- 2007-03-30 KR KR1020087026426A patent/KR101341286B1/en active IP Right Grant
- 2007-03-30 WO PCT/US2007/065722 patent/WO2007115226A2/en active Application Filing
- 2007-03-30 US US11/694,813 patent/US7639561B2/en active Active
- 2007-03-30 KR KR1020087026515A patent/KR101323400B1/en active IP Right Grant
- 2007-03-30 EP EP07759901A patent/EP2008164A2/en not_active Ceased
- 2007-03-30 CN CN2007800160526A patent/CN101438242B/en active Active
- 2007-03-30 US US11/694,819 patent/US7949863B2/en active Active
- 2007-03-30 CN CN2007800185044A patent/CN101449334B/en active Active
- 2007-03-30 EP EP07759902A patent/EP2008281B1/en active Active
- 2007-03-30 CN CN2007800183833A patent/CN101449262B/en active Active
- 2007-03-30 JP JP2009503325A patent/JP5188493B2/en active Active
- 2007-03-30 TW TW096111501A patent/TWI386846B/en active
- 2007-03-30 WO PCT/US2007/065723 patent/WO2007115227A2/en active Application Filing
- 2007-03-30 JP JP2009503324A patent/JP5197571B2/en active Active
- 2007-03-30 TW TW096111504A patent/TWI353124B/en active
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Also Published As
Publication number | Publication date |
---|---|
KR101341286B1 (en) | 2013-12-12 |
US20070245094A1 (en) | 2007-10-18 |
KR20080104388A (en) | 2008-12-02 |
CN101449262A (en) | 2009-06-03 |
US7639561B2 (en) | 2009-12-29 |
TWI340982B (en) | 2011-04-21 |
TW200818734A (en) | 2008-04-16 |
CN101438242B (en) | 2013-09-18 |
EP2008281A2 (en) | 2008-12-31 |
JP2009532815A (en) | 2009-09-10 |
KR101323400B1 (en) | 2013-10-29 |
JP5197571B2 (en) | 2013-05-15 |
CN101438242A (en) | 2009-05-20 |
EP2008281B1 (en) | 2012-01-25 |
JP5188493B2 (en) | 2013-04-24 |
WO2007115227A2 (en) | 2007-10-11 |
WO2007115226A2 (en) | 2007-10-11 |
TW200802082A (en) | 2008-01-01 |
JP2009532782A (en) | 2009-09-10 |
KR20090007378A (en) | 2009-01-16 |
CN101449262B (en) | 2012-07-04 |
EP2008164A2 (en) | 2008-12-31 |
TWI353124B (en) | 2011-11-21 |
TW200802403A (en) | 2008-01-01 |
US7949863B2 (en) | 2011-05-24 |
US20070234021A1 (en) | 2007-10-04 |
CN101449334A (en) | 2009-06-03 |
TWI386846B (en) | 2013-02-21 |
WO2007115226A3 (en) | 2008-10-30 |
CN101449334B (en) | 2012-04-25 |
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