WO2007145701A3 - Nanoscale wire methods and devices - Google Patents

Nanoscale wire methods and devices Download PDF

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Publication number
WO2007145701A3
WO2007145701A3 PCT/US2007/008540 US2007008540W WO2007145701A3 WO 2007145701 A3 WO2007145701 A3 WO 2007145701A3 US 2007008540 W US2007008540 W US 2007008540W WO 2007145701 A3 WO2007145701 A3 WO 2007145701A3
Authority
WO
WIPO (PCT)
Prior art keywords
nanoscale wires
devices
substrate
methods
nanoscale
Prior art date
Application number
PCT/US2007/008540
Other languages
French (fr)
Other versions
WO2007145701A2 (en
Inventor
Sung Woo Nam
Ali Javey
Charles M Lieber
Original Assignee
Harvard College
Sung Woo Nam
Ali Javey
Charles M Lieber
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Harvard College, Sung Woo Nam, Ali Javey, Charles M Lieber filed Critical Harvard College
Publication of WO2007145701A2 publication Critical patent/WO2007145701A2/en
Publication of WO2007145701A3 publication Critical patent/WO2007145701A3/en

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/0657Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by the shape of the body
    • H01L29/0665Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by the shape of the body the shape of the body defining a nanostructure
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B82NANOTECHNOLOGY
    • B82YSPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
    • B82Y10/00Nanotechnology for information processing, storage or transmission, e.g. quantum computing or single electron logic
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/0657Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by the shape of the body
    • H01L29/0665Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by the shape of the body the shape of the body defining a nanostructure
    • H01L29/0669Nanowires or nanotubes
    • H01L29/0673Nanowires or nanotubes oriented parallel to a substrate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/12Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/16Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic System
    • H01L29/1606Graphene
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/778Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface
    • H01L29/7781Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface with inverted single heterostructure, i.e. with active layer formed on top of wide bandgap layer, e.g. IHEMT
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate

Abstract

The present invention generally relates to nanoscale wire methods and devices, including systems and methods for positioning nanoscale wires on a surface, and articles made therefrom. One aspect of the invention is generally directed to aligned nanoscale wires on a surface of a substrate, and systems and methods of positioning such nanoscale wires on the surface. In one set of embodiments, a first substrate is provided having a plurality of nanoscale wires, and at least some of the nanoscale wires are transferred to a second substrate by contacting at least some of the nanoscale wires with the second substrate, e.g., by moving or 'sliding' the substrates relative to each other, in some cases causing alignment of the nanoscale wires on the second substrate. Another aspect of the invention is generally directed to electrical devices comprising a number of planes defined by nanoscale wires, e.g., in a 'stacked' configuration. Yet other aspects of the invention are directed to nanoscale wires that can be used as sensors, e.g., in such devices. Still other aspects of the invention are directed to systems and methods for making and using such devices, kits involving the same, and the like.
PCT/US2007/008540 2006-04-07 2007-04-06 Nanoscale wire methods and devices WO2007145701A2 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US79032206P 2006-04-07 2006-04-07
US60/790,322 2006-04-07

Publications (2)

Publication Number Publication Date
WO2007145701A2 WO2007145701A2 (en) 2007-12-21
WO2007145701A3 true WO2007145701A3 (en) 2008-05-29

Family

ID=38739359

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/US2007/008540 WO2007145701A2 (en) 2006-04-07 2007-04-06 Nanoscale wire methods and devices

Country Status (1)

Country Link
WO (1) WO2007145701A2 (en)

Families Citing this family (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP2298968A3 (en) 2000-08-22 2011-10-05 President and Fellows of Harvard College Method for growing nanowires
AU2002229046B2 (en) 2000-12-11 2006-05-18 President And Fellows Of Harvard College Nanosensors
JP2008523590A (en) 2004-12-06 2008-07-03 プレジデント・アンド・フェロウズ・オブ・ハーバード・カレッジ Nanoscale wire-based data storage device
US20100227382A1 (en) 2005-05-25 2010-09-09 President And Fellows Of Harvard College Nanoscale sensors
WO2006132659A2 (en) 2005-06-06 2006-12-14 President And Fellows Of Harvard College Nanowire heterostructures
WO2008033303A2 (en) 2006-09-11 2008-03-20 President And Fellows Of Harvard College Branched nanoscale wires
WO2008127314A1 (en) 2006-11-22 2008-10-23 President And Fellows Of Harvard College High-sensitivity nanoscale wire sensors
US7520951B1 (en) 2008-04-17 2009-04-21 International Business Machines (Ibm) Corporation Method of transferring nanoparticles to a surface
US7960653B2 (en) 2008-07-25 2011-06-14 Hewlett-Packard Development Company, L.P. Conductive nanowires for electrical interconnect
US8632873B2 (en) 2009-08-17 2014-01-21 Ramot At Tel-Aviv University Ltd. Aligned nanoarray and method for fabricating the same
WO2011038228A1 (en) 2009-09-24 2011-03-31 President And Fellows Of Harvard College Bent nanowires and related probing of species
CN102409462B (en) * 2011-08-31 2014-01-22 青岛大学 Method for printing disordered micro nanofibers into ordered fiber array
US9638717B2 (en) 2012-05-03 2017-05-02 President And Fellows Of Harvard College Nanoscale sensors for intracellular and other applications
WO2016069831A1 (en) 2014-10-30 2016-05-06 President And Fellows Of Harvard College Nanoscale wires with tip-localized junctions

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2001281965A (en) * 2000-03-31 2001-10-10 Ricoh Co Ltd Method for manufacturing contact type electrostatic charger, contact type electrostatic charger obtained by this method, electrostatic charging method and image recorder
EP1170799A2 (en) * 2000-07-04 2002-01-09 Infineon Technologies AG Electronic device and method of manufacture of an electronic device
US20040075464A1 (en) * 2002-07-08 2004-04-22 Btg International Limited Nanostructures and methods for manufacturing the same
US20060019472A1 (en) * 2004-04-30 2006-01-26 Nanosys, Inc. Systems and methods for nanowire growth and harvesting

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2001281965A (en) * 2000-03-31 2001-10-10 Ricoh Co Ltd Method for manufacturing contact type electrostatic charger, contact type electrostatic charger obtained by this method, electrostatic charging method and image recorder
EP1170799A2 (en) * 2000-07-04 2002-01-09 Infineon Technologies AG Electronic device and method of manufacture of an electronic device
US20040075464A1 (en) * 2002-07-08 2004-04-22 Btg International Limited Nanostructures and methods for manufacturing the same
US20060019472A1 (en) * 2004-04-30 2006-01-26 Nanosys, Inc. Systems and methods for nanowire growth and harvesting

Also Published As

Publication number Publication date
WO2007145701A2 (en) 2007-12-21

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