WO2008030802A3 - Method for fabricating high-speed thin-film transistors - Google Patents

Method for fabricating high-speed thin-film transistors Download PDF

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Publication number
WO2008030802A3
WO2008030802A3 PCT/US2007/077526 US2007077526W WO2008030802A3 WO 2008030802 A3 WO2008030802 A3 WO 2008030802A3 US 2007077526 W US2007077526 W US 2007077526W WO 2008030802 A3 WO2008030802 A3 WO 2008030802A3
Authority
WO
WIPO (PCT)
Prior art keywords
fabricating high
film transistors
speed thin
tfts
substrates
Prior art date
Application number
PCT/US2007/077526
Other languages
French (fr)
Other versions
WO2008030802A2 (en
Inventor
Zhenqiang Ma
Hao-Chih Yuan
Guogong Wang
Original Assignee
Wisconsin Alumni Res Found
Zhenqiang Ma
Hao-Chih Yuan
Guogong Wang
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Wisconsin Alumni Res Found, Zhenqiang Ma, Hao-Chih Yuan, Guogong Wang filed Critical Wisconsin Alumni Res Found
Publication of WO2008030802A2 publication Critical patent/WO2008030802A2/en
Publication of WO2008030802A3 publication Critical patent/WO2008030802A3/en

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/1259—Multistep manufacturing methods
    • H01L27/1262—Multistep manufacturing methods with a particular formation, treatment or coating of the substrate
    • H01L27/1266—Multistep manufacturing methods with a particular formation, treatment or coating of the substrate the substrate on which the devices are formed not being the final device substrate, e.g. using a temporary substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
    • H01L21/76251—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques
    • H01L21/76254—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques with separation/delamination along an ion implanted layer, e.g. Smart-cut, Unibond
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/49—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET
    • H01L29/4908—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET for thin film semiconductor, e.g. gate of TFT
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
    • H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409—Unipolar field-effect transistors
    • H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/66568—Lateral single gate silicon transistors
    • H01L29/66606—Lateral single gate silicon transistors with final source and drain contacts formation strictly before final or dummy gate formation, e.g. contact first technology
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
    • H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409—Unipolar field-effect transistors
    • H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/66742—Thin film unipolar transistors
    • H01L29/66772—Monocristalline silicon transistors on insulating substrates, e.g. quartz substrates
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/78603—Thin film transistors, i.e. transistors with a channel being at least partly a thin film characterised by the insulating substrate or support

Abstract

This invention provides methods for fabricating high speed TFTs from silicon-on-insulator and bulk single crystal semiconductor substrates, such as Si(100) and Si(110) substrates. The TFTs may be designed to have a maximum frequency of oscillation of 3 GHz, or better.
PCT/US2007/077526 2006-09-08 2007-09-04 Method for fabricating high-speed thin-film transistors WO2008030802A2 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US11/517,812 2006-09-08
US11/517,812 US7960218B2 (en) 2006-09-08 2006-09-08 Method for fabricating high-speed thin-film transistors

Publications (2)

Publication Number Publication Date
WO2008030802A2 WO2008030802A2 (en) 2008-03-13
WO2008030802A3 true WO2008030802A3 (en) 2008-05-08

Family

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Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/US2007/077526 WO2008030802A2 (en) 2006-09-08 2007-09-04 Method for fabricating high-speed thin-film transistors

Country Status (2)

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US (1) US7960218B2 (en)
WO (1) WO2008030802A2 (en)

Families Citing this family (41)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2011043163A1 (en) 2009-10-05 2011-04-14 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and manufacturing method thereof
KR101215305B1 (en) * 2009-10-15 2012-12-26 한국전자통신연구원 method for manufacturing semiconductor device
KR101928402B1 (en) 2009-10-30 2018-12-12 가부시키가이샤 한도오따이 에네루기 켄큐쇼 Semiconductor device and method for manufacturing the same
US8753917B2 (en) * 2010-12-14 2014-06-17 International Business Machines Corporation Method of fabricating photoconductor-on-active pixel device
US9812350B2 (en) 2013-03-06 2017-11-07 Qorvo Us, Inc. Method of manufacture for a silicon-on-plastic semiconductor device with interfacial adhesion layer
US9583414B2 (en) 2013-10-31 2017-02-28 Qorvo Us, Inc. Silicon-on-plastic semiconductor device and method of making the same
EP2996143B1 (en) 2014-09-12 2018-12-26 Qorvo US, Inc. Printed circuit module having semiconductor device with a polymer substrate and methods of manufacturing the same
US10085352B2 (en) 2014-10-01 2018-09-25 Qorvo Us, Inc. Method for manufacturing an integrated circuit package
US9530709B2 (en) 2014-11-03 2016-12-27 Qorvo Us, Inc. Methods of manufacturing a printed circuit module having a semiconductor device with a protective layer in place of a low-resistivity handle layer
US9613831B2 (en) 2015-03-25 2017-04-04 Qorvo Us, Inc. Encapsulated dies with enhanced thermal performance
US9960145B2 (en) 2015-03-25 2018-05-01 Qorvo Us, Inc. Flip chip module with enhanced properties
US20160343604A1 (en) 2015-05-22 2016-11-24 Rf Micro Devices, Inc. Substrate structure with embedded layer for post-processing silicon handle elimination
US10276495B2 (en) 2015-09-11 2019-04-30 Qorvo Us, Inc. Backside semiconductor die trimming
US10020405B2 (en) 2016-01-19 2018-07-10 Qorvo Us, Inc. Microelectronics package with integrated sensors
US10062583B2 (en) 2016-05-09 2018-08-28 Qorvo Us, Inc. Microelectronics package with inductive element and magnetically enhanced mold compound component
US10773952B2 (en) 2016-05-20 2020-09-15 Qorvo Us, Inc. Wafer-level package with enhanced performance
US10784149B2 (en) 2016-05-20 2020-09-22 Qorvo Us, Inc. Air-cavity module with enhanced device isolation
US10103080B2 (en) 2016-06-10 2018-10-16 Qorvo Us, Inc. Thermally enhanced semiconductor package with thermal additive and process for making the same
US10079196B2 (en) 2016-07-18 2018-09-18 Qorvo Us, Inc. Thermally enhanced semiconductor package having field effect transistors with back-gate feature
WO2018031999A1 (en) 2016-08-12 2018-02-15 Qorvo Us, Inc. Wafer-level package with enhanced performance
EP3497717A1 (en) 2016-08-12 2019-06-19 Qorvo Us, Inc. Wafer-level package with enhanced performance
SG11201901193UA (en) 2016-08-12 2019-03-28 Qorvo Us Inc Wafer-level package with enhanced performance
US10109502B2 (en) 2016-09-12 2018-10-23 Qorvo Us, Inc. Semiconductor package with reduced parasitic coupling effects and process for making the same
US10090339B2 (en) 2016-10-21 2018-10-02 Qorvo Us, Inc. Radio frequency (RF) switch
US10749518B2 (en) 2016-11-18 2020-08-18 Qorvo Us, Inc. Stacked field-effect transistor switch
US10068831B2 (en) 2016-12-09 2018-09-04 Qorvo Us, Inc. Thermally enhanced semiconductor package and process for making the same
US10777700B2 (en) * 2017-06-02 2020-09-15 Wisconsin Alumni Research Foundation Optoelectronic devices based on thin single-crystalline semiconductor films and non-epitaxial optical cavities
US10490471B2 (en) 2017-07-06 2019-11-26 Qorvo Us, Inc. Wafer-level packaging for enhanced performance
US10366972B2 (en) 2017-09-05 2019-07-30 Qorvo Us, Inc. Microelectronics package with self-aligned stacked-die assembly
US10784233B2 (en) 2017-09-05 2020-09-22 Qorvo Us, Inc. Microelectronics package with self-aligned stacked-die assembly
US11152363B2 (en) 2018-03-28 2021-10-19 Qorvo Us, Inc. Bulk CMOS devices with enhanced performance and methods of forming the same utilizing bulk CMOS process
US10804246B2 (en) 2018-06-11 2020-10-13 Qorvo Us, Inc. Microelectronics package with vertically stacked dies
US11069590B2 (en) 2018-10-10 2021-07-20 Qorvo Us, Inc. Wafer-level fan-out package with enhanced performance
US10964554B2 (en) 2018-10-10 2021-03-30 Qorvo Us, Inc. Wafer-level fan-out package with enhanced performance
US11646242B2 (en) 2018-11-29 2023-05-09 Qorvo Us, Inc. Thermally enhanced semiconductor package with at least one heat extractor and process for making the same
US11705428B2 (en) 2019-01-23 2023-07-18 Qorvo Us, Inc. RF devices with enhanced performance and methods of forming the same
EP3915134A1 (en) 2019-01-23 2021-12-01 Qorvo US, Inc. Rf semiconductor device and manufacturing method thereof
US20200235040A1 (en) 2019-01-23 2020-07-23 Qorvo Us, Inc. Rf devices with enhanced performance and methods of forming the same
US11387157B2 (en) 2019-01-23 2022-07-12 Qorvo Us, Inc. RF devices with enhanced performance and methods of forming the same
US11646289B2 (en) 2019-12-02 2023-05-09 Qorvo Us, Inc. RF devices with enhanced performance and methods of forming the same
US11923238B2 (en) 2019-12-12 2024-03-05 Qorvo Us, Inc. Method of forming RF devices with enhanced performance including attaching a wafer to a support carrier by a bonding technique without any polymer adhesive

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20030222334A1 (en) * 2002-05-30 2003-12-04 Canon Kabushiki Kaisha Display apparatus and producing method therefor
US6756324B1 (en) * 1997-03-25 2004-06-29 International Business Machines Corporation Low temperature processes for making electronic device structures
US20040217423A1 (en) * 2003-04-30 2004-11-04 Park Jong-Wan Flexible single-crystal film and method of manufacturing the same
US20050263774A1 (en) * 2004-05-25 2005-12-01 Samsung Electronics Co., Ltd Polycrystalline Si thin film structure and fabrication method thereof and method of fabricating TFT using the same

Family Cites Families (40)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6130059A (en) 1984-07-20 1986-02-12 Nec Corp Manufacture of semiconductor device
JPS63308386A (en) 1987-01-30 1988-12-15 Sony Corp Semiconductor device and manufacture thereof
US4846931A (en) 1988-03-29 1989-07-11 Bell Communications Research, Inc. Method for lifting-off epitaxial films
US4883561A (en) 1988-03-29 1989-11-28 Bell Communications Research, Inc. Lift-off and subsequent bonding of epitaxial films
JPH0334456A (en) 1989-06-30 1991-02-14 Nippon Steel Corp Pin diode, manufacture thereof and contact image sensor
JPH0344067A (en) 1989-07-11 1991-02-25 Nec Corp Laminating method of semiconductor substrate
US5073230A (en) 1990-04-17 1991-12-17 Arizona Board Of Regents Acting On Behalf Of Arizona State University Means and methods of lifting and relocating an epitaxial device layer
US5206749A (en) 1990-12-31 1993-04-27 Kopin Corporation Liquid crystal display having essentially single crystal transistors pixels and driving circuits
US5528397A (en) 1991-12-03 1996-06-18 Kopin Corporation Single crystal silicon transistors for display panels
KR930006732B1 (en) 1991-05-08 1993-07-23 재단법인 한국전자통신연구소 Semiconductor substrate having the structure assembly varied and method of the same
US5465009A (en) 1992-04-08 1995-11-07 Georgia Tech Research Corporation Processes and apparatus for lift-off and bonding of materials and devices
JPH06252400A (en) 1992-12-28 1994-09-09 Sony Corp Fabrication of lateral insulated gate type field effect transistor
US5344517A (en) 1993-04-22 1994-09-06 Bandgap Technology Corporation Method for lift-off of epitaxial layers and applications thereof
US5461243A (en) 1993-10-29 1995-10-24 International Business Machines Corporation Substrate for tensilely strained semiconductor
US6054734A (en) 1996-07-26 2000-04-25 Sony Corporation Non-volatile memory cell having dual gate electrodes
US5906951A (en) 1997-04-30 1999-05-25 International Business Machines Corporation Strained Si/SiGe layers on insulator
EP0923792B1 (en) 1997-05-16 2007-02-07 Koninklijke Philips Electronics N.V. Silicon germanium semiconductor device and a method of manufacturing the same
US6018187A (en) 1998-10-19 2000-01-25 Hewlett-Packard Cmpany Elevated pin diode active pixel sensor including a unique interconnection structure
EP1212787B1 (en) 1999-08-10 2014-10-08 Silicon Genesis Corporation A cleaving process to fabricate multilayered substrates using low implantation doses
US6214733B1 (en) 1999-11-17 2001-04-10 Elo Technologies, Inc. Process for lift off and handling of thin film materials
US6602613B1 (en) 2000-01-20 2003-08-05 Amberwave Systems Corporation Heterointegration of materials using deposition and bonding
JP2004507084A (en) 2000-08-16 2004-03-04 マサチューセッツ　インスティテュート　オブ　テクノロジー Manufacturing process of semiconductor products using graded epitaxial growth
US6831263B2 (en) 2002-06-04 2004-12-14 Intel Corporation Very high speed photodetector system using a PIN photodiode array for position sensing
US6774010B2 (en) 2001-01-25 2004-08-10 International Business Machines Corporation Transferable device-containing layer for silicon-on-insulator applications
US6410371B1 (en) 2001-02-26 2002-06-25 Advanced Micro Devices, Inc. Method of fabrication of semiconductor-on-insulator (SOI) wafer having a Si/SiGe/Si active layer
US6603156B2 (en) 2001-03-31 2003-08-05 International Business Machines Corporation Strained silicon on insulator structures
WO2002082514A1 (en) 2001-04-04 2002-10-17 Massachusetts Institute Of Technology A method for semiconductor device fabrication
WO2003045837A2 (en) 2001-11-26 2003-06-05 Wisconsin Alumni Research Foundation Stress control of semiconductor microstructures for thin film growth
US6809358B2 (en) 2002-02-05 2004-10-26 E-Phocus, Inc. Photoconductor on active pixel image sensor
AU2002368035A1 (en) 2002-06-19 2004-01-06 Massachusetts Institute Of Technology Ge photodetectors
WO2004054001A2 (en) 2002-12-09 2004-06-24 Quantum Semiconductor Llc Cmos image sensor
US20040146138A1 (en) * 2003-01-23 2004-07-29 Motorola, Inc. Large flat panel gallium arsenide arrays on silicon substrate for low dose X-ray digital imaging
US7812340B2 (en) 2003-06-13 2010-10-12 International Business Machines Corporation Strained-silicon-on-insulator single-and double-gate MOSFET and method for forming the same
WO2005024908A2 (en) 2003-09-05 2005-03-17 Si2 Technologies, Inc. Laser transfer articles and method of making
US20050082526A1 (en) 2003-10-15 2005-04-21 International Business Machines Corporation Techniques for layer transfer processing
JP2005150686A (en) 2003-10-22 2005-06-09 Sharp Corp Semiconductor device and its manufacturing method
US7138697B2 (en) 2004-02-24 2006-11-21 International Business Machines Corporation Structure for and method of fabricating a high-speed CMOS-compatible Ge-on-insulator photodetector
KR101260981B1 (en) 2004-06-04 2013-05-10 더 보오드 오브 트러스티스 오브 더 유니버시티 오브 일리노이즈 Methods and devices for fabricating and assembling printable semiconductor elements
US7229901B2 (en) 2004-12-16 2007-06-12 Wisconsin Alumni Research Foundation Fabrication of strained heterojunction structures
US7354809B2 (en) 2006-02-13 2008-04-08 Wisconsin Alumi Research Foundation Method for double-sided processing of thin film transistors

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6756324B1 (en) * 1997-03-25 2004-06-29 International Business Machines Corporation Low temperature processes for making electronic device structures
US20030222334A1 (en) * 2002-05-30 2003-12-04 Canon Kabushiki Kaisha Display apparatus and producing method therefor
US20040217423A1 (en) * 2003-04-30 2004-11-04 Park Jong-Wan Flexible single-crystal film and method of manufacturing the same
US20050263774A1 (en) * 2004-05-25 2005-12-01 Samsung Electronics Co., Ltd Polycrystalline Si thin film structure and fabrication method thereof and method of fabricating TFT using the same

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US7960218B2 (en) 2011-06-14
US20100078722A1 (en) 2010-04-01
WO2008030802A2 (en) 2008-03-13

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