WO2008053281A1

WO2008053281A1 - Improvements in or relating to the identification and management of defects in a process

Info

Publication number: WO2008053281A1
Application number: PCT/IB2006/054691
Authority: WO
Inventors: Hai T. Nguyen; Onder S Anilturk; Vincent Charbois; David G. Kolar
Original assignee: Freescale Semiconductor, Inc.
Priority date: 2006-10-30
Filing date: 2006-10-30
Publication date: 2008-05-08

Abstract

A method of detecting defects in a process for production of a product, the method comprising the steps of : determining one or more parameters to determine the existence of any defects in a product at a point in the process; storing in a database the details of the or each defect, the product, the point in the process and the one or more parameters associated with the defect; determining an event which indicates that the one or more parameters are above a predetermined threshold level; searching the database to identify previous events or defects which are similar to the determined defect and event; determining the response to the previous events and defects and using this to determine the response to the determined defect and event; updating the database with the response to the determined defect and event.

Description

Title : Improvements in or relating to the identification and management of defects in a process

Description

Field of the invention

The present invention relates to improvement in or relating to the identification and management of defects in a process, particularly but not exclusively in the domain of semiconductor circuit manufacturing processes.

Background of the invention In all processes there are problems which occur and which result in defects with the resultant product or subsequent process. The resulting defects give rise to what is known as a defect level. This is a measure of the relative defects for similar products and/or processes.

The defect level on a semiconductor wafer (of example) is usually measured in terms of Defect Density. In other words, the number of defects per unit surface area. Defects on a wafer may also be sorted into different Defect Classes based on the defect characteristics. These may include size, location of the defect on the chip, aspect of the defect on the chip etc. This sorting of the defects is carried out automatically by an inspection tool, which will be specific for the relevant environment.

Generally the defects can be in two main categories of Defect Class, although there may be many sub-classes. The main defect classes are Killer Defect Classes which would result in the final product being non-functional and Non Killer Defect Classes which may result in some quality or other issues but would not impact the functionality of the product.

The information relating to Defect Density and Defect Classes is generally available in a defect database that may be part of commercial available defect analysis tools.

Figure 1 shows a prior art process flow chart and diagram. A "lot in" of wafers 100 is being tested at test location 102. The wafers that pass the test are passed to "lot out" 104 for either further processing or if they are at the end of the process for sale, use or whatever. At the test location a test is carried out for a specific defect. The defect density is compared with a statistically computed control limit which is stored in the FAB database 106 for lot in and lot out. When the lot or wafer is tested the defect data is determined. This defect data is then stored in the defect database 108. If an Out Of Control (OOC) event is identified the defect engineers will query the database to attempt to analysis the situation and find the solution. If they are successful a solution will be implemented earlier in the process.

A number of problems which exist with this type of system mean that there is often a very slow reaction to defects and the rectification thereof. The limited amount of data stored is not helpful in understanding the priorities of the defects and which should be addressed first. In addition there is generally no knowledge of previous events, except for those based on the experience of the testers. Thus if the tester is inexperienced errors in the management of defects can easily occur. In addition, the delays in finding the cause for a particular defect can mean longer cycle time of the out of control lot. Therefore, missed opportunity to react faster to OCAP (Out of Control Action Plan) events, which result in reduced yields of the line due to misprocess of large number of lots in a particular equipment and/or process. On object of the present invention is to find a solution to the problems associated with the prior art.

Summary of the invention

According to one aspect of the present invention there is provided a system and method as defined in the appended claims.

Brief description of the drawings

Figure 1 is a diagram showing the prior art system for defect analysis and solution finding;

Figure 2 is a block diagram incorporating method steps of a process for analysis and solution determination for defects in accordance with one embodiment of the present invention; Figure 3 is a flow diagram of a process according to one embodiment of the present invention.

Detailed description of the preferred embodiments According to Figure 2 a process flow chart and diagram in accordance with an embodiment of the present invention is shown. A "lot in" of wafers 200 is being tested at test location 202. The wafers that pass the test are passed to "lot out" 204 for either further processing or if they are at the end of the process for sale, use or whatever. At the test location a test is carried out for a specific defect. The defect density is compared with a statistically computed control limit which is stored in the FAB database 206 for lot in and lot out. In addition this data is also stored in the excursion follow up database 208. The data stored for each defect test is more detailed than in the prior art and will be set out in more detail below. In addition to the data for each defect test there is further data stored in association with this in the event of an Out Of Control (OOC).

If an OOC event is identified a report is formed which includes all the defect details of the wafer that lead to the OOC event coming into existence. An OOC event is an event which reaches a point where the defect density or class is above a certain critical level. Above this critical level the resulting products will be below standard, faulty or non functional. The details included in the report will depend on the process and product but will include all available information related to the defect, wafer and OOC event. The OOC report 210 will be stored in an OOC reports database 212. Any OOC event is also communicated with anyone who has indicated an interest in that type of event 214. This means that people or machines associated with a process will know that an OOC event has occurred and the details of wafer defects associated therewith. This can help to solve long existing problems and either ameliorate or correct defects or OOC events.

The combination of information stored goes a long way beyond that stored in prior art systems, this immediately give substantial advantages. However above that there are still further advantages in the fact that the information is generated from what would previously have been unrelated events. That is to say the association of the OOC with wafer defect data means that each element may be used to solve problems with the other. If an OOC event occurs it can be may be tracked back to a specific defect at a point in the process before the OOC event. Without the association of OOC events and defect this would not be possible. It is also important that data is entered in a specific form as this then ensures that all relevant details are captured, to again improve the ability to find links with an OOC event and other earlier events or defects. The manner in which that data is stored is also important in future parts of the process. Once an OOC event has been identified and solved details are entered in the casebook, which may be in the form of a database. The data stored is used to create three control parameters that indicate if the processing, of for example the wafers, is in or out of control and if it is out of control, how severe the problem is. The first two control criteria are used to tell if a wafer is in control (i.e. is within the baseline defect level usually observed for that part of the process) or out of control (i.e. has more defects than the standard population of products or wafers). In this way the following are determined: the total defect density: which the defect density that takes into account all the defects whatever the defect class; the killer defect density: which is the defect density of killer defects.

This distinction between killer and non-killer defects is inferred from statistical correlations between level of defect and functional yield levels on a population of wafers. By separating out these two types of defect, priorities can be given to solve the bigger problems first.

The control limits (or the limit above which a wafer is Out Of Control i.e. an OOC event) are inferred from statistical analysis of the population of inspected wafers (for example: the mean value and standard deviation of the control criteria over a given period of time). Since a record is kept of all the past measurements, it is possible to track the evolution of the statistical characteristics of any control parameter to thus adjust the control limits as often as needed to reflect any major evolution of the standard population. In the case of an OOC event (i.e. if the value of a control parameter for the wafer inspected is above the control limit for that parameter) the percentage of die affected by killer defects (PDA) is determined. The PDA is the third control parameter identified above. The PDA is used to highlight the most critical problems and prioritize their analysis. The PDA is an extra criteria that can also be used to determine whether or not to scrap an out of control wafer (i.e. stop processing the wafer and destroy it). Indeed, the PDA directly correlates with the wafer yield, which is the ratio between the number of functional chips to the total number of chips on the wafer. Above a given predetermined level of yield impact during wafer manufacturing, it is generally more cost effective to scrap a wafer than to continue processing it. The present invention allows the ability to have inline scrap criteria which thus helps drive down wafer costs. This is particularly true for defects that are impacting wafers in the early stages of chip manufacturing. Referring now to figure 3 a flow chart of the process is now described. A new lot is inspected (300) and details of any defects are processed through the defect database 302 and then the excursion-follow-up database 304. At step 306 a determination is made as to whether the lot is OOC. If yes, a determination as to whether a report exists is made (308). If there is no report a new report is created 310 and then stored in the OOC report database 312. The report is then stored in the casebook 314 as a new entry. The report may be updated from time to time by analyses that occur 314. If the analysis identifies that the issue is a known issue 316 then the entry from the casebook is fed back to the OOC report and identified as a link with the current OOC event. In this way the coincidences with previous OOC events and defects can be determined for a discovered OOC event. Also as required from time to time the report may be updated and added to the casebook as a new entry 318.

The methodology is may be implemented in software that provides users with OCAP-type guidelines, systematic excursion follow-up and knowledge storage and re-use capabilities. Any generated information can be shared with process workshops and integration teams in the field of semiconductors.

Using the methodology described above has a number of advantages. In particular, the systematic treatment of issues and the capability to re-use knowledge allows much faster reaction time to in line defect issues. As a consequence, OOC lots stay on hold for less time and problem root causes are identified more quickly. Given the number of defect inspections steps throughout the production flow, the overall FAB cycle time is greatly improved. In addition, excursions are caught and treated more accurately. If an excursion occurs early in the process the lot is scrapped before time is wasted on later stages in the process. Since problems are solved faster, less material wasted by major defect issues, which means overall yield is increased.

It will be appreciated that the details of the present invention are shown only by way of example and that other features may fall within the scope of the present invention. For example the methodology could apply to other technical areas than semiconductors where a defect analysis is carried out. In addition, the various databases described herein may in fact be one database or any other form of storage that is easily accessible and searchable. The exact steps and tests will be dependant on the environment, the process and the tests.

Claims

1. A method of detecting defects in a process for production of a product (100, 104, 300), the method comprising the steps of:

- determining one or more parameters to determine the existence of any defects in a product at a point in the process (102);

- storing in a database (302, 108) the details of the or each defect, the product, the point in the process and the one or more parameters associated with the defect;

- determining an event which indicates that the one or more parameters are above a predetermined threshold level (304);

- searching the database to identify previous events or defects (308, 316) which are similar to the determined defect and event;

- determining the response to the previous events and defects and using this to determine the response to the determined defect and event;

- updating the database with the response to the determined defect and event (314, 318).

2. The method of claim 1 , wherein the step of determining the one or more parameters comprises determining the type of defect to enable handling of the defects in order of a predetermined priority.

3. The method of claim 2 wherein the step of determining the type of defect comprises determining whether a defect is fatal or not.

4. The method of any preceding claim, wherein the step of determining the one or more parameters comprises determining the defect density of the or each defect in one or more products.

5. The method of any preceding claim, wherein the step of identifying an event comprises determining a number of instances of the same parameter in different products or points in the process.

6. The method of any preceding claim for use in a semiconductor chip production process

7. Apparatus for detecting defects in a process for production of a product (100, 104, 300), the system comprising:

- a test station (102, 202) for determining one or more parameters relating to one or more defects in a product at a point in the process;

- a database (302) for storing the details of the or each defect, the product, the point in the process and the one or more parameters associated with the defect and any updates thereto;

- a monitor (306) for determining an event which indicates that the one or more parameters are above a predetermined threshold level;

- a search engine (306, 308, 316) for searching the database to identify previous events or defects which are similar to the determined defect and event and determining the response to the previous events and defects and using this to determine the response to the determined defect and event and for updating the database with the response to the determined defect and event (314, 318).

8. The apparatus of claim 7, wherein the test station determines the type of defect to enable handling of the defects in order of a predetermined priority of response.

9. The apparatus of claim 8 wherein the type of defect comprises a fatal defect or a non-fatal defect.

10. The apparatus of any of claims 7 to 9, wherein the one or more parameters comprise the defect density of the or each defect in one or more products.

11. The apparatus of any of claims 7 to 10, wherein the monitor determines a number of instances of the same parameter in different products or points in the process.