WO2008060543A3 - P-i-n diode crystallized adjacent to a silicide in series with a dielectric antifuse and methods of forming the same - Google Patents
P-i-n diode crystallized adjacent to a silicide in series with a dielectric antifuse and methods of forming the same Download PDFInfo
- Publication number
- WO2008060543A3 WO2008060543A3 PCT/US2007/023855 US2007023855W WO2008060543A3 WO 2008060543 A3 WO2008060543 A3 WO 2008060543A3 US 2007023855 W US2007023855 W US 2007023855W WO 2008060543 A3 WO2008060543 A3 WO 2008060543A3
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- dielectric
- forming
- diode
- silicide
- series
- Prior art date
Links
- 238000000034 method Methods 0.000 title abstract 2
- 229910021332 silicide Inorganic materials 0.000 title 1
- FVBUAEGBCNSCDD-UHFFFAOYSA-N silicide(4-) Chemical compound [Si-4] FVBUAEGBCNSCDD-UHFFFAOYSA-N 0.000 title 1
- 239000000463 material Substances 0.000 abstract 3
- 206010010144 Completed suicide Diseases 0.000 abstract 1
- 238000000231 atomic layer deposition Methods 0.000 abstract 1
- 230000007547 defect Effects 0.000 abstract 1
- 239000004065 semiconductor Substances 0.000 abstract 1
- 239000000758 substrate Substances 0.000 abstract 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body
- H01L27/10—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration
- H01L27/102—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration including bipolar components
- H01L27/1021—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration including bipolar components including diodes only
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/86—Types of semiconductor device ; Multistep manufacturing processes therefor controllable only by variation of the electric current supplied, or only the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched
- H01L29/861—Diodes
- H01L29/868—PIN diodes
Abstract
Priority Applications (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2009537188A JP2010510656A (en) | 2006-11-15 | 2007-11-13 | P-IN diode crystallized adjacent to silicide in series with dielectric antifuse and method of forming the same |
EP07840040A EP2092562A2 (en) | 2006-11-15 | 2007-11-13 | P-i-n diode crystallized adjacent to a silicide in series with a dielectric antifuse and methods of forming the same |
CN200780042606XA CN101553925B (en) | 2006-11-15 | 2007-11-13 | P-I-N diode crystallized adjacent to silicide in series with a dielectric antifuse and methods of forming the same |
Applications Claiming Priority (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US11/560,289 US8018024B2 (en) | 2003-12-03 | 2006-11-15 | P-i-n diode crystallized adjacent to a silicide in series with a dielectric antifuse |
US11/560,289 | 2006-11-15 | ||
US11/560,283 US7682920B2 (en) | 2003-12-03 | 2006-11-15 | Method for making a p-i-n diode crystallized adjacent to a silicide in series with a dielectric antifuse |
US11/560,283 | 2006-11-15 |
Publications (2)
Publication Number | Publication Date |
---|---|
WO2008060543A2 WO2008060543A2 (en) | 2008-05-22 |
WO2008060543A3 true WO2008060543A3 (en) | 2008-07-24 |
Family
ID=39301054
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/US2007/023855 WO2008060543A2 (en) | 2006-11-15 | 2007-11-13 | P-i-n diode crystallized adjacent to a silicide in series with a dielectric antifuse and methods of forming the same |
Country Status (4)
Country | Link |
---|---|
EP (1) | EP2092562A2 (en) |
KR (1) | KR20090089320A (en) |
CN (1) | CN101553925B (en) |
WO (1) | WO2008060543A2 (en) |
Families Citing this family (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP5191803B2 (en) * | 2008-05-29 | 2013-05-08 | 株式会社東芝 | Method for manufacturing nonvolatile memory device |
KR20100001260A (en) * | 2008-06-26 | 2010-01-06 | 삼성전자주식회사 | Non-volatile memory device and method of fabricating the same |
JP5702725B2 (en) * | 2008-10-08 | 2015-04-15 | ザ・リージェンツ・オブ・ザ・ユニバーシティ・オブ・ミシガンThe Regents Of The University Of Michigan | Silicon-based nanoscale resistor with adjustable resistance |
JP2012506621A (en) * | 2008-10-20 | 2012-03-15 | ザ・リージェンツ・オブ・ザ・ユニバーシティ・オブ・ミシガン | Silicon nanoscale crossbar memory |
CN102315115A (en) * | 2010-06-30 | 2012-01-11 | 中国科学院微电子研究所 | Dry-process etching method for HfSiAlON high-K dielectric |
KR20120077505A (en) * | 2010-12-30 | 2012-07-10 | 삼성전자주식회사 | Nonvolatile semiconductor memory device and the method of fabricating the same |
CN103367159B (en) * | 2012-04-09 | 2016-06-29 | 中芯国际集成电路制造(上海)有限公司 | The forming method of semiconductor structure |
Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5521423A (en) * | 1993-04-19 | 1996-05-28 | Kawasaki Steel Corporation | Dielectric structure for anti-fuse programming element |
US20050121742A1 (en) * | 2003-12-03 | 2005-06-09 | Matrix Semiconductor, Inc | Semiconductor device including junction diode contacting contact-antifuse unit comprising silicide |
US20060199361A1 (en) * | 2004-10-21 | 2006-09-07 | Chia-Hua Ho | Manufacturing method of one-time programmable read only memory |
US20060250837A1 (en) * | 2005-05-09 | 2006-11-09 | Sandisk 3D, Llc | Nonvolatile memory cell comprising a diode and a resistance-switching material |
WO2007005273A1 (en) * | 2005-07-01 | 2007-01-11 | Sandisk 3D Llc | Memory cell with high-k antifuse for reverse bias programming |
US20070069217A1 (en) * | 2003-12-03 | 2007-03-29 | Herner S B | P-i-n diode crystallized adjacent to a silicide in series with a dielectric anitfuse |
Family Cites Families (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US8637366B2 (en) * | 2002-12-19 | 2014-01-28 | Sandisk 3D Llc | Nonvolatile memory cell without a dielectric antifuse having high- and low-impedance states |
US20050226067A1 (en) * | 2002-12-19 | 2005-10-13 | Matrix Semiconductor, Inc. | Nonvolatile memory cell operating by increasing order in polycrystalline semiconductor material |
US20060250836A1 (en) * | 2005-05-09 | 2006-11-09 | Matrix Semiconductor, Inc. | Rewriteable memory cell comprising a diode and a resistance-switching material |
-
2007
- 2007-11-13 CN CN200780042606XA patent/CN101553925B/en active Active
- 2007-11-13 WO PCT/US2007/023855 patent/WO2008060543A2/en active Application Filing
- 2007-11-13 EP EP07840040A patent/EP2092562A2/en not_active Withdrawn
- 2007-11-13 KR KR1020097009978A patent/KR20090089320A/en not_active Application Discontinuation
Patent Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5521423A (en) * | 1993-04-19 | 1996-05-28 | Kawasaki Steel Corporation | Dielectric structure for anti-fuse programming element |
US20050121742A1 (en) * | 2003-12-03 | 2005-06-09 | Matrix Semiconductor, Inc | Semiconductor device including junction diode contacting contact-antifuse unit comprising silicide |
US20070069217A1 (en) * | 2003-12-03 | 2007-03-29 | Herner S B | P-i-n diode crystallized adjacent to a silicide in series with a dielectric anitfuse |
US20060199361A1 (en) * | 2004-10-21 | 2006-09-07 | Chia-Hua Ho | Manufacturing method of one-time programmable read only memory |
US20060250837A1 (en) * | 2005-05-09 | 2006-11-09 | Sandisk 3D, Llc | Nonvolatile memory cell comprising a diode and a resistance-switching material |
WO2007005273A1 (en) * | 2005-07-01 | 2007-01-11 | Sandisk 3D Llc | Memory cell with high-k antifuse for reverse bias programming |
Also Published As
Publication number | Publication date |
---|---|
KR20090089320A (en) | 2009-08-21 |
EP2092562A2 (en) | 2009-08-26 |
WO2008060543A2 (en) | 2008-05-22 |
CN101553925A (en) | 2009-10-07 |
CN101553925B (en) | 2013-08-14 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
WO2008060543A3 (en) | P-i-n diode crystallized adjacent to a silicide in series with a dielectric antifuse and methods of forming the same | |
US10043567B2 (en) | Multilevel ferroelectric memory cell for an integrated circuit | |
US9620710B2 (en) | Self-selecting PCM device not requiring a dedicated selector transistor | |
CN105981177B (en) | Field effect transistor construction and memory array | |
US9076964B2 (en) | Methods for forming resistance random access memory structure | |
US20070173019A1 (en) | Programmable Resistive Ram and Manufacturing Method | |
US20100213458A1 (en) | Rigid semiconductor memory having amorphous metal oxide semiconductor channels | |
TW200705449A (en) | Nonvolatile memory cell operating by increasing order in polycrystalline semiconductor material | |
WO2009045920A3 (en) | Vertical diode based memory cells having a lowered programming voltage and methods of forming the same | |
TWI686931B (en) | Three dimensional memory arrays and methods of forming the same | |
WO2008122012A3 (en) | Integrated non-volatile memory and peripheral circuitry fabrication | |
WO2009005706A3 (en) | Method to form a rewriteable memory cell comprising a diode and a resistivity-switching grown oxide | |
US11705500B2 (en) | Assemblies having conductive structures with three or more different materials | |
US9001555B2 (en) | Small-grain three-dimensional memory | |
US9627442B2 (en) | Horizontally oriented and vertically stacked memory cells | |
JP2005536052A (en) | Contact improvement method and apparatus for programmable devices | |
TW200504938A (en) | Method for forming non-volatile memory cell and non-volatile memory array including such memory cells | |
TW200641900A (en) | Anti-fuse one-time-programmable nonvolatile memory cell and fabricating and programming method thereof | |
US20070221983A1 (en) | Dual gate memory with fast erase | |
KR20210099537A (en) | semiconductor memory device and method for fabricating the same | |
US10490740B2 (en) | Non-volatile memory system with reliability enhancement mechanism and method of manufacture thereof | |
CN101364633A (en) | Phase changing memory element and manufacturing method therefor | |
US8846512B2 (en) | Incorporating impurities using a mask | |
Herner | Application of Thin Films in Semiconductor Memories | |
US20050098808A1 (en) | Electronic deivce and method for its fabrication |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
WWE | Wipo information: entry into national phase |
Ref document number: 200780042606.X Country of ref document: CN |
|
121 | Ep: the epo has been informed by wipo that ep was designated in this application |
Ref document number: 07840040 Country of ref document: EP Kind code of ref document: A2 |
|
WWE | Wipo information: entry into national phase |
Ref document number: 2007840040 Country of ref document: EP |
|
ENP | Entry into the national phase |
Ref document number: 2009537188 Country of ref document: JP Kind code of ref document: A |
|
WWE | Wipo information: entry into national phase |
Ref document number: 1020097009978 Country of ref document: KR |
|
NENP | Non-entry into the national phase |
Ref country code: DE |