WO2008060948A3 - Method and system for parallelization of pipelined computations - Google Patents

Method and system for parallelization of pipelined computations Download PDF

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Publication number
WO2008060948A3
WO2008060948A3 PCT/US2007/084113 US2007084113W WO2008060948A3 WO 2008060948 A3 WO2008060948 A3 WO 2008060948A3 US 2007084113 W US2007084113 W US 2007084113W WO 2008060948 A3 WO2008060948 A3 WO 2008060948A3
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WO
WIPO (PCT)
Prior art keywords
team
work
parallelization
gang
partitioning
Prior art date
Application number
PCT/US2007/084113
Other languages
French (fr)
Other versions
WO2008060948A2 (en
Inventor
Vladimir Kotlyar
Mayan Moudgill
Yuriy M Pogudin
Original Assignee
Sandbridge Technologies Inc
Vladimir Kotlyar
Mayan Moudgill
Yuriy M Pogudin
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sandbridge Technologies Inc, Vladimir Kotlyar, Mayan Moudgill, Yuriy M Pogudin filed Critical Sandbridge Technologies Inc
Priority to EP07864131A priority Critical patent/EP2080104A4/en
Priority to US12/513,838 priority patent/US9110726B2/en
Publication of WO2008060948A2 publication Critical patent/WO2008060948A2/en
Publication of WO2008060948A3 publication Critical patent/WO2008060948A3/en

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46Multiprogramming arrangements
    • G06F9/50Allocation of resources, e.g. of the central processing unit [CPU]
    • G06F9/5061Partitioning or combining of resources
    • G06F9/5066Algorithms for mapping a plurality of inter-dependent sub-tasks onto a plurality of physical CPUs
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003Arrangements for executing specific machine instructions
    • G06F9/30076Arrangements for executing specific machine instructions to perform miscellaneous control operations, e.g. NOP
    • G06F9/30079Pipeline control instructions, e.g. multicycle NOP
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38Concurrent instruction execution, e.g. pipeline, look ahead
    • G06F9/3885Concurrent instruction execution, e.g. pipeline, look ahead using a plurality of independent parallel functional units
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46Multiprogramming arrangements
    • G06F9/50Allocation of resources, e.g. of the central processing unit [CPU]
    • G06F9/5005Allocation of resources, e.g. of the central processing unit [CPU] to service a request
    • G06F9/5027Allocation of resources, e.g. of the central processing unit [CPU] to service a request the resource being a machine, e.g. CPUs, Servers, Terminals
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38Concurrent instruction execution, e.g. pipeline, look ahead
    • G06F9/3824Operand accessing
    • G06F9/3826Bypassing or forwarding of data results, e.g. locally between pipeline stages or within a pipeline stage

Landscapes

  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Multi Processors (AREA)
  • Advance Control (AREA)

Abstract

A method of parallelizing a pipeline includes stages operable on a sequence of work items. The method includes allocating an amount of work for each work item, assigning at least one stage to each work item, partitioning the at least one stage into at least one team, partitioning the at least one team into at least one gang, and assigning the at least one team and the at least one gang to at least one processor. Processors, gangs, and teams are juxtaposed near one another to minimize communication losses.
PCT/US2007/084113 2006-11-10 2007-11-08 Method and system for parallelization of pipelined computations WO2008060948A2 (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
EP07864131A EP2080104A4 (en) 2006-11-10 2007-11-08 Method and system for parallelization of pipelined computations
US12/513,838 US9110726B2 (en) 2006-11-10 2007-11-08 Method and system for parallelization of pipelined computations

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US86525306P 2006-11-10 2006-11-10
US60/865,253 2006-11-10

Publications (2)

Publication Number Publication Date
WO2008060948A2 WO2008060948A2 (en) 2008-05-22
WO2008060948A3 true WO2008060948A3 (en) 2008-07-24

Family

ID=39402397

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/US2007/084113 WO2008060948A2 (en) 2006-11-10 2007-11-08 Method and system for parallelization of pipelined computations

Country Status (4)

Country Link
US (1) US9110726B2 (en)
EP (1) EP2080104A4 (en)
KR (1) KR101545357B1 (en)
WO (1) WO2008060948A2 (en)

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US8074051B2 (en) * 2004-04-07 2011-12-06 Aspen Acquisition Corporation Multithreaded processor with multiple concurrent pipelines per thread
EP2210171A1 (en) * 2007-11-05 2010-07-28 Sandbridge Technologies, Inc. Method of encoding register instruction fields
EP2250539A1 (en) * 2008-01-30 2010-11-17 Sandbridge Technologies, Inc. Method for enabling multi-processor synchronization
KR20100133964A (en) * 2008-03-13 2010-12-22 아스펜 액퀴지션 코포레이션 Method for achieving power savings by disabling a valid array
JP2011530744A (en) 2008-08-06 2011-12-22 アスペン・アクイジション・コーポレーション Stoppable and restartable DMA engine
EP2282264A1 (en) * 2009-07-24 2011-02-09 ProximusDA GmbH Scheduling and communication in computing systems
KR101640848B1 (en) * 2009-12-28 2016-07-29 삼성전자주식회사 Job Allocation Method on Multi-core System and Apparatus thereof
KR101658792B1 (en) * 2010-01-06 2016-09-26 삼성전자주식회사 Computing system and method
US8695009B2 (en) * 2011-04-18 2014-04-08 Microsoft Corporation Allocating tasks to machines in computing clusters
US9817700B2 (en) 2011-04-26 2017-11-14 International Business Machines Corporation Dynamic data partitioning for optimal resource utilization in a parallel data processing system
RU2012127578A (en) * 2012-07-02 2014-01-10 ЭлЭсАй Корпорейшн ANALYZER OF APPLICABILITY OF THE SOFTWARE MODULE FOR THE DEVELOPMENT AND TESTING OF THE SOFTWARE FOR MULTIPROCESSOR MEDIA
CN105988952B (en) * 2015-02-28 2019-03-08 华为技术有限公司 The method and apparatus for distributing hardware-accelerated instruction for Memory Controller Hub
US10776846B2 (en) * 2016-07-27 2020-09-15 Nike, Inc. Assortment optimization

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US20040186846A1 (en) * 1999-09-28 2004-09-23 Birdwell John D. Method of partitioning data records
US20060174236A1 (en) * 2005-01-28 2006-08-03 Yosef Stein Method and apparatus for accelerating processing of a non-sequential instruction stream on a processor with multiple compute units

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US6115761A (en) * 1997-05-30 2000-09-05 Lsi Logic Corporation First-In-First-Out (FIFO) memories having dual descriptors and credit passing for efficient access in a multi-processor system environment
US7139899B2 (en) * 1999-09-03 2006-11-21 Cisco Technology, Inc. Selected register decode values for pipeline stage register addressing
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US6990557B2 (en) 2002-06-04 2006-01-24 Sandbridge Technologies, Inc. Method and apparatus for multithreaded cache with cache eviction based on thread identifier
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US20060174236A1 (en) * 2005-01-28 2006-08-03 Yosef Stein Method and apparatus for accelerating processing of a non-sequential instruction stream on a processor with multiple compute units

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See also references of EP2080104A4 *

Also Published As

Publication number Publication date
US20100115527A1 (en) 2010-05-06
EP2080104A4 (en) 2010-01-06
KR101545357B1 (en) 2015-08-18
US9110726B2 (en) 2015-08-18
KR20090089327A (en) 2009-08-21
EP2080104A2 (en) 2009-07-22
WO2008060948A2 (en) 2008-05-22

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