WO2008075351A3 - Soft decoding of hard and soft bits read from a flash memory - Google Patents

Soft decoding of hard and soft bits read from a flash memory Download PDF

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Publication number
WO2008075351A3
WO2008075351A3 PCT/IL2007/001565 IL2007001565W WO2008075351A3 WO 2008075351 A3 WO2008075351 A3 WO 2008075351A3 IL 2007001565 W IL2007001565 W IL 2007001565W WO 2008075351 A3 WO2008075351 A3 WO 2008075351A3
Authority
WO
WIPO (PCT)
Prior art keywords
soft
flash memory
probability measures
hard
estimated
Prior art date
Application number
PCT/IL2007/001565
Other languages
French (fr)
Other versions
WO2008075351A2 (en
Inventor
Idan Alrod
Eran Sharon
Simon Litsyn
Menahem Lasser
Original Assignee
Univ Ramot
Idan Alrod
Eran Sharon
Simon Litsyn
Menahem Lasser
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Univ Ramot, Idan Alrod, Eran Sharon, Simon Litsyn, Menahem Lasser filed Critical Univ Ramot
Priority to KR1020097009741A priority Critical patent/KR101458441B1/en
Publication of WO2008075351A2 publication Critical patent/WO2008075351A2/en
Publication of WO2008075351A3 publication Critical patent/WO2008075351A3/en

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Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/26—Sensing or reading circuits; Data output circuits
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
    • G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
    • G06F11/1008—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices
    • G06F11/1068—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices in sector programmable memories, e.g. flash disk
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
    • G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
    • G06F11/1008—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices
    • G06F11/1072—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices in multilevel memories
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/56—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
    • G11C11/5621—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency using charge storage in a floating gate
    • G11C11/5642—Sensing or reading circuits; Data output circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/04—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
    • G11C16/0483—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells having several storage transistors connected in series
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C2211/00—Indexing scheme relating to digital stores characterized by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C2211/56—Indexing scheme relating to G11C11/56 and sub-groups for features not covered by these groups
    • G11C2211/563—Multilevel memory reading aspects
    • G11C2211/5634—Reference cells

Abstract

To read one or more flash memory cells, the threshold voltage of each cell is compared to at least one integral reference voltage and to at least one fractional reference voltage. Based on the comparisons, a respective estimate probability measure of each bit of an original bit pattern of each cell is calculated. This provides a plurality of estimated probability measures. Based at least in part on at least two of the estimated probability measures, respective original bit patterns of the cells are estimated. Preferably, the estimated probability measures are initial probability measures that are transformed to final probability measures under the constraint that the bit pattern(s) (collectively) is/are a member of a candidate set, e.g. a set of codewords.
PCT/IL2007/001565 2006-12-21 2007-12-19 Soft decoding of hard and soft bits read from a flash memory WO2008075351A2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1020097009741A KR101458441B1 (en) 2006-12-21 2007-12-19 Soft decoding of hard and soft bits read from a flash memory

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US11/642,708 2006-12-21
US11/642,708 US7814401B2 (en) 2006-12-21 2006-12-21 Soft decoding of hard and soft bits read from a flash memory

Publications (2)

Publication Number Publication Date
WO2008075351A2 WO2008075351A2 (en) 2008-06-26
WO2008075351A3 true WO2008075351A3 (en) 2008-07-31

Family

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Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/IL2007/001565 WO2008075351A2 (en) 2006-12-21 2007-12-19 Soft decoding of hard and soft bits read from a flash memory

Country Status (4)

Country Link
US (1) US7814401B2 (en)
KR (1) KR101458441B1 (en)
TW (1) TWI364763B (en)
WO (1) WO2008075351A2 (en)

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Also Published As

Publication number Publication date
KR101458441B1 (en) 2014-11-07
WO2008075351A2 (en) 2008-06-26
US20080151617A1 (en) 2008-06-26
TWI364763B (en) 2012-05-21
KR20090101160A (en) 2009-09-24
TW200836205A (en) 2008-09-01
US7814401B2 (en) 2010-10-12

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