WO2008083132A3 - Complete word line look ahead with efficient data latch assignment in non-volatile memory read operations - Google Patents

Complete word line look ahead with efficient data latch assignment in non-volatile memory read operations Download PDF

Info

Publication number
WO2008083132A3
WO2008083132A3 PCT/US2007/088779 US2007088779W WO2008083132A3 WO 2008083132 A3 WO2008083132 A3 WO 2008083132A3 US 2007088779 W US2007088779 W US 2007088779W WO 2008083132 A3 WO2008083132 A3 WO 2008083132A3
Authority
WO
WIPO (PCT)
Prior art keywords
word line
data
adjacent word
latches
adjacent
Prior art date
Application number
PCT/US2007/088779
Other languages
French (fr)
Other versions
WO2008083132A2 (en
Inventor
Man Lung Mui
Seungpil Lee
Original Assignee
Sandisk Corp
Man Lung Mui
Seungpil Lee
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US11/617,550 external-priority patent/US7616506B2/en
Priority claimed from US11/617,544 external-priority patent/US7616505B2/en
Application filed by Sandisk Corp, Man Lung Mui, Seungpil Lee filed Critical Sandisk Corp
Publication of WO2008083132A2 publication Critical patent/WO2008083132A2/en
Publication of WO2008083132A3 publication Critical patent/WO2008083132A3/en

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/56—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
    • G11C11/5621—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency using charge storage in a floating gate
    • G11C11/5642—Sensing or reading circuits; Data output circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/34—Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
    • G11C16/3418—Disturbance prevention or evaluation; Refreshing of disturbed memory data

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Read Only Memory (AREA)
  • Semiconductor Memories (AREA)

Abstract

Shifts in the apparent charge stored by a charge storage region such as a floating gate in a non- volatile memory cell can occur because of electrical field coupling based on charge stored by adjacent cells. To account for the shift, compensations are applied when reading. When reading a selected word line, the adjacent word line is read first and the data stored in a set of data latches for each bit line. One latch for each bit line stores an indication that the data is from the adjacent word line. The selected word line is then read with compensations based on the different states of the cells on the adjacent word line. Each sense module uses the data from the adjacent word line to select the results of sensing with the appropriate compensation for its bit line. The data from the adjacent word line is overwritten with data from the selected word line at the appropriate time and the indication updated to reflect that the latches store data from the selected word line. The efficient use of the data latches eliminates the need for separate latches to store data from the adjacent word line.
PCT/US2007/088779 2006-12-28 2007-12-24 Complete word line look ahead with efficient data latch assignment in non-volatile memory read operations WO2008083132A2 (en)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
US11/617,550 US7616506B2 (en) 2006-12-28 2006-12-28 Systems for complete word line look ahead with efficient data latch assignment in non-volatile memory read operations
US11/617,544 2006-12-28
US11/617,544 US7616505B2 (en) 2006-12-28 2006-12-28 Complete word line look ahead with efficient data latch assignment in non-volatile memory read operations
US11/617,550 2006-12-28

Publications (2)

Publication Number Publication Date
WO2008083132A2 WO2008083132A2 (en) 2008-07-10
WO2008083132A3 true WO2008083132A3 (en) 2008-10-02

Family

ID=39472706

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/US2007/088779 WO2008083132A2 (en) 2006-12-28 2007-12-24 Complete word line look ahead with efficient data latch assignment in non-volatile memory read operations

Country Status (2)

Country Link
TW (1) TWI391934B (en)
WO (1) WO2008083132A2 (en)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7885119B2 (en) 2006-07-20 2011-02-08 Sandisk Corporation Compensating for coupling during programming
US7894269B2 (en) 2006-07-20 2011-02-22 Sandisk Corporation Nonvolatile memory and method for compensating during programming for perturbing charges of neighboring cells
US7660166B2 (en) 2007-01-31 2010-02-09 Sandisk Il Ltd. Method of improving programming precision in flash memory
US7652929B2 (en) 2007-09-17 2010-01-26 Sandisk Corporation Non-volatile memory and method for biasing adjacent word line for verify during programming
US7813181B2 (en) * 2008-12-31 2010-10-12 Sandisk Corporation Non-volatile memory and method for sensing with pipelined corrections for neighboring perturbations
US8472246B2 (en) * 2011-03-21 2013-06-25 Skymedi Corporation Method of programming a multi-bit per cell non-volatile memory
US9336891B2 (en) * 2014-07-02 2016-05-10 Sandisk Technologies Inc. Look ahead read method for non-volatile memory

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20060221714A1 (en) * 2005-04-05 2006-10-05 Yan Li Read operation for non-volatile storage that includes compensation for coupling

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6771536B2 (en) * 2002-02-27 2004-08-03 Sandisk Corporation Operating techniques for reducing program and read disturbs of a non-volatile memory
US6781877B2 (en) * 2002-09-06 2004-08-24 Sandisk Corporation Techniques for reducing effects of coupling between storage elements of adjacent rows of memory cells
US7196931B2 (en) * 2002-09-24 2007-03-27 Sandisk Corporation Non-volatile memory and method with reduced source line bias errors
US7324393B2 (en) * 2002-09-24 2008-01-29 Sandisk Corporation Method for compensated sensing in non-volatile memory
US6987693B2 (en) * 2002-09-24 2006-01-17 Sandisk Corporation Non-volatile memory and method with reduced neighboring field errors
AU2003272596A1 (en) * 2002-09-24 2004-04-19 Sandisk Corporation Non-volatile memory and its sensing method
US7372730B2 (en) * 2004-01-26 2008-05-13 Sandisk Corporation Method of reading NAND memory to compensate for coupling between storage elements
US7447078B2 (en) * 2005-04-01 2008-11-04 Sandisk Corporation Method for non-volatile memory with background data latch caching during read operations

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20060221714A1 (en) * 2005-04-05 2006-10-05 Yan Li Read operation for non-volatile storage that includes compensation for coupling

Also Published As

Publication number Publication date
TW200845011A (en) 2008-11-16
WO2008083132A2 (en) 2008-07-10
TWI391934B (en) 2013-04-01

Similar Documents

Publication Publication Date Title
WO2008011440A3 (en) Floating gate memory with compensating for coupling during programming
WO2008011439A3 (en) Compensating for coupling between adjacent storage elements in a nonvolatile memory, based on sensing a neighbour using coupling
WO2008083132A3 (en) Complete word line look ahead with efficient data latch assignment in non-volatile memory read operations
DE602007011736D1 (en) READING FOR NON-VOLATILE STORAGE WITH FLOATING-GATE COUPLING COMPENSATION
ATE510287T1 (en) COUPLING COMPENSATION FOR NON-VOLATILE STORAGE
WO2008083196A3 (en) Margined neighbor reading for non-volatile memory read operations including coupling compensation
TW200703341A (en) Read operation for non-volatile storage that includes compensation for coupling
US9042175B2 (en) Non-volatile memory device and read method thereof
WO2007149678A3 (en) Programming defferently sized margins and sensing with compensations at select states for improved read operations in non-volatile memory
DE602007007974D1 (en) READING A NON-VOLATILE MEMORY CELL TAKING INTO ACCOUNT THE STORAGE STATUS OF A ADJOINABLE MEMORY CELL
TWI391936B (en) Memory device architectures and operation
ATE499682T1 (en) COMPENSATION CURRENTS DURING READING OPERATIONS IN NON-VOLATILE MEMORY
TW200710848A (en) Compensating for coupling during read operations of non-volatile memory
WO2007133645A3 (en) Nand architecture memory devices and operation
TW200608404A (en) Operating non-volatile memory without read disturb limitations
TW201129985A (en) Non-volatile memory array architecture incorporating 1T-1R near 4F2 memory cell
TWI318406B (en) Systems and method for alternate row-based reading and writing for non-volatile memory
WO2010030692A3 (en) Multi-pass programming for memory with reduced data storage requirement
TW200715291A (en) Semiconductor storage device having memory cell for storing data by using difference in threshold voltage
TW200605080A (en) Method of reading NAND memory to compensate for coupling between storage elements
TW200802402A (en) Non-volatile memory device and methods using the same
WO2008027691A3 (en) Phase-change random access memory employing read before write for resistance stabilization
CN105321567A (en) Nonvolatile memory device, programming method and storage device
WO2011087952A3 (en) Non-volatile memory device and method therefor
SG151220A1 (en) Method and device for irreversibly programming and reading nonvolatile memory cells

Legal Events

Date Code Title Description
121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 07869865

Country of ref document: EP

Kind code of ref document: A2

NENP Non-entry into the national phase

Ref country code: DE

122 Ep: pct application non-entry in european phase

Ref document number: 07869865

Country of ref document: EP

Kind code of ref document: A2