WO2008107941A1 - 半導体装置及びその製造方法 - Google Patents

半導体装置及びその製造方法 Download PDF

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Publication number
WO2008107941A1
WO2008107941A1 PCT/JP2007/053884 JP2007053884W WO2008107941A1 WO 2008107941 A1 WO2008107941 A1 WO 2008107941A1 JP 2007053884 W JP2007053884 W JP 2007053884W WO 2008107941 A1 WO2008107941 A1 WO 2008107941A1
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WIPO (PCT)
Prior art keywords
oxide film
nickel oxide
electrode
producing
same
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PCT/JP2007/053884
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English (en)
French (fr)
Inventor
Kentaro Kinoshita
Chikako Yoshida
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Fujitsu Limited
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Publication date
Application filed by Fujitsu Limited filed Critical Fujitsu Limited
Priority to PCT/JP2007/053884 priority Critical patent/WO2008107941A1/ja
Priority to KR1020097017093A priority patent/KR101054321B1/ko
Priority to JP2009502354A priority patent/JP5152173B2/ja
Publication of WO2008107941A1 publication Critical patent/WO2008107941A1/ja
Priority to US12/546,089 priority patent/US7924138B2/en

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    • G11C13/0002—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
    • G11C13/0007—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements comprising metal oxide memory material, e.g. perovskites
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C13/00—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
    • G11C13/0002—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
    • G11C13/0004—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements comprising amorphous/crystalline phase transition cells
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C13/00—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
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    • G11C13/0021—Auxiliary circuits
    • G11C13/0069—Writing or programming circuits or methods
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body
    • H01L27/10—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration
    • H01L27/101—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration including resistors or capacitors only
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N70/00—Solid-state devices without a potential-jump barrier or surface barrier, and specially adapted for rectifying, amplifying, oscillating or switching
    • H10N70/011—Manufacture or treatment of multistable switching devices
    • H10N70/021—Formation of the switching material, e.g. layer deposition
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
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    • H10N70/00—Solid-state devices without a potential-jump barrier or surface barrier, and specially adapted for rectifying, amplifying, oscillating or switching
    • H10N70/011—Manufacture or treatment of multistable switching devices
    • H10N70/021—Formation of the switching material, e.g. layer deposition
    • H10N70/026—Formation of the switching material, e.g. layer deposition by physical vapor deposition, e.g. sputtering
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    • H10N70/00—Solid-state devices without a potential-jump barrier or surface barrier, and specially adapted for rectifying, amplifying, oscillating or switching
    • H10N70/011—Manufacture or treatment of multistable switching devices
    • H10N70/061—Patterning of the switching material
    • H10N70/063—Patterning of the switching material by etching of pre-deposited switching material layers, e.g. lithography
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    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
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    • H10N70/00—Solid-state devices without a potential-jump barrier or surface barrier, and specially adapted for rectifying, amplifying, oscillating or switching
    • H10N70/20—Multistable switching devices, e.g. memristors
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    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N70/00—Solid-state devices without a potential-jump barrier or surface barrier, and specially adapted for rectifying, amplifying, oscillating or switching
    • H10N70/801—Constructional details of multistable switching devices
    • H10N70/821—Device geometry
    • H10N70/826—Device geometry adapted for essentially vertical current flow, e.g. sandwich or pillar type devices
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    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N70/00—Solid-state devices without a potential-jump barrier or surface barrier, and specially adapted for rectifying, amplifying, oscillating or switching
    • H10N70/801—Constructional details of multistable switching devices
    • H10N70/881—Switching materials
    • H10N70/883—Oxides or nitrides
    • H10N70/8833—Binary metal oxides, e.g. TaOx
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C13/00—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
    • G11C13/0002—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
    • G11C13/0021—Auxiliary circuits
    • G11C13/0069—Writing or programming circuits or methods
    • G11C2013/0083—Write to perform initialising, forming process, electro forming or conditioning
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C13/00—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
    • G11C13/0002—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
    • G11C13/0021—Auxiliary circuits
    • G11C13/0069—Writing or programming circuits or methods
    • G11C2013/009—Write using potential difference applied between cell electrodes
    • G—PHYSICS
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    • G11C2213/00—Indexing scheme relating to G11C13/00 for features not covered by this group
    • G11C2213/10—Resistive cells; Technology aspects
    • G11C2213/15—Current-voltage curve
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    • G11—INFORMATION STORAGE
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    • G11C2213/00—Indexing scheme relating to G11C13/00 for features not covered by this group
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    • G11C2213/32—Material having simple binary metal oxide structure
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    • G11C—STATIC STORES
    • G11C2213/00—Indexing scheme relating to G11C13/00 for features not covered by this group
    • G11C2213/50—Resistive cell structure aspects
    • G11C2213/56—Structure including two electrodes, a memory active layer and a so called passive or source or reservoir layer which is NOT an electrode, wherein the passive or source or reservoir layer is a source of ions which migrate afterwards in the memory active layer to be only trapped there, to form conductive filaments there or to react with the material of the memory active layer in redox way
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C2213/00—Indexing scheme relating to G11C13/00 for features not covered by this group
    • G11C2213/70—Resistive array aspects
    • G11C2213/79—Array wherein the access device being a transistor
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    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B63/00—Resistance change memory devices, e.g. resistive RAM [ReRAM] devices
    • H10B63/30—Resistance change memory devices, e.g. resistive RAM [ReRAM] devices comprising selection components having three or more electrodes, e.g. transistors
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    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B63/00—Resistance change memory devices, e.g. resistive RAM [ReRAM] devices
    • H10B63/80—Arrangements comprising multiple bistable or multi-stable switching components of the same type on a plane parallel to the substrate, e.g. cross-point arrays
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00—Metal working
    • Y10T29/49—Method of mechanical manufacture
    • Y10T29/49002—Electrical device making
    • Y10T29/49082—Resistor making
    • Y10T29/49099—Coating resistive material on a base

Abstract

　下部電極（８）上に、酸化チタン膜（１０）、酸化ニッケル膜（１１）及び上部電極（１２）が形成されており、下部電極（８）、酸化チタン膜（１０）、酸化ニッケル膜（１１）及び上部電極（１２）から抵抗素子（ＶＲ）が構成されている。酸化チタン膜（１０）の厚さは５ｎｍであり、酸化ニッケル膜（１１）の厚さは６０ｎｍである。酸化ニッケル膜（１１）を構成する酸化ニッケル中の酸素の割合は、化学量論組成における酸素の割合よりも低い。
PCT/JP2007/053884 2007-03-01 2007-03-01 半導体装置及びその製造方法 WO2008107941A1 (ja)

Priority Applications (4)

Application Number Priority Date Filing Date Title
PCT/JP2007/053884 WO2008107941A1 (ja) 2007-03-01 2007-03-01 半導体装置及びその製造方法
KR1020097017093A KR101054321B1 (ko) 2007-03-01 2007-03-01 반도체 장치 및 그 제조 방법
JP2009502354A JP5152173B2 (ja) 2007-03-01 2007-03-01 半導体装置及びその製造方法
US12/546,089 US7924138B2 (en) 2007-03-01 2009-08-24 Semiconductor device and manufacturing method of the same

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/JP2007/053884 WO2008107941A1 (ja) 2007-03-01 2007-03-01 半導体装置及びその製造方法

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US12/546,089 Continuation US7924138B2 (en) 2007-03-01 2009-08-24 Semiconductor device and manufacturing method of the same

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WO2008107941A1 true WO2008107941A1 (ja) 2008-09-12

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JP (1) JP5152173B2 (ja)
KR (1) KR101054321B1 (ja)
WO (1) WO2008107941A1 (ja)

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2009212380A (ja) * 2008-03-05 2009-09-17 Fujitsu Ltd 抵抗変化型メモリおよびその作製方法
WO2009141857A1 (ja) * 2008-05-22 2009-11-26 パナソニック株式会社 抵抗変化型不揮発性記憶装置
WO2010067585A1 (ja) * 2008-12-10 2010-06-17 パナソニック株式会社 抵抗変化素子およびそれを用いた不揮発性半導体記憶装置
WO2010087000A1 (ja) * 2009-01-30 2010-08-05 株式会社 東芝 不揮発性記憶装置の製造方法
EP2259267A1 (en) * 2009-06-02 2010-12-08 Imec Method for manufacturing a resistive switching memory cell comprising a nickel oxide layer operable at low-power and memory cells obtained thereof
US9281477B2 (en) 2011-06-10 2016-03-08 Ulvac, Inc. Resistance change element and method for producing the same

Families Citing this family (76)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100773537B1 (ko) * 2003-06-03 2007-11-07 삼성전자주식회사 한 개의 스위칭 소자와 한 개의 저항체를 포함하는비휘발성 메모리 장치 및 그 제조 방법
US8071972B2 (en) 2008-10-20 2011-12-06 The Regents Of The University Of Michigan Silicon based nanoscale crossbar memory
KR101055748B1 (ko) * 2009-10-23 2011-08-11 주식회사 하이닉스반도체 저항 변화 장치 및 그 제조방법
US9570678B1 (en) 2010-06-08 2017-02-14 Crossbar, Inc. Resistive RAM with preferental filament formation region and methods
US9601692B1 (en) 2010-07-13 2017-03-21 Crossbar, Inc. Hetero-switching layer in a RRAM device and method
US9012307B2 (en) 2010-07-13 2015-04-21 Crossbar, Inc. Two terminal resistive switching device structure and method of fabricating
US8946046B1 (en) 2012-05-02 2015-02-03 Crossbar, Inc. Guided path for forming a conductive filament in RRAM
US8441835B2 (en) 2010-06-11 2013-05-14 Crossbar, Inc. Interface control for improved switching in RRAM
CN103081093B (zh) 2010-06-11 2015-06-03 科洛斯巴股份有限公司 存储器件的柱结构以及方法
US8351241B2 (en) 2010-06-24 2013-01-08 The Regents Of The University Of Michigan Rectification element and method for resistive switching for non volatile memory device
US8241944B2 (en) * 2010-07-02 2012-08-14 Micron Technology, Inc. Resistive RAM devices and methods
US8374018B2 (en) 2010-07-09 2013-02-12 Crossbar, Inc. Resistive memory using SiGe material
US8569172B1 (en) 2012-08-14 2013-10-29 Crossbar, Inc. Noble metal/non-noble metal electrode for RRAM applications
US8947908B2 (en) 2010-11-04 2015-02-03 Crossbar, Inc. Hetero-switching layer in a RRAM device and method
US8168506B2 (en) 2010-07-13 2012-05-01 Crossbar, Inc. On/off ratio for non-volatile memory device and method
US8467227B1 (en) 2010-11-04 2013-06-18 Crossbar, Inc. Hetero resistive switching material layer in RRAM device and method
US8884261B2 (en) 2010-08-23 2014-11-11 Crossbar, Inc. Device switching using layered device structure
US9401475B1 (en) 2010-08-23 2016-07-26 Crossbar, Inc. Method for silver deposition for a non-volatile memory device
US8889521B1 (en) 2012-09-14 2014-11-18 Crossbar, Inc. Method for silver deposition for a non-volatile memory device
US8492195B2 (en) 2010-08-23 2013-07-23 Crossbar, Inc. Method for forming stackable non-volatile resistive switching memory devices
US8404553B2 (en) 2010-08-23 2013-03-26 Crossbar, Inc. Disturb-resistant non-volatile memory device and method
US8391049B2 (en) 2010-09-29 2013-03-05 Crossbar, Inc. Resistor structure for a non-volatile memory device and method
US8558212B2 (en) 2010-09-29 2013-10-15 Crossbar, Inc. Conductive path in switching material in a resistive random access memory device and control
US8502185B2 (en) 2011-05-31 2013-08-06 Crossbar, Inc. Switching device having a non-linear element
USRE46335E1 (en) 2010-11-04 2017-03-07 Crossbar, Inc. Switching device having a non-linear element
US8088688B1 (en) 2010-11-05 2012-01-03 Crossbar, Inc. p+ polysilicon material on aluminum for non-volatile memory device and method
US8930174B2 (en) 2010-12-28 2015-01-06 Crossbar, Inc. Modeling technique for resistive random access memory (RRAM) cells
US8791010B1 (en) 2010-12-31 2014-07-29 Crossbar, Inc. Silver interconnects for stacked non-volatile memory device and method
US8815696B1 (en) 2010-12-31 2014-08-26 Crossbar, Inc. Disturb-resistant non-volatile memory device using via-fill and etchback technique
US9153623B1 (en) 2010-12-31 2015-10-06 Crossbar, Inc. Thin film transistor steering element for a non-volatile memory device
US8450710B2 (en) 2011-05-27 2013-05-28 Crossbar, Inc. Low temperature p+ silicon junction material for a non-volatile memory device
US8394670B2 (en) 2011-05-31 2013-03-12 Crossbar, Inc. Vertical diodes for non-volatile memory device
US9620206B2 (en) 2011-05-31 2017-04-11 Crossbar, Inc. Memory array architecture with two-terminal memory cells
US8619459B1 (en) 2011-06-23 2013-12-31 Crossbar, Inc. High operating speed resistive random access memory
US9564587B1 (en) 2011-06-30 2017-02-07 Crossbar, Inc. Three-dimensional two-terminal memory with enhanced electric field and segmented interconnects
US9166163B2 (en) 2011-06-30 2015-10-20 Crossbar, Inc. Sub-oxide interface layer for two-terminal memory
US9627443B2 (en) 2011-06-30 2017-04-18 Crossbar, Inc. Three-dimensional oblique two-terminal memory with enhanced electric field
US8946669B1 (en) 2012-04-05 2015-02-03 Crossbar, Inc. Resistive memory device and fabrication methods
US8659929B2 (en) 2011-06-30 2014-02-25 Crossbar, Inc. Amorphous silicon RRAM with non-linear device and operation
US9252191B2 (en) 2011-07-22 2016-02-02 Crossbar, Inc. Seed layer for a p+ silicon germanium material for a non-volatile memory device and method
US10056907B1 (en) 2011-07-29 2018-08-21 Crossbar, Inc. Field programmable gate array utilizing two-terminal non-volatile memory
US9729155B2 (en) 2011-07-29 2017-08-08 Crossbar, Inc. Field programmable gate array utilizing two-terminal non-volatile memory
US8674724B2 (en) 2011-07-29 2014-03-18 Crossbar, Inc. Field programmable gate array utilizing two-terminal non-volatile memory
US8716098B1 (en) 2012-03-09 2014-05-06 Crossbar, Inc. Selective removal method and structure of silver in resistive switching device for a non-volatile memory device
US9087576B1 (en) 2012-03-29 2015-07-21 Crossbar, Inc. Low temperature fabrication method for a three-dimensional memory device and structure
KR101356958B1 (ko) * 2012-04-10 2014-01-29 성균관대학교산학협력단 저항 메모리 소자 및 이의 제조방법
US9685608B2 (en) 2012-04-13 2017-06-20 Crossbar, Inc. Reduced diffusion in metal electrode for two-terminal memory
US8658476B1 (en) 2012-04-20 2014-02-25 Crossbar, Inc. Low temperature P+ polycrystalline silicon material for non-volatile memory device
US8796658B1 (en) 2012-05-07 2014-08-05 Crossbar, Inc. Filamentary based non-volatile resistive memory device and method
US8765566B2 (en) 2012-05-10 2014-07-01 Crossbar, Inc. Line and space architecture for a non-volatile memory device
US9583701B1 (en) 2012-08-14 2017-02-28 Crossbar, Inc. Methods for fabricating resistive memory device switching material using ion implantation
US10096653B2 (en) 2012-08-14 2018-10-09 Crossbar, Inc. Monolithically integrated resistive memory using integrated-circuit foundry compatible processes
US8946673B1 (en) 2012-08-24 2015-02-03 Crossbar, Inc. Resistive switching device structure with improved data retention for non-volatile memory device and method
US9312483B2 (en) 2012-09-24 2016-04-12 Crossbar, Inc. Electrode structure for a non-volatile memory device and method
US9576616B2 (en) 2012-10-10 2017-02-21 Crossbar, Inc. Non-volatile memory with overwrite capability and low write amplification
US11068620B2 (en) 2012-11-09 2021-07-20 Crossbar, Inc. Secure circuit integrated with memory layer
US8982647B2 (en) 2012-11-14 2015-03-17 Crossbar, Inc. Resistive random access memory equalization and sensing
US9412790B1 (en) 2012-12-04 2016-08-09 Crossbar, Inc. Scalable RRAM device architecture for a non-volatile memory device and method
US9406379B2 (en) 2013-01-03 2016-08-02 Crossbar, Inc. Resistive random access memory with non-linear current-voltage relationship
US9112145B1 (en) 2013-01-31 2015-08-18 Crossbar, Inc. Rectified switching of two-terminal memory via real time filament formation
US9324942B1 (en) 2013-01-31 2016-04-26 Crossbar, Inc. Resistive memory cell with solid state diode
US8934280B1 (en) 2013-02-06 2015-01-13 Crossbar, Inc. Capacitive discharge programming for two-terminal memory cells
US8913418B2 (en) * 2013-03-14 2014-12-16 Intermolecular, Inc. Confined defect profiling within resistive random memory access cells
US10290801B2 (en) 2014-02-07 2019-05-14 Crossbar, Inc. Scalable silicon based resistive memory device
US9425237B2 (en) 2014-03-11 2016-08-23 Crossbar, Inc. Selector device for two-terminal memory
US9768234B2 (en) 2014-05-20 2017-09-19 Crossbar, Inc. Resistive memory architecture and devices
US9633724B2 (en) 2014-07-07 2017-04-25 Crossbar, Inc. Sensing a non-volatile memory device utilizing selector device holding characteristics
US10211397B1 (en) 2014-07-07 2019-02-19 Crossbar, Inc. Threshold voltage tuning for a volatile selection device
US10115819B2 (en) 2015-05-29 2018-10-30 Crossbar, Inc. Recessed high voltage metal oxide semiconductor transistor for RRAM cell
US9698201B2 (en) 2014-07-09 2017-07-04 Crossbar, Inc. High density selector-based non volatile memory cell and fabrication
US9685483B2 (en) 2014-07-09 2017-06-20 Crossbar, Inc. Selector-based non-volatile cell fabrication utilizing IC-foundry compatible process
US9460788B2 (en) 2014-07-09 2016-10-04 Crossbar, Inc. Non-volatile memory cell utilizing volatile switching two terminal device and a MOS transistor
US20180175290A1 (en) * 2016-12-19 2018-06-21 Arm Ltd. Forming nucleation layers in correlated electron material devices
US10096362B1 (en) 2017-03-24 2018-10-09 Crossbar, Inc. Switching block configuration bit comprising a non-volatile memory cell
CN111179991B (zh) * 2019-12-31 2022-06-03 清华大学 阻变存储阵列及其操作方法、阻变存储器电路
CN114525472B (zh) * 2022-02-22 2023-09-19 重庆工商大学 一种纳米结构氧化镍薄膜的制备方法

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006179926A (ja) * 2004-12-21 2006-07-06 Samsung Electronics Co Ltd 二種の抵抗体を含む不揮発性メモリ素子
WO2007013174A1 (ja) * 2005-07-29 2007-02-01 Fujitsu Limited 抵抗記憶素子及び不揮発性半導体記憶装置

Family Cites Families (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2004241396A (ja) 2002-02-07 2004-08-26 Sharp Corp 抵抗変化素子の製造方法および不揮発性抵抗変化メモリデバイスの製造方法、並びに不揮発性抵抗変化メモリデバイス
US6759249B2 (en) 2002-02-07 2004-07-06 Sharp Laboratories Of America, Inc. Device and method for reversible resistance change induced by electric pulses in non-crystalline perovskite unipolar programmable memory
US6872963B2 (en) * 2002-08-08 2005-03-29 Ovonyx, Inc. Programmable resistance memory element with layered memory material
US7892489B2 (en) 2003-05-27 2011-02-22 Optotrace Technologies, Inc. Light scattering device having multi-layer micro structure
US7384792B1 (en) 2003-05-27 2008-06-10 Opto Trace Technologies, Inc. Method of fabricating nano-structured surface and configuration of surface enhanced light scattering probe
US7242469B2 (en) 2003-05-27 2007-07-10 Opto Trace Technologies, Inc. Applications of Raman scattering probes
US7956997B2 (en) 2003-05-27 2011-06-07 Optotrace Technologies, Inc. Systems and methods for food safety detection
US7460224B2 (en) 2005-12-19 2008-12-02 Opto Trace Technologies, Inc. Arrays of nano structures for surface-enhanced Raman scattering
US8031335B2 (en) 2003-05-27 2011-10-04 Opto Trace Technologies, Inc. Non-invasive disease diagnosis using light scattering probe
KR100773537B1 (ko) 2003-06-03 2007-11-07 삼성전자주식회사 한 개의 스위칭 소자와 한 개의 저항체를 포함하는비휘발성 메모리 장치 및 그 제조 방법
KR101051704B1 (ko) * 2004-04-28 2011-07-25 삼성전자주식회사 저항 구배를 지닌 다층막을 이용한 메모리 소자
KR100593448B1 (ko) 2004-09-10 2006-06-28 삼성전자주식회사 전이금속 산화막을 데이터 저장 물질막으로 채택하는비휘발성 기억 셀들 및 그 제조방법들
KR100669854B1 (ko) * 2005-07-05 2007-01-16 삼성전자주식회사 단위 셀 구조물과 그 제조 방법 및 이를 갖는 비휘발성메모리 소자 및 그 제조 방법

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006179926A (ja) * 2004-12-21 2006-07-06 Samsung Electronics Co Ltd 二種の抵抗体を含む不揮発性メモリ素子
WO2007013174A1 (ja) * 2005-07-29 2007-02-01 Fujitsu Limited 抵抗記憶素子及び不揮発性半導体記憶装置

Cited By (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2009212380A (ja) * 2008-03-05 2009-09-17 Fujitsu Ltd 抵抗変化型メモリおよびその作製方法
US8233311B2 (en) 2008-05-22 2012-07-31 Panasonic Corporation Variable resistance nonvolatile storage device having a source line formed of parallel wiring layers connected to each other through vias
WO2009141857A1 (ja) * 2008-05-22 2009-11-26 パナソニック株式会社 抵抗変化型不揮発性記憶装置
US8472238B2 (en) 2008-05-22 2013-06-25 Panasonic Corporation Variable resistance nonvolatile storage device with oxygen-deficient oxide layer and asymmetric substrate bias effect
US8094485B2 (en) 2008-05-22 2012-01-10 Panasonic Corporation Variable resistance nonvolatile storage device with oxygen-deficient oxide layer and asymmetric substrate bias effect
WO2010067585A1 (ja) * 2008-12-10 2010-06-17 パナソニック株式会社 抵抗変化素子およびそれを用いた不揮発性半導体記憶装置
US8350245B2 (en) 2008-12-10 2013-01-08 Panasonic Corporation Variable resistance element and nonvolatile semiconductor memory device using the same
JP4937413B2 (ja) * 2008-12-10 2012-05-23 パナソニック株式会社 抵抗変化素子およびそれを用いた不揮発性半導体記憶装置
WO2010087000A1 (ja) * 2009-01-30 2010-08-05 株式会社 東芝 不揮発性記憶装置の製造方法
US8310857B2 (en) 2009-06-02 2012-11-13 Imec Method for manufacturing a resistive switching memory cell comprising a nickel oxide layer operable at low-power and memory cells obtained thereof
JP2011009739A (ja) * 2009-06-02 2011-01-13 Imec 低電力で動作可能なニッケル酸化層を含む抵抗スイッチングメモリセルの製造方法およびそのメモリセル
EP2259267A1 (en) * 2009-06-02 2010-12-08 Imec Method for manufacturing a resistive switching memory cell comprising a nickel oxide layer operable at low-power and memory cells obtained thereof
US9281477B2 (en) 2011-06-10 2016-03-08 Ulvac, Inc. Resistance change element and method for producing the same

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JP5152173B2 (ja) 2013-02-27
JPWO2008107941A1 (ja) 2010-06-03

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