WO2008111125A1 - 半導体装置および半導体装置の製造方法 - Google Patents
半導体装置および半導体装置の製造方法 Download PDFInfo
- Publication number
- WO2008111125A1 WO2008111125A1 PCT/JP2007/000212 JP2007000212W WO2008111125A1 WO 2008111125 A1 WO2008111125 A1 WO 2008111125A1 JP 2007000212 W JP2007000212 W JP 2007000212W WO 2008111125 A1 WO2008111125 A1 WO 2008111125A1
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- semiconductor device
- producing
- same
- insulating film
- copper
- Prior art date
Links
- 239000004065 semiconductor Substances 0.000 title abstract 3
- QGZKDVFQNNGYKY-UHFFFAOYSA-N Ammonia Chemical compound N QGZKDVFQNNGYKY-UHFFFAOYSA-N 0.000 abstract 2
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 abstract 2
- 229910052802 copper Inorganic materials 0.000 abstract 2
- 239000010949 copper Substances 0.000 abstract 2
- 239000000126 substance Substances 0.000 abstract 2
- 229910021529 ammonia Inorganic materials 0.000 abstract 1
- 239000011248 coating agent Substances 0.000 abstract 1
- 238000000576 coating method Methods 0.000 abstract 1
- 239000000463 material Substances 0.000 abstract 1
- 229910052710 silicon Inorganic materials 0.000 abstract 1
- 239000010703 silicon Substances 0.000 abstract 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76829—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers
- H01L21/76834—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers formation of thin insulating films on the sidewalls or on top of conductors
-
- C—CHEMISTRY; METALLURGY
- C09—DYES; PAINTS; POLISHES; NATURAL RESINS; ADHESIVES; COMPOSITIONS NOT OTHERWISE PROVIDED FOR; APPLICATIONS OF MATERIALS NOT OTHERWISE PROVIDED FOR
- C09D—COATING COMPOSITIONS, e.g. PAINTS, VARNISHES OR LACQUERS; FILLING PASTES; CHEMICAL PAINT OR INK REMOVERS; INKS; CORRECTING FLUIDS; WOODSTAINS; PASTES OR SOLIDS FOR COLOURING OR PRINTING; USE OF MATERIALS THEREFOR
- C09D183/00—Coating compositions based on macromolecular compounds obtained by reactions forming in the main chain of the macromolecule a linkage containing silicon, with or without sulfur, nitrogen, oxygen, or carbon only; Coating compositions based on derivatives of such polymers
- C09D183/16—Coating compositions based on macromolecular compounds obtained by reactions forming in the main chain of the macromolecule a linkage containing silicon, with or without sulfur, nitrogen, oxygen, or carbon only; Coating compositions based on derivatives of such polymers in which all the silicon atoms are connected by linkages other than oxygen atoms
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
- H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02296—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer
- H01L21/02299—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer pre-treatment
- H01L21/02304—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer pre-treatment formation of intermediate layers, e.g. buffer layers, layers to improve adhesion, lattice match or diffusion barriers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02296—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer
- H01L21/02318—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment
- H01L21/02343—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment treatment by exposure to a liquid
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/312—Organic layers, e.g. photoresist
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/312—Organic layers, e.g. photoresist
- H01L21/3121—Layers comprising organo-silicon compounds
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/312—Organic layers, e.g. photoresist
- H01L21/3121—Layers comprising organo-silicon compounds
- H01L21/3125—Layers comprising organo-silicon compounds layers comprising silazane compounds
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76841—Barrier, adhesion or liner layers
- H01L21/7685—Barrier, adhesion or liner layers the layer covering a conductive structure
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01029—Copper [Cu]
Abstract
Priority Applications (6)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1020097019958A KR101119649B1 (ko) | 2007-03-13 | 2007-03-13 | 반도체 장치 및 반도체 장치의 제조 방법 |
EP07736871.0A EP2124250A4 (en) | 2007-03-13 | 2007-03-13 | SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME |
JP2009503757A JP5071474B2 (ja) | 2007-03-13 | 2007-03-13 | 半導体装置および半導体装置の製造方法 |
CN2007800521327A CN101627463B (zh) | 2007-03-13 | 2007-03-13 | 半导体装置和半导体装置的制造方法 |
PCT/JP2007/000212 WO2008111125A1 (ja) | 2007-03-13 | 2007-03-13 | 半導体装置および半導体装置の製造方法 |
US12/544,371 US8378489B2 (en) | 2007-03-13 | 2009-08-20 | Semiconductor device and manufacturing method therefor |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
PCT/JP2007/000212 WO2008111125A1 (ja) | 2007-03-13 | 2007-03-13 | 半導体装置および半導体装置の製造方法 |
Related Child Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US12/544,371 Continuation US8378489B2 (en) | 2007-03-13 | 2009-08-20 | Semiconductor device and manufacturing method therefor |
Publications (1)
Publication Number | Publication Date |
---|---|
WO2008111125A1 true WO2008111125A1 (ja) | 2008-09-18 |
Family
ID=39759076
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/JP2007/000212 WO2008111125A1 (ja) | 2007-03-13 | 2007-03-13 | 半導体装置および半導体装置の製造方法 |
Country Status (6)
Country | Link |
---|---|
US (1) | US8378489B2 (ja) |
EP (1) | EP2124250A4 (ja) |
JP (1) | JP5071474B2 (ja) |
KR (1) | KR101119649B1 (ja) |
CN (1) | CN101627463B (ja) |
WO (1) | WO2008111125A1 (ja) |
Families Citing this family (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP5476185B2 (ja) | 2010-03-31 | 2014-04-23 | ルネサスエレクトロニクス株式会社 | 半導体装置及び半導体装置の製造方法 |
JP5795221B2 (ja) * | 2011-09-26 | 2015-10-14 | 株式会社東芝 | パターン形成方法 |
JP6540361B2 (ja) | 2015-08-18 | 2019-07-10 | 富士通株式会社 | 半導体装置及びその製造方法 |
Citations (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2001207170A (ja) * | 2000-01-25 | 2001-07-31 | Nec Corp | 防食剤 |
WO2001071789A1 (fr) * | 2000-03-21 | 2001-09-27 | Wako Pure Chemical Industries, Ltd. | Agent de nettoyage de tranche de semi-conducteur et procede de nettoyage |
JP2001319913A (ja) * | 2000-03-03 | 2001-11-16 | Nec Corp | 防食処理原液 |
JP2002203857A (ja) * | 2000-12-27 | 2002-07-19 | Toshiba Corp | 半導体装置およびその製造方法 |
JP2006179599A (ja) * | 2004-12-21 | 2006-07-06 | Toshiba Corp | 半導体装置およびその製造方法 |
JP2006261268A (ja) * | 2005-03-16 | 2006-09-28 | Fujitsu Ltd | 半導体装置及びその製造方法 |
JP2006303179A (ja) | 2005-04-20 | 2006-11-02 | Fujitsu Ltd | 埋込導電体の形成方法 |
JP2006351877A (ja) * | 2005-06-16 | 2006-12-28 | Fujitsu Ltd | 積層体の製造方法、半導体デバイスおよび半導体デバイスの製造方法 |
Family Cites Families (18)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP3071484B2 (ja) * | 1991-03-29 | 2000-07-31 | サンスター技研株式会社 | 湿熱硬化性シーリング材組成物 |
US5750643A (en) * | 1993-05-18 | 1998-05-12 | Sri International | Dehydrocoupling treatment and hydrosilylation of silicon-containing polymers, and compounds and articles produced thereby |
JP3476283B2 (ja) * | 1995-08-17 | 2003-12-10 | 富士通株式会社 | 基板平坦化材料及びこれを用いた基板の平坦化方法 |
US6136680A (en) * | 2000-01-21 | 2000-10-24 | Taiwan Semiconductor Manufacturing Company | Methods to improve copper-fluorinated silica glass interconnects |
TWI229123B (en) * | 2000-03-03 | 2005-03-11 | Nec Electronics Corp | Anticorrosive treating concentrate |
JP3604007B2 (ja) * | 2000-03-29 | 2004-12-22 | 富士通株式会社 | 低誘電率被膜形成材料、及びそれを用いた被膜と半導体装置の製造方法 |
JP2001291720A (ja) * | 2000-04-05 | 2001-10-19 | Hitachi Ltd | 半導体集積回路装置および半導体集積回路装置の製造方法 |
TW523792B (en) * | 2000-09-07 | 2003-03-11 | Toshiba Corp | Semiconductor device and its manufacturing method |
JP4545973B2 (ja) * | 2001-03-23 | 2010-09-15 | 富士通株式会社 | シリコン系組成物、低誘電率膜、半導体装置および低誘電率膜の製造方法 |
JP3886779B2 (ja) * | 2001-11-02 | 2007-02-28 | 富士通株式会社 | 絶縁膜形成用材料及び絶縁膜の形成方法 |
JP4198438B2 (ja) * | 2002-10-24 | 2008-12-17 | 富士通マイクロエレクトロニクス株式会社 | 半導体装置の製造方法 |
US7187081B2 (en) * | 2003-01-29 | 2007-03-06 | International Business Machines Corporation | Polycarbosilane buried etch stops in interconnect structures |
JP4209212B2 (ja) * | 2003-01-30 | 2009-01-14 | Necエレクトロニクス株式会社 | 半導体装置の製造方法 |
US7081673B2 (en) * | 2003-04-17 | 2006-07-25 | International Business Machines Corporation | Multilayered cap barrier in microelectronic interconnect structures |
EP1615260A3 (en) * | 2004-07-09 | 2009-09-16 | JSR Corporation | Organic silicon-oxide-based film, composition and method for forming the same, and semiconductor device |
CN1787186A (zh) * | 2004-12-09 | 2006-06-14 | 富士通株式会社 | 半导体器件制造方法 |
US8405217B2 (en) | 2006-03-06 | 2013-03-26 | Alchimer | Coating method and solutions for enhanced electromigration resistance |
JP5380797B2 (ja) * | 2006-08-21 | 2014-01-08 | 富士通株式会社 | 半導体デバイスの製造方法 |
-
2007
- 2007-03-13 CN CN2007800521327A patent/CN101627463B/zh not_active Expired - Fee Related
- 2007-03-13 JP JP2009503757A patent/JP5071474B2/ja active Active
- 2007-03-13 EP EP07736871.0A patent/EP2124250A4/en not_active Withdrawn
- 2007-03-13 KR KR1020097019958A patent/KR101119649B1/ko active IP Right Grant
- 2007-03-13 WO PCT/JP2007/000212 patent/WO2008111125A1/ja active Application Filing
-
2009
- 2009-08-20 US US12/544,371 patent/US8378489B2/en active Active
Patent Citations (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2001207170A (ja) * | 2000-01-25 | 2001-07-31 | Nec Corp | 防食剤 |
JP2001319913A (ja) * | 2000-03-03 | 2001-11-16 | Nec Corp | 防食処理原液 |
WO2001071789A1 (fr) * | 2000-03-21 | 2001-09-27 | Wako Pure Chemical Industries, Ltd. | Agent de nettoyage de tranche de semi-conducteur et procede de nettoyage |
JP2002203857A (ja) * | 2000-12-27 | 2002-07-19 | Toshiba Corp | 半導体装置およびその製造方法 |
JP2006179599A (ja) * | 2004-12-21 | 2006-07-06 | Toshiba Corp | 半導体装置およびその製造方法 |
JP2006261268A (ja) * | 2005-03-16 | 2006-09-28 | Fujitsu Ltd | 半導体装置及びその製造方法 |
JP2006303179A (ja) | 2005-04-20 | 2006-11-02 | Fujitsu Ltd | 埋込導電体の形成方法 |
JP2006351877A (ja) * | 2005-06-16 | 2006-12-28 | Fujitsu Ltd | 積層体の製造方法、半導体デバイスおよび半導体デバイスの製造方法 |
Non-Patent Citations (1)
Title |
---|
See also references of EP2124250A4 |
Also Published As
Publication number | Publication date |
---|---|
CN101627463A (zh) | 2010-01-13 |
KR101119649B1 (ko) | 2012-03-14 |
EP2124250A1 (en) | 2009-11-25 |
KR20100005046A (ko) | 2010-01-13 |
US8378489B2 (en) | 2013-02-19 |
CN101627463B (zh) | 2012-05-30 |
US20090309221A1 (en) | 2009-12-17 |
JPWO2008111125A1 (ja) | 2010-06-24 |
EP2124250A4 (en) | 2014-06-25 |
JP5071474B2 (ja) | 2012-11-14 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
TW200741960A (en) | Seed layers, cap layers, and thin films and methods of making thereof | |
WO2010064185A3 (en) | Electronic devices having plastic substrates | |
WO2010009716A3 (de) | Strahlungsemittierende vorrichtung und verfahren zur herstellung einer strahlungsemittierenden vorrichtung | |
WO2011037938A3 (en) | A method for encapsulation of organic electronic devices | |
WO2008051503A3 (en) | Light-emitter-based devices with lattice-mismatched semiconductor structures | |
WO2009042028A3 (en) | Lanthanide dielectric with controlled interfaces | |
TW200746441A (en) | Manufacturing method of thin film transistor and thin film transistor, and display | |
WO2008058525A3 (de) | Verwendung einer koordinationsverbindung zur dotierung von organischen halbleitern | |
WO2011015265A3 (en) | Electronic devices comprising multi cyclic hydrocarbons | |
WO2012057517A3 (ko) | 화합물 반도체 장치 및 화합물 반도체 제조방법 | |
TWI366068B (en) | Hardmask composition for processing resist underlayer film, process for producing semiconductor integrated circuit device using the hardmask composition, and semiconductor integrated circuit device produced by the process | |
EP1845132B8 (en) | Silicon-containing film-forming composition, silicon-containing film, silicon-containing film-bearing substrate, and patterning method | |
EP2360701B8 (en) | Substrate for super-conductive film formation, super-conductive wire material, and method for producing the same | |
WO2008069930A3 (en) | Flexible substrates having a thin-film barrier | |
WO2010017558A3 (en) | Composite material compositions and methods | |
GB2461670B (en) | Process for preparing an electronic device | |
WO2008115530A3 (en) | Polymer composition for preparing electronic devices by microcontact printing processes and products prepared by the processes | |
DE602007000428D1 (de) | Siliciumhaltige, folienbildende Zusammensetzung, siliciumhaltige Folie, siliciumhaltiges, folientragendes Substrat und Strukturierungsverfahren | |
EP2377179A4 (en) | METHOD FOR PRODUCING A MULTILAYER THINNING LAYER BY PHASE SEPARATION OF AN ORGANIC SEMICONDUCTOR / INSULATING POLYMER AND ORGANIC THIN LAYER TRANSISTOR THEREWITH | |
GB2486352A (en) | Method of forming semiconductor film and photovoltaic device including the film | |
TW200729343A (en) | Method for fabricating controlled stress silicon nitride films | |
WO2008051552A3 (en) | Organic semiconductor materials and methods of preparing and use thereof | |
WO2011050015A3 (en) | Three-stage formation of thin-films for photovoltaic devices | |
WO2012071289A3 (en) | Semiconductor inks, films and processes for preparing coated substrates and photovoltaic devices | |
EP1537183A4 (en) | COATING MACHINE FOR THE PRODUCTION OF AN INSULATING FOIL, ITS USE FOR PRODUCING AN INSULATING FOIL, INSULATING FOIL FOR SEMICONDUCTOR DEVICE MANUFACTURED FROM THE SAME, AND SELF-CONTAINING SEMICONDUCTOR DEVICE |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
WWE | Wipo information: entry into national phase |
Ref document number: 200780052132.7 Country of ref document: CN |
|
121 | Ep: the epo has been informed by wipo that ep was designated in this application |
Ref document number: 07736871 Country of ref document: EP Kind code of ref document: A1 |
|
WWE | Wipo information: entry into national phase |
Ref document number: 2009503757 Country of ref document: JP |
|
REEP | Request for entry into the european phase |
Ref document number: 2007736871 Country of ref document: EP |
|
WWE | Wipo information: entry into national phase |
Ref document number: 2007736871 Country of ref document: EP |
|
NENP | Non-entry into the national phase |
Ref country code: DE |
|
WWE | Wipo information: entry into national phase |
Ref document number: 1020097019958 Country of ref document: KR |