WO2009014748A1 - Film forming method for a semiconductor - Google Patents

Film forming method for a semiconductor Download PDF

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Publication number
WO2009014748A1
WO2009014748A1 PCT/US2008/009044 US2008009044W WO2009014748A1 WO 2009014748 A1 WO2009014748 A1 WO 2009014748A1 US 2008009044 W US2008009044 W US 2008009044W WO 2009014748 A1 WO2009014748 A1 WO 2009014748A1
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WO
WIPO (PCT)
Prior art keywords
film
gas
plasma
sicn
semiconductor device
Prior art date
Application number
PCT/US2008/009044
Other languages
French (fr)
Inventor
Takaaki Matsuoka
Kohei Kawamura
Original Assignee
Tokyo Electron Limited
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tokyo Electron Limited filed Critical Tokyo Electron Limited
Priority to KR1020107001702A priority Critical patent/KR101139546B1/en
Priority to US12/452,784 priority patent/US8435882B2/en
Priority to CN2008801003283A priority patent/CN101765904B/en
Priority to JP2010518232A priority patent/JP5204229B2/en
Publication of WO2009014748A1 publication Critical patent/WO2009014748A1/en

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
    • H01L21/02167—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material being a silicon carbide not containing oxygen, e.g. SiC, SiC:H or silicon carbonitrides
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/02—Pretreatment of the material to be coated
    • C23C16/0272—Deposition of sub-layers, e.g. to promote the adhesion of the main coating
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/22—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the deposition of inorganic material, other than metallic material
    • C23C16/30—Deposition of compounds, mixtures or solid solutions, e.g. borides, carbides, nitrides
    • C23C16/36—Carbonitrides
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/44—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
    • C23C16/50—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating using electric discharges
    • C23C16/511—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating using electric discharges using microwave discharges
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    • H01L21/02118—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer carbon based polymeric organic or inorganic material, e.g. polyimides, poly cyclobutene or PVC
    • H01L21/0212—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer carbon based polymeric organic or inorganic material, e.g. polyimides, poly cyclobutene or PVC the material being fluoro carbon compounds, e.g.(CFx) n, (CHxFy) n or polytetrafluoroethylene
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    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
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    • H01L21/02107—Forming insulating materials on a substrate
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    • H01L21/022—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being a laminate, i.e. composed of sublayers, e.g. stacks of alternating high-k metal oxides
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    • H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/0226—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
    • H01L21/02263—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
    • H01L21/02271—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
    • H01L21/02274—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition in the presence of a plasma [PECVD]
    • H—ELECTRICITY
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    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/314—Inorganic layers
    • H01L21/3148—Silicon Carbide layers
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    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/314—Inorganic layers
    • H01L21/318—Inorganic layers composed of nitrides
    • H01L21/3185—Inorganic layers composed of nitrides of siliconnitrides
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    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H01L21/76822—Modification of the material of dielectric layers, e.g. grading, after-treatment to improve the stability of the layers, to increase their density etc.
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
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    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H01L21/76829—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers
    • H—ELECTRICITY
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    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
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    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02205—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition
    • H01L21/02208—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition the precursor containing a compound comprising Si
    • H01L21/02211—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition the precursor containing a compound comprising Si the compound being a silane, e.g. disilane, methylsilane or chlorosilane
    • H—ELECTRICITY
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    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
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    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02205—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition
    • H01L21/02208—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition the precursor containing a compound comprising Si
    • H01L21/02219—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition the precursor containing a compound comprising Si the compound comprising silicon and nitrogen
    • H01L21/02222—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition the precursor containing a compound comprising Si the compound comprising silicon and nitrogen the compound being a silazane

Abstract

The present invention may be a semiconductor device including of a fluorinated insulating film and a SiCN film deposited on the fluorinated insulating film directly, wherein a density of nitrogen in the SiCN film decreases from interface between the fluorinated insulating film and the SiCN film. In the present invention, the SiCN film that is highly fluorine-resistant near the interface with the CFx film and has a low dielectric constant as a whole can be formed as a hard mask.

Description

FILM FORMING METHOD FOR A SEMICONDUCTOR
TECHNICAL FIELD
[0001]
This application claims priority to U.S. Provisional Application Serial No. 60/961,942, filed on July 25, 2007, entitled "Method for Semiconductor Deposition", which is incorporated herein by reference in its entirety.
[0002]
The present invention relates to a method for forming a film on a substrate. The method is applicable to semiconductor devices, liquid crystal display devices, and organic EL elements.
BACKGROUND OF THE INVENTION
[0003]
In a manufacturing process for electronic devices, such as semiconductor devices, liquid crystal display devices, and organic electro-luminescent (EL) elements, a film forming process is performed to form a conductive film or an insulating film on the surface of a substrate. A plasma film forming process for forming a film on a substrate using a plasma is employed in this film forming process. In a case when forming a CF film on a substrate, and further forming an insulating film on the CF film in the film forming process, there has been a problem that the fluorine atom in the CF film diffuses in the insulating film, thereby the contactablity of the CF film and the insulating film decreases. Also, there has been a problem that the insulation film may peel off due to corrosion of the insulating film by the fluorine atom diffused in the insulating film when the CF film and the insulating film are heat treated at a subsequent film forming process.
[0004]
By the way, the above plasma film forming process is normally performed by a plasma film forming apparatus. In recent years, a microwave plasma film forming apparatus, which forms a film by generating a plasma by a microwave field, has been attracting attention as a type of plasma film forming apparatus. According to this microwave plasma film forming apparatus, high-density plasma compared to the conventional film forming apparatuss can be obtained, thereby the film forming process to the substrate can be performed effectively in a short time.
[0005]
The microwave plasma film forming apparatus described above is provided with, for example, a placing base to place a substrate inside a treatment vessel. And on the upper portion of the treatment vessel, provided are radial line slot antennas, and a shower plate to pass through the microwave from the radial line antennas that supply gas. Further, the microwave plasma film forming apparatus employs a supply material gas for film from the wall surface of the treatment vessel.
[0006]
As a plasma processing method for forming a film using the microwave plasma film forming apparatus, for example, the following has been known. For example, Japanese Published Unexamined Patent Application No. 2005-093737 discloses a plasma processing method for forming a film on a substrate which is capable of forming a high quality film with a low temperature in a short time by optimizing the amounts of radicals and ions supplied to the substrate. Also, Japanese Published Unexamined Application No. 2006-324023 discloses a plasma film forming device capable of minimizing deformation or distortion of the shower plate by maintaining the temperature of the shower plate to a desired temperature, and improving the uniformity of an in-plane temperature of the shower plate.
[0007]
Also, Japanese Published Unexamined Patent Application No. 2005-150612 discloses a plasma film forming apparatus which prevents the gas for plasma excitation from plasmanizing before it is supplied to the treatment vessel, and appropriately generates a plasma within the area of a high-frequency wave supplying side, that is, a plasma generating area. Further, International Published Unexamined Patent Application No. 2000-74127 discloses a plasma process apparatus capable of maintaining the stability of the plasma regardless of the type of gas used for the process because there is no film attachment on the surface of the dielectric shower plate of the microwave introduction part due to dissociation or binding of the gas for processing.
[0008]
However, by using any of the methods described in the documents above, improvement in the heat resistance of the film formed on the substrate, or prevention of the excessive disassociation of the film could not be achieved sufficiently. As a result, there has been a problem with a deterioration in the contactablity between the films formed on the substrate. Also, with respect to the film formed on the substrate, there has been a demand for the characteristics capable of functioning in various conditions. Further, with respect to manufacturing costs, omission of a manufacturing process and reduction of the material cost has been desired. SUMMARY OF THE INVENTION
[0009]
One aspect of the present invention is a semiconductor device including of a fluorinated insulating film and a SiCN film deposited on the fluorinated insulating film directly, wherein a density of nitrogen in the SiCN film decreases from interface between the fluorinated insulating film and the SiCN film.
[0010]
The density of nitrogen may decrease gradually. The SiCN film may be produced by reacting a plasma gas in a container separated into a plurality of areas. The SiCN film may be produced by adjusting a flow ratio of gas into the plurality of areas.
[0011]
The flow ratio of forming an interior of the SiCN film may be different from the flow ratio of forming an exterior of the SiCN film. The container may include an upper area and a lower area, and the amount of gas flowing into the upper area may be greater than the amount of gas flowing into the lower area when forming the exterior of the SiCN film.
[0012]
The container may include an upper area and a lower area, and the amount of gas flowing into the lower area may be greater than the amount of gas flowing into the upper area when forming the interior of the SiCN film. An addictive gas may be flowed into the upper area and a material gas may be flowed into the lower area. The flow ratio of gas may be adjusted with time.
[0013]
In the present invention, the SiCN film that is highly fluorine-resistant near the interface with the CFx film and has a low dielectric constant as a whole can be formed as a hard mask.
[0014]
In a case when the method described above is used for further forming a film on the film formed on the substrate, thus excessive disassociation of the film can be prevented. When the film is excessively disassociated, it becomes an etching species and is unable to contribute to film forming. When excessive disassociation of the film can be prevented, the film becomes a forming species, thereby the contactability between the films can be improved. Also, the film formed by using the method described above significantly improves heat resistance (allowable temperature limit).
[0015]
Further, by using the method described above, a film with various characteristics can be formed. Also, by using the method described above, a film having various constitutional components can be formed. Thus, the characteristics of the film and the constitutional components can be controlled.
[0016]
Further, in a case when the same type of gases are used in the method described above, the conditions of disassociation for both are different. As a result, the gas components, if different types of gases are utilized, may coexist in the area. Therefore, low-cost gases may be utilized instead of high cost gases. And, the film with a construction similar to that of the film formed by using high-cost gas, can be formed.
[0017]
By adjusting the flow ratio of gases with time by utilizing the method described above, a film with more characteristics and a film having more constitutional components can be formed. Thereby the characteristics of the film and the constitutional components of the film can be controlled more effectively. Also, the manufacturing cost can be reduced by utilizing a low-cost material instead of a high-cost material.
[0018]
By using the method described above to change the flow ratio of gases, the film superficial composition and interior composition can be changed. For example, when the film superficial structure is high in dielectric constant and mechanical strength, however, it may be configured to a structure relatively low in mechanical strength and low in dielectric constant. Further, in order to increase the mechanical strength or the thermal strength of the film, a post film forming process called cure is generally used for a Low k material, however, such a process can be eliminated by using the method described above.
BRIEF DESCRIPTION OF THE DRAWINGS
[0019]
FIGS. 1 and 2 are diagrams showing a structure of a microwave plasma processing apparatus according to a first embodiment of the present invention.
FIG. 3 is a perspective view showing a structure of a process gas supply mechanism of the microwave plasma processing apparatus of FIG. 1 and 2.
FIG. 4 is a bottom view showing a disk-like conductive body constituting a portion of the process gas supply mechanism in FIG. 3.
DETAILED DESCRIPTION OF THE INVENTION
[0020]
A CVD apparatus for generating a plasma using RLSA is hereinafter explained. FIGS. 1 and 2 are diagrams showing a construction of a microwave plasma processing apparatus 10 according to a first embodiment of the present invention.
[0021]
Referring to FIG. 1, the microwave plasma processing apparatus 10 includes a processing vessel 11 and a stage 13 provided in the processing vessel 11 for holding a substrate 12 to be processed by an electrostatic chuck, wherein the stage 13 is preferably formed of AlN or Al2O3 by a hot isostatic pressing (HIP) process. In the processing vessel 11 , there are formed at least two or preferably more than or equal to three evacuation ports H lA in a space HA surrounding the stage 13 with an equal distance, and hence with an axial symmetry with respect to the substrate 12 on the stage 13. The processing vessel 11 is evacuated to a low pressure via the evacuation port 11 IA by a gradational lead screw pump to be explained later.
[0022]
The processing vessel 11 is preferably formed of an austenite stainless steel containing Al, and there is formed a protective film of aluminum oxide on the inner wall surface by an oxidizing process. Further, there is formed a disk-like shower plate 14 of dense Al2O3, formed by a HIP process, in the part of the outer wall of the processing vessel 11 corresponding to the substrate 12 as a part of the outer wall, wherein the shower plate 14 includes a large number of nozzle apertures 14 A. The Al2O3 shower plate 14 thus formed by a HIP process is formed by using an Y2O3 additive and has porosity of 0.03% or less. This means that the Al2O3 shower plate is substantially free from pores or pinholes and has a very large, while not so large as that of AlN, thermal conductivity for a ceramic of 30 W/mK.
[0023]
The shower plate 14 is mounted on the processing vessel 11 via a seal ring HlS, and a cover plate 15 of dense Al2O3 formed also of an HIP process is provided on the shower plate 14 via a seal ring HIT. The shower plate 14 is formed with a depression 14B communicating with each of the nozzle apertures 14A that serve as the plasma passage, at the side thereof contacting with the cover plate 15, wherein the depression 14B also communicates with another plasma passage 14C formed in the interior of the shower plate 14 in communication with a plasma inlet H IP formed on the outer wall of the processing vessel 11.
[0024]
The shower plate 14 is held by an extending part lip formed on the inner wall of the processing vessel 11, wherein the extending part 11 IB is formed with a round surface at the part holding the shower plate 14 so as to suppress an electric discharge.
[0025]
Thus, a plasma such as Ar or Kr supplied to the plasma inlet H IP is supplied to a space HB right underneath the shower plate 14 uniformly via the apertures 14A after being passed through the passages 14C and 14B in the shower plate 14.
[0026]
On the cover plate 15, there is provided a radial line slot antenna 20 formed of a disk-like slot plate 16 formed with a number of slots 16A and 16B shown in FIG. 2 in intimate contact with the cover plate 15, a disk-like antenna body 17 holding the slot plate 16, and a retardation plate 18 of a dielectric material of low loss such as Al2O3, SiO2 or Si3N4 sandwiched between the slot plate 16 and the antenna body 17. The radial line slot antenna 20 is mounted on the processing vessel 11 by way of a seal ring 11 IU, and a microwave of 2.45 GHz or 8.3 GHz frequency is fed to the radial line slot antenna 20 from an external microwave source (not shown) via a coaxial waveguide 21. The microwave thus supplied is radiated into the interior of the processing vessel from the slots 16A and 16B on the slot plate 16 via the cover plate 15 and the shower plate 14. Thereby, the microwave causes excitation of plasma in the plasma supplied from the apertures 14A in the space HB right underneath the shower plate 14. It should be noted that the cover plate 15 and the shower plate 14 are formed Of Al2O3 and function as an efficient microwave-transmitting window. In order to avoid plasma excitation in the plasma passages 14A-14C, the plasma is held at the pressure of about 6666 Pa- 13332 Pa (about 50-100 Torr) in the foregoing passages 14A-14C.
[0027]
In order to improve intimate contact between the radial line slot antenna 20 and the cover plate 15, the microwave plasma processing apparatus 10 of the present embodiment has a ring-shaped groove on a part of the processing vessel 11 so as to engage with the slot plate 16. By evacuating the groove via an evacuation port HG communicating therewith, the pressure in the gap formed between the slot plate 16 and the cover plate 15 is reduced and the radial line slot antenna 20 is urged firmly upon the cover plate 15 by the atmospheric pressure. It should be noted that such a gap includes not only the slots 16A and 16B formed in the slot plate 16 but also a gap formed by other various reasons. It should be noted further that such a gap is sealed by the seal ring H lU provided between the radial line slot antenna 20 and the processing vessel 11.
[0028]
By filling the gap between the slot plate 16 and the cover plate 15 with an inert gas of small molecular weight via the evacuation port HG and the groove H lQ heat transfer from the cover plate 15 to the slot plate 16 is facilitated. Thereby, it is preferable to use He for such an inert gas in view of the large thermal conductivity and the large ionization energy. In a case when the gap is filled with He, it is preferable to set the pressure to about 0.8 atm. In the construction of FIG. 1, there is provided a valve 11 V on the evacuation port HG for the evacuation of the groove 11 IG and filling of the inert gas into the groove 11 IG.
[0029]
It should be noted that an outer waveguide tube of the coaxial waveguide 21 A is connected to the disk-like antenna body 17 while a central conductor 21B is connected to the slot plate 16 via an opening formed in the retardation plate 18. Thus, the microwave fed to the coaxial waveguide 21 A is propagated in the radial direction between the antenna body 17 and the slot plate 16 and is emitted from the slots 16A and 16B.
[0030]
FIG 2 shows the slots 16A and 16B formed on the slot plate 16. Referring to FIG 2, the slots 16A are arranged in a concentric manner such that there is provided a slot 16B for each slot 16A such that the slot 16B crosses the slot 16A perpendicularly and such that the slot 16B is aligned concentrically with the slot 16A. The slots 16A and 16B are formed with an interval corresponding to the wavelength of the microwave compressed by the radiation plate 18 in the radial direction of the slot plate 16, and as a result, the microwave is radiated from the slot plate 16 in the form of a near plane wave. Because the slots 16A and the slots 16B are formed in the mutually perpendicular relationship, the microwave thus radiated forms a circularly polarized wave including two perpendicular polarization components.
[0031]
In the plasma processing apparatus 10 of FIG. 1, there is provided a coolant block 19 formed with a coolant water passage 19A on the antenna body 17, and the heat accumulated in the shower plate 14 is absorbed via the radial line slot antenna 20 by cooling the coolant block 19 by the coolant water in the coolant water passage 19A. The coolant water passage 19A is formed on the coolant block 19 in a spiral form, and coolant water having a controlled oxidation-reduction potential is supplied thereto, wherein the control of the oxidation reduction potential is achieved by eliminating oxygen dissolved in the coolant water by way of bubbling of an H2 gas.
[0032]
In the microwave plasma processing apparatus 10 of FIG. 1, there is further provided a process gas supply mechanism 31 in the processing vessel 11 between the shower plate 14 and the substrate 12 on the stage 13, wherein the process gas supply mechanism 31 has gas passages 31 A arranged in a lattice shape and releases a process gas supplied from a process gas inlet port H lR provided on the outer wall of the processing vessel 11 through a large number of process gas nozzle apertures. Thereby, desired uniform substrate processing is achieved in a space HC between the process gas supply structure 31 and the substrate 12. Such substrate processing includes plasma oxidation processing, plasma nitridation processing, plasma oxynitridation processing, and plasma CVD processing. Further, it is possible to conduct a reactive ion etching of the substrate 12 by supplying a readily decomposing fluorocarbon gas such as C4F8, C5F8 or C4F6 or an etching gas containing F or Cl and further by applying a high-frequency voltage to the stage 13 from a high-frequency power source 13 A.
[0033]
In the microwave plasma processing apparatus 10 of the present embodiment, it is possible to avoid deposition of reaction byproducts on the inner wall of the processing vessel by heating the outer wall of the processing vessel 11 to a temperature of about 150°C. Thereby, the microwave plasma processing apparatus 10 can be operated constantly and with reliability, by merely conducing a dry cleaning process once a day or so.
[0034]
FIG. 3 is a bottom view showing a structure of the process gas supply mechanism 31 of FIG. 1. Referring to FIG. 3, the process gas supply mechanism 31 is formed in a stack of disk-like conductive members 311 and 312 such as an Al alloy containing Mg or a stainless steel added with Al. There is provided apertures 3 IA disposed in a matrix form to serve for a plasma passage. For example, the aperture 31 A has a size of 19 mm X 19 mm and is provided iteratively at a pitch of 24 mm both in the row direction and in the column direction. The process gas supply mechanism 31 has a total thickness of about 8.5 mm and is typically mounted with a separation of about 16 mm from the surface of the substrate 12.
[0035] FIG. 4 is a bottom diagram showing a structure of the disk-like conductive member 311 in FIG 3. Referring to FIG. 4, in the disk-like conductive member 311, there is provided a lattice-shaped process gas passage 3 IB in communication with the process gas supply passage 31C formed along an outer circumference of the disk-like conductive member 311 represented by a broken line in FIG. 4. The process gas supply passage 31C is connected to the process gas inlet port HlR. In the opposite surface of the disk-like conductive member 311, there are formed a large number of process gas nozzle apertures 3 ID in communication with the process gas passage 3 IB. The process gas is released from the process gas nozzle apertures 3 ID to the disk-like conductive member 312.
[0036]
The embodiment in which the microwave plasma processing apparatus 10 according to the present invention is used to form a film on a substrate is described a little more by taking a specific example. In the present invention, by changing flow ratios of gases to be introduced into the space HB and space HC in the microwave plasma processing apparatus 10, films having different molecular composition ratios can be laminated. For example, if trimethylsilane and nitrogen gas are introduced into both of the space HB and space HC, a SiCN hard mask is formed on the substrate; however, in this case, if the flow ratios in the space HB and space HC are changed between the time of film formation for an interface region and that for a film region, the SiCN film of which a molecular composition ratio is different between the interface and film regions can be formed.
[0037]
Typically, a CFx film or the like is laminated on the substrate, onto which a SiCN film is laminated; however, for example, when the lamination of the SiCN film onto the CFx film is started (at the time of film formation for the interface region), a flow rate to the space HB is made larger than that to the space HC, whereas at the time of film formation for the film region, the flow rate to the space HC is made larger than that to the space HB. Configuring in this manner allows percentages of Si-N bonds and Si-C bonds to be increased near the interface and in the film, respectively, as compared with the case of the film formation at a flow ratio of 1 : 1. Near the interface of the CFx film, to increase adhesiveness between the CFx and SiCN films, the SiCN film having high fluorine-resistance is preferable. The SiCN film having a large percentage of Si-N bonds is a highly fluorine-resistant film, and therefore it is preferable to form the film through the above processing. On the other hand, the SiCN having the large percentage of Si-N bonds has a larger dielectric constant as compared with the SiCN film having a large percentage of Si-C bonds. Accordingly, in a region other than the near-interface region, i.e., in the film region, the SiCN film having the large percentage of Si-C bonds is preferable, and therefore it is preferable to form the film through the above processing. By employing such method, the SiCN film that is highly fluorine-resistant near the interface with the CFx film and has a low dielectric constant as a whole can be formed as a hard mask.
[0038]
The gases to be introduced into the above-described space HB and space HC are not particularly limited as described above, but any type of gas can be introduced. Typically, into the space HB, gas such as argon (Ar), nitrogen gas (N2), ammonia gas (NH3), or hydrogen gas can be introduced, whereas, into the space HC, a gas mixture of trimethylsilane and nitrogen gas, silane, disilane, methylsilane (such as monomethylsilane, dimethylsilane, trimethylsilane, or tetramethylsilane), silazane (such as methylsilazane or ethylsilazane), or the like can be introduced. If it is desired to form the SiCN film onto the substrate, argon gas and a gas mixture of trimethylsilane and nitrogen gas are preferably introduced into the space HB and space HC, respectively. On the other hand, if it is desired to form the SiC film onto the substrate, argon gas and trimethylsilane are preferably introduced into the space HB and space 11 C, respectively. Further, if it is desired to form a SiN film onto the substrate, argon gas, and silane or disilane are preferably introduced into the space HB and space HC, respectively. Also, even if nitrogen gas and trimethylsilane are respectively introduced into the space HB and space 11C, the SiCN film can be formed.
[0039]
Even if the SiCN, SiC, or SiN film is formed on the basis of a corresponding one of the above methods, by changing the gas flow ratios in the space 1 IB and space 11C, the films having different molecular composition ratios can be formed. Note that the term "dissociation" is used above, however, this does not mean that film components in a formed film are dissociated, but means that gases having been introduced into the space HB or space HC are brought into the dissociated condition upon reaction of the gases, under which the film is formed on the basis of the reaction.
[0040]
One embodiment of the present invention is explained above, however, the present invention is not limited to the above specific example. For example, a film is formed on a substrate, however, the method for forming a film according to the present invention may be applied for forming other films, such as an electrode film. Also, other gases, such as xenon gas, or krypton gas, may be utilized as the gas supplied from the shower plate 14. Further, the method for forming a film according to the present invention can be applied not only to the substrate of the semiconductor device, but also, for example, to the substrates for manufacturing liquid crystal display devices or organic EL elements. [0041]
The substrate processing related to the present invention includes, for example, plasma oxidation processing, plasma nitridation processing, plasma oxynitridation processing, plasma CVD processing, and the like. The microwave plasma processing apparatus 10 according to the present embodiment can avoid the deposition of the reaction byproducts and the like onto the inner wall of the above-described processing vessel 11 by heating the outer wall of the treatment vessel at a temperature of approximately 150 °C, and can be constantly stably operated by dry cleaning around once a day.

Claims

CLAIMSWhat is claimed is:
1. A semiconductor device, comprising of: a fluorinated insulating film; and a SiCN film deposited on the fluorinated insulating film directly, wherein a density of nitrogen in the SiCN film decreases from interface between the fluorinated insulating film and the SiCN film.
2. The semiconductor device of claim 1, wherein the density of nitrogen decreases gradually.
3. The semiconductor device of claim 1, wherein the SiCN film is produced by reacting a plasma gas in a container separated into a plurality of areas.
4. The semiconductor device of claim 3, wherein the SiCN film is produced by adjusting a flow ratio of gas into the plurality of areas.
5. The semiconductor device of claim 4, wherein the flow ratio of forming an interior of the SiCN film is different from the flow ratio of forming an exterior of the SiCN film.
6. The semiconductor device of claim 5, wherein the container includes an upper area and a lower area, and the amount of gas flowing into the upper area is greater than the amount of gas flowing into the lower area when forming the exterior of the SiCN film.
7. The semiconductor device of claim 5, wherein the container includes an upper area and a lower area, and the amount of gas flowing into the lower area is greater than the amount of gas flowing into the upper area when forming the interior of the SiCN film.
8. The semiconductor device of claim 6, wherein an addictive gas is flowed into the upper area and a material gas is flowed into the lower area.
9. The semiconductor device of claim 4, wherein the flow ratio of gas is adjusted with time.
PCT/US2008/009044 2007-07-25 2008-07-24 Film forming method for a semiconductor WO2009014748A1 (en)

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Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3384795B2 (en) * 1999-05-26 2003-03-10 忠弘 大見 Plasma process equipment
US8962454B2 (en) 2010-11-04 2015-02-24 Tokyo Electron Limited Method of depositing dielectric films using microwave plasma
US9543123B2 (en) * 2011-03-31 2017-01-10 Tokyo Electronics Limited Plasma processing apparatus and plasma generation antenna
JP6046351B2 (en) * 2012-01-19 2016-12-14 日新電機株式会社 Insulating film and manufacturing method thereof
US9431235B1 (en) 2015-04-24 2016-08-30 International Business Machines Corporation Multilayer dielectric structures with graded composition for nano-scale semiconductor devices
KR102616489B1 (en) 2016-10-11 2023-12-20 삼성전자주식회사 Method for fabricating semiconductor device
US11149350B2 (en) * 2018-01-10 2021-10-19 Asm Ip Holding B.V. Shower plate structure for supplying carrier and dry gas

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2005064302A (en) * 2003-08-15 2005-03-10 Tokyo Electron Ltd Film forming method, semiconductor device, manufacturing method thereof and substrate processing system
JP2005223360A (en) * 1999-03-09 2005-08-18 Tokyo Electron Ltd Manufacturing method of semiconductor device
JP2006128591A (en) * 2004-01-13 2006-05-18 Tokyo Electron Ltd Method for manufacturing semiconductor device and film-forming system

Family Cites Families (27)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2000074127A (en) 1998-08-26 2000-03-07 Bridgestone Corp Vibration isolating device
KR100407542B1 (en) * 1999-03-09 2003-11-28 동경 엘렉트론 주식회사 Semiconductor device and production method therefor
JP3384795B2 (en) 1999-05-26 2003-03-10 忠弘 大見 Plasma process equipment
JP2001284340A (en) * 2000-03-30 2001-10-12 Hitachi Kokusai Electric Inc Apparatus and method for manufacturing semiconductor device
US6458718B1 (en) * 2000-04-28 2002-10-01 Asm Japan K.K. Fluorine-containing materials and processes
US6657284B1 (en) * 2000-12-01 2003-12-02 Taiwan Semiconductor Manufacturing Co., Ltd. Graded dielectric layer and method for fabrication thereof
JP4727057B2 (en) * 2001-03-28 2011-07-20 忠弘 大見 Plasma processing equipment
JP4257051B2 (en) * 2001-08-10 2009-04-22 株式会社ルネサステクノロジ Manufacturing method of semiconductor integrated circuit device
DE10238024B4 (en) * 2002-08-20 2007-03-08 Infineon Technologies Ag Method for integrating air as a dielectric in semiconductor devices
JP4454242B2 (en) * 2003-03-25 2010-04-21 株式会社ルネサステクノロジ Semiconductor device and manufacturing method thereof
KR101162377B1 (en) * 2003-03-28 2012-07-09 도요 세이칸 가부시키가이샤 Chemical vapor deposition film formed by plasma cvd process and method for forming same
US7144803B2 (en) * 2003-04-17 2006-12-05 Semiconductor Research Corporation Methods of forming boron carbo-nitride layers for integrated circuit devices
JP3940095B2 (en) * 2003-05-08 2007-07-04 忠弘 大見 Substrate processing equipment
JP2005093737A (en) 2003-09-17 2005-04-07 Tadahiro Omi Plasma film forming device, plasma film forming method, method of manufacturing semiconductor device, liquid crystal display device, and organic el element
JP4393844B2 (en) 2003-11-19 2010-01-06 東京エレクトロン株式会社 Plasma film forming apparatus and plasma film forming method
CN100433294C (en) * 2004-01-13 2008-11-12 东京毅力科创株式会社 Method for manufacturing semiconductor device and film-forming system
JP2005213633A (en) * 2004-02-02 2005-08-11 L'air Liquide Sa Pour L'etude & L'exploitation Des Procede S Georges Claude Production method for silicon nitride film or silicon oxynitride film by chemical vapor deposition method
US7033940B1 (en) * 2004-03-30 2006-04-25 Advanced Micro Devices, Inc. Method of forming composite barrier layers with controlled copper interface surface roughness
US20050250346A1 (en) * 2004-05-06 2005-11-10 Applied Materials, Inc. Process and apparatus for post deposition treatment of low k dielectric materials
JP4555143B2 (en) * 2004-05-11 2010-09-29 東京エレクトロン株式会社 Substrate processing method
US7776736B2 (en) * 2004-05-11 2010-08-17 Tokyo Electron Limited Substrate for electronic device capable of suppressing fluorine atoms exposed at the surface of insulating film from reacting with water and method for processing same
US7456093B2 (en) * 2004-07-03 2008-11-25 Taiwan Semiconductor Manufacturing Co., Ltd. Method for improving a semiconductor device delamination resistance
JP2006073569A (en) * 2004-08-31 2006-03-16 Matsushita Electric Ind Co Ltd Semiconductor apparatus and its manufacturing method
JP4664119B2 (en) 2005-05-17 2011-04-06 東京エレクトロン株式会社 Plasma processing equipment
US7972910B2 (en) * 2005-06-03 2011-07-05 Semiconductor Energy Laboratory Co., Ltd. Manufacturing method of integrated circuit device including thin film transistor
JP4993607B2 (en) * 2005-06-20 2012-08-08 国立大学法人東北大学 Interlayer insulating film and wiring structure, and manufacturing method thereof
US7915166B1 (en) * 2007-02-22 2011-03-29 Novellus Systems, Inc. Diffusion barrier and etch stop films

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2005223360A (en) * 1999-03-09 2005-08-18 Tokyo Electron Ltd Manufacturing method of semiconductor device
JP2005064302A (en) * 2003-08-15 2005-03-10 Tokyo Electron Ltd Film forming method, semiconductor device, manufacturing method thereof and substrate processing system
JP2006128591A (en) * 2004-01-13 2006-05-18 Tokyo Electron Ltd Method for manufacturing semiconductor device and film-forming system

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