WO2009014953A1 - Thin semiconductor die packages and associated systems and methods - Google Patents

Thin semiconductor die packages and associated systems and methods Download PDF

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Publication number
WO2009014953A1
WO2009014953A1 PCT/US2008/070165 US2008070165W WO2009014953A1 WO 2009014953 A1 WO2009014953 A1 WO 2009014953A1 US 2008070165 W US2008070165 W US 2008070165W WO 2009014953 A1 WO2009014953 A1 WO 2009014953A1
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WIPO (PCT)
Prior art keywords
semiconductor die
cover
conductive
attaching
adhesive
Prior art date
Application number
PCT/US2008/070165
Other languages
French (fr)
Inventor
Swee Kwang Chua
Original Assignee
Micro Technology, Inc.
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Micro Technology, Inc. filed Critical Micro Technology, Inc.
Publication of WO2009014953A1 publication Critical patent/WO2009014953A1/en

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144—Devices controlled by radiation
    • H01L27/146—Imager structures
    • H01L27/14601—Structural or functional details thereof
    • H01L27/14618—Containers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42—Wire connectors; Manufacturing methods related thereto
    • H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/73—Means for bonding being of different types provided for in two or more of groups H01L24/10, H01L24/18, H01L24/26, H01L24/34, H01L24/42, H01L24/50, H01L24/63, H01L24/71
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
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    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/02—Details
    • H01L31/0203—Containers; Encapsulations, e.g. encapsulation of photodiodes
    • H—ELECTRICITY
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    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
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    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • H—ELECTRICITY
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    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484—Connecting portions
    • H—ELECTRICITY
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    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73257—Bump and wire connectors
    • H—ELECTRICITY
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    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • H01L2224/85909—Post-treatment of the connector or wire bonding area
    • H01L2224/8592—Applying permanent coating, e.g. protective coating
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144—Devices controlled by radiation
    • H01L27/146—Imager structures
    • H01L27/14683—Processes or apparatus peculiar to the manufacture or treatment of these devices or parts thereof
    • H—ELECTRICITY
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    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01014—Silicon [Si]
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    • H01L2924/01—Chemical elements
    • H01L2924/01033—Arsenic [As]
    • H—ELECTRICITY
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    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01082—Lead [Pb]
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    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/013—Alloys
    • H01L2924/014—Solder alloys
    • H—ELECTRICITY
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    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/14—Integrated circuits
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    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/161—Cap
    • H01L2924/1615—Shape
    • H01L2924/16195—Flat cap [not enclosing an internal cavity]
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    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation
    • H—ELECTRICITY
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    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation
    • H01L2924/1815—Shape
    • H01L2924/1816—Exposing the passive side of the semiconductor or solid-state body
    • H01L2924/18165—Exposing the passive side of the semiconductor or solid-state body of a wire bonded chip
    • H—ELECTRICITY
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    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30—Technical effects
    • H01L2924/35—Mechanical effects
    • H01L2924/351—Thermal stress

Definitions

  • the present disclosure is directed generally to thin semiconductor die packages and associated systems and methods, including packages with covers having recesses that receive wirebonds or other conductive couplers, and packages formed with temporary support members.
  • Packaged semiconductor dies typically include a semiconductor die mounted to a substrate and encased in a plastic protective covering.
  • the die includes functional features, such as memory cells, processor circuits, imager devices, and interconnecting circuitry.
  • the die also typically includes bond pads electrically coupled to the functional features.
  • the bond pads are electrically connected to pins or other types of terminals that extend outside the protective covering for connecting the die to busses, circuits, and/or other microelectronic assemblies.
  • the die is mounted to a supporting substrate (e.g., a printed circuit board), and the die bond pads are electrically coupled to corresponding bond pads of the substrate with wirebonds.
  • the substrate can be electrically connected to external devices with solder balls or other suitable connections. Accordingly, the substrate both supports the die and provides an electrical link between the die and the external devices.
  • the die can be mounted to a leadframe that has conductive leadfingers connected to a removable frame. The frame temporarily supports the leadf ⁇ ngers in position relative to the die during manufacture. Each leadfinger is wirebonded to a corresponding bond pad of the die, and the assembly is encapsulated in such a way that the frame and a portion of each of the leadfingers extends outside the encapsulating material. The frame is then trimmed off, and the exposed portions of each leadfinger can be used to provide connections between the die and external devices.
  • Figure IA is a partially schematic, cross-sectional illustration of a package 50a configured in accordance with the prior art.
  • the package 50a includes a die 10 that has an upwardly facing imager 11 and is supported from below by an insulating (e.g., ceramic) base 27.
  • Leadfingers 23a are positioned around all four sides of the die 10 in a "quad flat no lead” (QFN) configuration, and are connected to the die 10 with wirebonds 40.
  • Insulating standoffs 3 form a cavity 4 in which the die 10 is positioned, and support a glass window 30 over the imager 11.
  • the window 30 provides a hermetically sealed package that transmits visible light to the imager 11.
  • Figure IB illustrates another package 50b configured in accordance with the prior art.
  • the die 10 is carried by leads 23b.
  • the glass window 30 is attached to the die 10 with an adhesive 31, and an encapsulant 41 is disposed over a portion of the die 10, the leads 23b, and the wirebonds 40 to protect these components.
  • Both arrangements for the packages 50a, 50b are suitable for installations in digital cameras, sensors, and/or other such devices. While the arrangements shown in Figure 1A-1B have proven suitable for many applications, there remains a need to still further reduce the size of the package and the costs associated with manufacturing the package.
  • Figures IA- IB are partially schematic, cross-sectional illustrations of packages configured in accordance with the prior art.
  • Figure 2 is a partially schematic, isometric illustration of a system that includes a package having a cover configured in accordance with an embodiment of the disclosure.
  • Figure 3 is a partially schematic, cross-sectional illustration of an embodiment of the package shown in Figure 2.
  • Figure 4A is a partially schematic, top plan view of a conductive structure configured in accordance with an embodiment of the disclosure.
  • Figure 4B illustrates a conductive structure connected to a removable support member in accordance with an embodiment of the disclosure.
  • Figure 4C illustrates the arrangement shown in Figure 4B, with a semiconductor die attached to the removable support member in accordance with an embodiment of the disclosure.
  • Figure 5 is a partially schematic, top plan view of a cover having a recess configured in accordance with an embodiment of the disclosure.
  • Figure 6A is a partially schematic, cross-sectional side view of a cover positioned to be attached to a semiconductor die in accordance with an embodiment of the disclosure.
  • Figure 6B is a partially schematic, cross-sectional side view of a cover positioned to be attached to a semiconductor die in accordance with another embodiment of the disclosure.
  • Figure 7A illustrates a process for removing a releasable support member from a die and a conductive structure in accordance with an embodiment of the disclosure.
  • Figure 7B illustrates a process for removing portions of a conductive structure and (optionally) a cover in accordance with multiple embodiments of the disclosure.
  • Figure 8 is a schematic illustration of a system that can include one or more packages configured in accordance with several embodiments of the disclosure.
  • semiconductor die is used throughout to include a variety of articles of manufacture, including, for example, individual integrated circuit dies, imager dies, sensor dies, and/or dies having other semiconductor features. Many specific details of certain embodiments are set forth in Figures 2-8 and the following text to provide a through understanding of these embodiments. Several other embodiments can have different configurations, components, and/or processes than those described in this disclosure. A person skilled in the relevant art, therefore, will appreciate that additional embodiments may be practiced without several details of the embodiments shown in Figures 2-8, and/or with additional details and/or features.
  • Figure 2 is a partially schematic, isometric illustration of a system 200 that includes a semiconductor package 201 configured in accordance with an embodiment of the disclosure.
  • the semiconductor package 201 can include a semiconductor die 210 having a sensor and/or transmitter (referred to as a sensor/transmitter 211) that receives and/or transmits radiation.
  • the sensor/transmitter 211 can include an imager device suitable for use in digital cameras, cell phones, and other applications.
  • a conductive structure 220 can be positioned proximate to the semiconductor die 210 to transmit signals to and from the semiconductor die 210.
  • the conductive structure 220 includes leadfingers 223 positioned around a periphery of the semiconductor die 210.
  • Conductive couplers 240 e.g., wirebonds
  • a cover 230 is positioned adjacent to the semiconductor die 210 and the conductive structure 220, and can be secured to the semiconductor die 210 and the conductive structure 220 with an adhesive 231.
  • the cover 230 can be transparent or at least partially transparent to radiation that is received or transmitted by the sensor/transmitter 211. Accordingly, the cover 230 can protect the components within the package 201, while providing little or no interference with the operation of the sensor/transmitter 211.
  • Figure 3 is a partially schematic, cross-sectional illustration of an embodiment of the semiconductor package 201 shown in Figure 2. As shown in Figure 3, the semiconductor die 210 can have a first (e.g., upwardly facing) surface 213 and a second (e.g., downwardly facing) surface 214.
  • the sensor/transmitter 211 can be located at the first surface 213, which can also carry the die bond sites 215 for transmitting electrical signals to and from the semiconductor die 210.
  • the adjacent leadfingers 223 of the conductive structure 220 can include first bond sites 225 positioned adjacent to the die bond sites 215, and second bond sites 226 that are accessible from a region outside the semiconductor package 201.
  • the conductive couplers 240 connected between the die bond sites 215 and the first bond sites 225 include wirebonds.
  • the conductive couplers 240 can include other suitable structures. In any of these embodiments, the conductive couplers 240 may project outwardly (e.g., in an upward direction in Figure 3) from the first bondsite 225, the die bondsite 215, and/or the first surface 213 of the semiconductor die 210.
  • the cover 230 is positioned adjacent to the semiconductor die 210 and can include a first (e.g., outwardly facing) surface 233 and a second (e.g., inwardly facing) surface 234.
  • the second surface 234 can include a recess 232 that receives at least a portion of individual conductive couplers 240. Accordingly, a distance D between the second surface 214 of the semiconductor die 210 and the first surface 233 of the cover 230 can be reduced when compared to existing arrangements (including, for example, the arrangement shown in Figure IA) because the cover 230 need not be offset from the semiconductor die 210 by an amount necessary to accommodate the outwardly projecting conductive couplers 240.
  • the cover 230 may be offset from the semiconductor die 210 by a small amount to produce the gap 212, e.g., when the sensor/transmitter 211 carried by the semiconductor die 210 requires and/or benefits from such a gap.
  • the gap 212 can be eliminated, as will be described in greater detail later with reference to Figure 6A.
  • the presence of the recess 232 in a location that at least partially receives or accommodates the conductive couplers 240 can reduce the overall thickness of the semiconductor package 201.
  • Figures 4A-4B illustrate steps in a process for manufacturing the semiconductor package
  • Figure 4A illustrates a conductive structure 220 suitable for conveying electrical signals to and from the package 201.
  • the conductive structure 220 includes a leadframe 221 that in turn includes leadfingers 223 connected to a sacrificial frame member 222.
  • the frame member 222 and the leadfingers 223 are positioned around an opening 224 through which the bond sites of a corresponding semiconductor die are accessible, as is described in further detail below with reference to Figures 4B and 4C.
  • Figure 4B is a partially schematic, cross-sectional illustration of the conductive structure 220 shown in Figure 4A, with a removable support member 250 attached.
  • the conductive structure 220 can include a first surface 228 carrying the first bond sites 225, and a second surface 229 carrying the second bond sites 226.
  • the conductive structure 220 includes a leadframe 221
  • the removable support member 250 can be attached to the frame member 222 and/or the leadfingers 223 at the second surface 229. Accordingly, the removable support member 250 temporarily closes one end of the opening 224 through the conductive structure 220.
  • the removable support member 250 includes a film 251 carrying a temporary adhesive 252 that is attached to the second surface 229 of the conductive structure 220.
  • the removable support member 250 can include a pressure-sensitive, high temperature tape suitable for undergoing subsequent processes (e.g., wirebonding processes) at elevated temperatures.
  • the resulting assembly 202 formed by the conductive structure 220 and the removable support member 250 then receives the semiconductor die 210, as described below with reference to Figure 4C.
  • the semiconductor die 210 is positioned in the opening 224 so that the second surface 214 of the semiconductor die 210 is placed against and temporarily held by the removable support member 250. Accordingly, the second surface 229 of the conductive structure 220 can be coplanar with the second surface 214 of the semiconductor die 210. With the semiconductor die 210 temporarily secured in position relative to the conductive structure 220, the conductive couplers 240 can be connected between the first bond sites 225 of the leadfingers 223 and the die bond sites 215 of the semiconductor die 210.
  • Figure 5 is a bottom plan view of a cover 230 configured in accordance with an embodiment of the disclosure.
  • the cover 230 can be manufactured from a material that is transparent, or at least partially transparent, to radiation at a target wavelength that is received or transmitted by the sensor/transmitter 211 ( Figure 4C).
  • the cover 230 can be made from glass.
  • the cover 230 can have other compositions, depending upon factors that include, but are not limited to, the particular characteristics of the sensor/transmitter 211.
  • the cover 230 can be generally rigid and self-supporting, and can include a recess 232 positioned in the second surface 234.
  • the recess 232 can be pre-formed in the cover 230 before the cover 230 is joined to the rest of the assembly.
  • the recess 232 has the general form of a channel located within the outer periphery of the cover 230 and having a generally rectangular cross-sectional shape. Accordingly, the recess 232 can receive conductive couplers that are arranged around all four sides of a corresponding semiconductor die.
  • the recess 232 can have other corresponding locations.
  • the recess 232 can also have cross-sectional shapes other than the rectangular shape shown in Figure 5, e.g., a half-round shape, a trapezoidal shape, or others.
  • the recess 232 can be formed by any of a variety of suitable techniques.
  • the recess 232 can be formed using a laser or a wet etch process.
  • the recess 232 can be formed with a blade, e.g., a singulation blade.
  • a dicing blade may be particularly suitable for forming a recess 232a that extends all the way to the outer edge of the cover 230, as indicated by dashed lines in Figure 5.
  • the recess 232 can be molded directly into the cover 230 when the cover 230 is formed.
  • the cover 230 can have a thickness of from about 0.3 millimeters to about 1.5 millimeters, and the recess 232 an have a depth of about 100 microns or less.
  • the foregoing representative dimensions can have other values in other embodiments.
  • Multiple covers 230 with corresponding recesses 232 can be formed from a single piece of stock (e.g., a glass wafer), and then individual covers 230 can be singulated from the stock prior to being attached to a die. Representative embodiments for attaching the cover 230 to a die are described below with reference to Figures 6A-6B.
  • Figure 6A illustrates the cover 230 positioned proximate to the assembly 202 of the semiconductor die 210 and the conductive structure 220 described previously with reference to Figure 4C.
  • the cover 230 includes an adhesive 231 that is pre-disposed in the recess 232.
  • the adhesive 231 can include any of a variety of suitable materials, for example, a UV-curable epoxy material.
  • the adhesive 231 can have a viscosity high enough to allow it to adhere to the second surface 234 and the recess 232 of the cover 230 when the cover 230 is inverted (as shown in Figure 6A) e.g., by a pick-and-place apparatus.
  • the cover 230 can then be moved downwardly to the assembly 202 below, with the adhesive 231 contacting the conductive structure 220 and/or the semiconductor die 210.
  • the assembly 202 may be placed under pressure to enhance the seal between the cover 230, the semiconductor die 210 and/or the conductive structure 220.
  • the adhesive 231 can optionally be cured e.g., by exposure to UV radiation.
  • the adhesive 231 is not optically transparent. Accordingly, the adhesive 231 is placed on the cover 230 in such a manner that, when it contacts the assembly 202, it does not extend inwardly into a radiation path 218 along which the sensor/transmitter 211 receives and/or transmits radiation signals.
  • the adhesive 231 can be applied using a stencil and/or printing technique.
  • the adhesive 231 can be transparent at the wavelength associated with the sensor/transmitter, e.g., the adhesive 231 can be an optical- grade adhesive.
  • the adhesive 231 can optionally be disposed over the inner portion of the cover 230, as it will not interfere with the operation of the sensor/transmitter 211. Suitable adhesives for both of the foregoing applications are available from the Abelstik Company of Rancho Dominguez, California.
  • Figure 6B illustrates another arrangement for attaching the cover 230 to the assembly
  • an adhesive dispenser 235 applies the adhesive 231 to the semiconductor die 210 and/or the conductive structure 220, instead of applying the adhesive 231 directly to the cover 230, as was discussed above with reference Figure 6A.
  • the adhesive 231 can be disposed in a manner that covers the conductive couplers 240 and extends into a gap between the ends of the leadfingers 223 and the semiconductor die 210.
  • the amount of adhesive 231 disposed in this manner is controlled by the dispenser 235 so that when the cover 230 is placed downwardly on the assembly 202 and contacts the adhesive 231, it does not cause an excess amount of adhesive 231 to flow or otherwise move inwardly and interfere with the radiation path 218 associated with the sensor/transmitter 211.
  • the adhesive 231 accordingly covers less than the entire first surface 225 of the semiconductor die 210 and may be cured in a manner similar to that described above with reference to Figure 6A.
  • the adhesive 231 can be disposed over the sensor/transmitter 211.
  • Figure 7 A illustrates the package 201 after the cover 230 has been attached.
  • the package 201 includes a gap 212 between the cover 230 and the sensor/transmitter 211.
  • the adhesive 231 can cover the sensor/transmitter 211 and the gap 212 can be eliminated.
  • the removable support member 250 may be removed from the second surface 214 of the semiconductor die 210 and the second surface 229 of the conductive structure 220, e.g., by peeling the support member 250 away.
  • the adhesive 231 can be further cured (e.g., at elevated temperatures) after the support member 250 has been removed.
  • the assembly 202 is placed on a singulation tape 216 or other substrate suitable for supporting the assembly 202 during a singulation process.
  • a blade 217 or other singulation device e.g., a water jet or a laser beam
  • the outer edges of the cover 230 are at or within the outer edges of the leadf ⁇ ngers 223 and accordingly, the blade 217 need only separate the frame member 222 from the leadfingers 223.
  • the cover 230 may overlie at least portion of the frame member 222, as shown in dashed lines in Figure 7B.
  • the blade 217 or other singulation device can cut through both the frame member 222 and the outer portions of the cover 230.
  • the outer edges 236 of the cover 230 can be exposed after the singulation process is complete.
  • the singulation tape 216 is then removed to expose the second surface 214 of the semiconductor die 210 and the second bond sites 226 positioned at the second surface 229 of the conductive structure 220.
  • the leadfingers 223 can be accessed from the second surface 229 of the conductive structure 220 and also from the outwardly facing edge surfaces 229a of the conductive structure 220.
  • One feature of semiconductor packages in accordance with at least some of the foregoing embodiments described above is that they can include a cover having a recess that receives the conductive couplers connected between the semiconductor die and the conductive structure.
  • the conductive couplers, or portions of the conductive couplers can be accommodated in the recess, and the overall thickness of the package when the cover is included can be less than the overall thickness of the package if the cover did not include the recess.
  • This arrangement can make the package more versatile and, in particular embodiments, better suited for compact electronic devices in which space is at a premium.
  • packages in accordance with at least some of the foregoing embodiments can be manufactured with the aid of a removable or releasable support member that supports the conductive structure and the die relative to each other as these components are connected, but is then removed prior to completing the package.
  • the package does not require a base (e.g., the base 27 shown in Figure IA), which is typically encapsulated as part of the overall package. Accordingly the overall thickness of the package can be reduced.
  • the second surface of the semiconductor die can be exposed, which can improve the rate at which heat is transferred away from the semiconductor die.
  • the semiconductor package can include a high density of low profile external connectors (e.g., arranged in a "quad flat no lead" or QFN configuration) so as to provide for an improved integratibility with electronic devices.
  • Still another feature of semiconductor packages in accordance with at least some of the foregoing embodiments is that they do not include an encapsulant (e.g., the encapsulant 41 shown in Figure IB).
  • the packages can include an adhesive that connects the cover to the semiconductor die, but does not encapsulate the entire assembly. For example, the outer edges of the cover can be exposed.
  • encapsulants are typically disposed in a high temperature process, eliminating the encapsulant and replacing it with an adhesive that has a lower temperature curing process can reduce the thermal stresses placed on the semiconductor die during processing, and can accordingly use less of the "thermal budget" allocated to the semiconductor die for manufacturing processes. This in turn can improve the reliability of the package, and/or allow other, perhaps more critical processes to be conducted at higher temperatures.
  • any of the semiconductor packages described above with reference to Figures 2-7B can be incorporated into a myriad of larger and/or complex systems, a representative example of which is a system 800 shown schematically in Figure 8.
  • the system 800 can include a processor 802, a memory 804 (e.g., SRAM, DRAM, flash memory and/or other memory device), input/output devices 806 (e.g., a sensor and/or a transmitter), and/or other sub-systems or components 808.
  • Semiconductor packages having any one or a combination the features described above with reference to Figure 2-7B may be included in any of the devices shown in Figure 8.
  • the resulting system 800 can perform any of a wide variety of computing, processing, storage, sensing, imaging, and/or other functions.
  • the representative system 800 includes without limitation, computers and/or other data processors, for example, desktop computers, laptop computers, internet appliances, hand-held devices (e.g., palm-top computers, wearable computers, cellular or mobile phones, personal digital assistants, music players, cameras, etc.), multi-processor systems, processor-based or programmable consumer electronics, network computers and minicomputers.
  • Other representative systems 800 may be housed in a single unit or distributed over multiple interconnected units (e.g., through a communication network).
  • the components of the system 800 can accordingly include local and/or remote memory storage devices, and any of a wide variety of computer readable media.

Abstract

A system and methods for the processing of documents generated in shipping transactions using predictive data entry is disclosed. The system utilizes a Predicted Bill Entry engine and database to shift from a bill entry process to a bill review process by predicting the shipment characteristics between common sender and receiver pairs. Shipping information collected at the time of pickup or quote is converted into a temporary shipment record. The engine then compares the temporary shipment record with the predictive bill entry database. If a match is found, the user will be presented with a predictive record for bill review. Alternatively, the user can use the Predicted Bill Entry engine by entering the certain shipping information. The Predicted Bill Entry engine searches for a match in the Predicted Bill Entry database. If a match is found, the user is presented with a predictive record for bill review.

Description

THIN SEMICONDUCTOR DIE PACKAGES AND ASSOCIATED SYSTEMS AND METHODS
TECHNICAL FIELD
The present disclosure is directed generally to thin semiconductor die packages and associated systems and methods, including packages with covers having recesses that receive wirebonds or other conductive couplers, and packages formed with temporary support members.
BACKGROUND
Packaged semiconductor dies, including memory chips, microprocessor chips, and imager chips, typically include a semiconductor die mounted to a substrate and encased in a plastic protective covering. The die includes functional features, such as memory cells, processor circuits, imager devices, and interconnecting circuitry. The die also typically includes bond pads electrically coupled to the functional features. The bond pads are electrically connected to pins or other types of terminals that extend outside the protective covering for connecting the die to busses, circuits, and/or other microelectronic assemblies. In one conventional arrangement, the die is mounted to a supporting substrate (e.g., a printed circuit board), and the die bond pads are electrically coupled to corresponding bond pads of the substrate with wirebonds. After encapsulation, the substrate can be electrically connected to external devices with solder balls or other suitable connections. Accordingly, the substrate both supports the die and provides an electrical link between the die and the external devices. In other conventional arrangements, the die can be mounted to a leadframe that has conductive leadfingers connected to a removable frame. The frame temporarily supports the leadfϊngers in position relative to the die during manufacture. Each leadfinger is wirebonded to a corresponding bond pad of the die, and the assembly is encapsulated in such a way that the frame and a portion of each of the leadfingers extends outside the encapsulating material. The frame is then trimmed off, and the exposed portions of each leadfinger can be used to provide connections between the die and external devices.
Figure IA is a partially schematic, cross-sectional illustration of a package 50a configured in accordance with the prior art. The package 50a includes a die 10 that has an upwardly facing imager 11 and is supported from below by an insulating (e.g., ceramic) base 27. Leadfingers 23a are positioned around all four sides of the die 10 in a "quad flat no lead" (QFN) configuration, and are connected to the die 10 with wirebonds 40. Insulating standoffs 3 form a cavity 4 in which the die 10 is positioned, and support a glass window 30 over the imager 11. The window 30 provides a hermetically sealed package that transmits visible light to the imager 11. Figure IB illustrates another package 50b configured in accordance with the prior art. In this arrangement, the die 10 is carried by leads 23b. The glass window 30 is attached to the die 10 with an adhesive 31, and an encapsulant 41 is disposed over a portion of the die 10, the leads 23b, and the wirebonds 40 to protect these components. Both arrangements for the packages 50a, 50b are suitable for installations in digital cameras, sensors, and/or other such devices. While the arrangements shown in Figure 1A-1B have proven suitable for many applications, there remains a need to still further reduce the size of the package and the costs associated with manufacturing the package.
BRIEF DESCRIPTION OF THE DRAWINGS
Figures IA- IB are partially schematic, cross-sectional illustrations of packages configured in accordance with the prior art.
Figure 2 is a partially schematic, isometric illustration of a system that includes a package having a cover configured in accordance with an embodiment of the disclosure.
Figure 3 is a partially schematic, cross-sectional illustration of an embodiment of the package shown in Figure 2.
Figure 4A is a partially schematic, top plan view of a conductive structure configured in accordance with an embodiment of the disclosure.
Figure 4B illustrates a conductive structure connected to a removable support member in accordance with an embodiment of the disclosure. Figure 4C illustrates the arrangement shown in Figure 4B, with a semiconductor die attached to the removable support member in accordance with an embodiment of the disclosure.
Figure 5 is a partially schematic, top plan view of a cover having a recess configured in accordance with an embodiment of the disclosure. Figure 6A is a partially schematic, cross-sectional side view of a cover positioned to be attached to a semiconductor die in accordance with an embodiment of the disclosure.
Figure 6B is a partially schematic, cross-sectional side view of a cover positioned to be attached to a semiconductor die in accordance with another embodiment of the disclosure. Figure 7A illustrates a process for removing a releasable support member from a die and a conductive structure in accordance with an embodiment of the disclosure.
Figure 7B illustrates a process for removing portions of a conductive structure and (optionally) a cover in accordance with multiple embodiments of the disclosure.
Figure 8 is a schematic illustration of a system that can include one or more packages configured in accordance with several embodiments of the disclosure.
DETAILED DESCRIPTION
Several embodiments of the present disclosure are described below with reference to packaged semiconductor devices and assemblies, and methods for forming packaged semiconductor devices and assemblies. Many details of certain embodiments are described below with reference to semiconductor dies. The term "semiconductor die" is used throughout to include a variety of articles of manufacture, including, for example, individual integrated circuit dies, imager dies, sensor dies, and/or dies having other semiconductor features. Many specific details of certain embodiments are set forth in Figures 2-8 and the following text to provide a through understanding of these embodiments. Several other embodiments can have different configurations, components, and/or processes than those described in this disclosure. A person skilled in the relevant art, therefore, will appreciate that additional embodiments may be practiced without several details of the embodiments shown in Figures 2-8, and/or with additional details and/or features.
Figure 2 is a partially schematic, isometric illustration of a system 200 that includes a semiconductor package 201 configured in accordance with an embodiment of the disclosure.
The semiconductor package 201 can include a semiconductor die 210 having a sensor and/or transmitter (referred to as a sensor/transmitter 211) that receives and/or transmits radiation. For example, the sensor/transmitter 211 can include an imager device suitable for use in digital cameras, cell phones, and other applications. A conductive structure 220 can be positioned proximate to the semiconductor die 210 to transmit signals to and from the semiconductor die 210. In a particular embodiment, the conductive structure 220 includes leadfingers 223 positioned around a periphery of the semiconductor die 210. Conductive couplers 240 (e.g., wirebonds) can be connected between the leadfingers 223 and corresponding die bond sites 215 of the semiconductor die 210. A cover 230 is positioned adjacent to the semiconductor die 210 and the conductive structure 220, and can be secured to the semiconductor die 210 and the conductive structure 220 with an adhesive 231. The cover 230 can be transparent or at least partially transparent to radiation that is received or transmitted by the sensor/transmitter 211. Accordingly, the cover 230 can protect the components within the package 201, while providing little or no interference with the operation of the sensor/transmitter 211. Figure 3 is a partially schematic, cross-sectional illustration of an embodiment of the semiconductor package 201 shown in Figure 2. As shown in Figure 3, the semiconductor die 210 can have a first (e.g., upwardly facing) surface 213 and a second (e.g., downwardly facing) surface 214. The sensor/transmitter 211 can be located at the first surface 213, which can also carry the die bond sites 215 for transmitting electrical signals to and from the semiconductor die 210. The adjacent leadfingers 223 of the conductive structure 220 can include first bond sites 225 positioned adjacent to the die bond sites 215, and second bond sites 226 that are accessible from a region outside the semiconductor package 201. In an embodiment shown in Figure 3, the conductive couplers 240 connected between the die bond sites 215 and the first bond sites 225 include wirebonds. In other embodiments, the conductive couplers 240 can include other suitable structures. In any of these embodiments, the conductive couplers 240 may project outwardly (e.g., in an upward direction in Figure 3) from the first bondsite 225, the die bondsite 215, and/or the first surface 213 of the semiconductor die 210.
The cover 230 is positioned adjacent to the semiconductor die 210 and can include a first (e.g., outwardly facing) surface 233 and a second (e.g., inwardly facing) surface 234. The second surface 234 can include a recess 232 that receives at least a portion of individual conductive couplers 240. Accordingly, a distance D between the second surface 214 of the semiconductor die 210 and the first surface 233 of the cover 230 can be reduced when compared to existing arrangements (including, for example, the arrangement shown in Figure IA) because the cover 230 need not be offset from the semiconductor die 210 by an amount necessary to accommodate the outwardly projecting conductive couplers 240. The cover 230 may be offset from the semiconductor die 210 by a small amount to produce the gap 212, e.g., when the sensor/transmitter 211 carried by the semiconductor die 210 requires and/or benefits from such a gap. In other embodiments, the gap 212 can be eliminated, as will be described in greater detail later with reference to Figure 6A. In any of these embodiments, the presence of the recess 232 in a location that at least partially receives or accommodates the conductive couplers 240 can reduce the overall thickness of the semiconductor package 201. Figures 4A-4B illustrate steps in a process for manufacturing the semiconductor package
201 shown in Figures 2 and 3, in accordance with a particular embodiment of the disclosure. Figure 4A illustrates a conductive structure 220 suitable for conveying electrical signals to and from the package 201. In a particular embodiment, the conductive structure 220 includes a leadframe 221 that in turn includes leadfingers 223 connected to a sacrificial frame member 222. The frame member 222 and the leadfingers 223 are positioned around an opening 224 through which the bond sites of a corresponding semiconductor die are accessible, as is described in further detail below with reference to Figures 4B and 4C.
Figure 4B is a partially schematic, cross-sectional illustration of the conductive structure 220 shown in Figure 4A, with a removable support member 250 attached. The conductive structure 220 can include a first surface 228 carrying the first bond sites 225, and a second surface 229 carrying the second bond sites 226. When the conductive structure 220 includes a leadframe 221, the removable support member 250 can be attached to the frame member 222 and/or the leadfingers 223 at the second surface 229. Accordingly, the removable support member 250 temporarily closes one end of the opening 224 through the conductive structure 220. In a particular embodiment, the removable support member 250 includes a film 251 carrying a temporary adhesive 252 that is attached to the second surface 229 of the conductive structure 220. For example, the removable support member 250 can include a pressure- sensitive, high temperature tape suitable for undergoing subsequent processes (e.g., wirebonding processes) at elevated temperatures. The resulting assembly 202 formed by the conductive structure 220 and the removable support member 250 then receives the semiconductor die 210, as described below with reference to Figure 4C.
As shown in Figure 4C, the semiconductor die 210 is positioned in the opening 224 so that the second surface 214 of the semiconductor die 210 is placed against and temporarily held by the removable support member 250. Accordingly, the second surface 229 of the conductive structure 220 can be coplanar with the second surface 214 of the semiconductor die 210. With the semiconductor die 210 temporarily secured in position relative to the conductive structure 220, the conductive couplers 240 can be connected between the first bond sites 225 of the leadfingers 223 and the die bond sites 215 of the semiconductor die 210.
Figure 5 is a bottom plan view of a cover 230 configured in accordance with an embodiment of the disclosure. The cover 230 can be manufactured from a material that is transparent, or at least partially transparent, to radiation at a target wavelength that is received or transmitted by the sensor/transmitter 211 (Figure 4C). For example, in a particular embodiment in which the sensor/transmitter 211 includes an imager configured to receive and process radiation in the visible spectrum, the cover 230 can be made from glass. In other embodiments, the cover 230 can have other compositions, depending upon factors that include, but are not limited to, the particular characteristics of the sensor/transmitter 211. In any of these embodiments, the cover 230 can be generally rigid and self-supporting, and can include a recess 232 positioned in the second surface 234. The recess 232 can be pre-formed in the cover 230 before the cover 230 is joined to the rest of the assembly. In an arrangement shown in Figure 5, the recess 232 has the general form of a channel located within the outer periphery of the cover 230 and having a generally rectangular cross-sectional shape. Accordingly, the recess 232 can receive conductive couplers that are arranged around all four sides of a corresponding semiconductor die. When the semiconductor die has different arrangements, for example, two rows of bond sites at opposing edges of the die, or bond sites disposed along a single row at the center of the die, the recess 232 can have other corresponding locations. The recess 232 can also have cross-sectional shapes other than the rectangular shape shown in Figure 5, e.g., a half-round shape, a trapezoidal shape, or others.
The recess 232 can be formed by any of a variety of suitable techniques. For example, the recess 232 can be formed using a laser or a wet etch process. In other embodiments, the recess 232 can be formed with a blade, e.g., a singulation blade. For example, a dicing blade may be particularly suitable for forming a recess 232a that extends all the way to the outer edge of the cover 230, as indicated by dashed lines in Figure 5. In still another embodiment, the recess 232 can be molded directly into the cover 230 when the cover 230 is formed. In any of these embodiments, the cover 230 can have a thickness of from about 0.3 millimeters to about 1.5 millimeters, and the recess 232 an have a depth of about 100 microns or less. The foregoing representative dimensions can have other values in other embodiments. Multiple covers 230 with corresponding recesses 232 can be formed from a single piece of stock (e.g., a glass wafer), and then individual covers 230 can be singulated from the stock prior to being attached to a die. Representative embodiments for attaching the cover 230 to a die are described below with reference to Figures 6A-6B.
Figure 6A illustrates the cover 230 positioned proximate to the assembly 202 of the semiconductor die 210 and the conductive structure 220 described previously with reference to Figure 4C. In a particular aspect of this embodiment, the cover 230 includes an adhesive 231 that is pre-disposed in the recess 232. The adhesive 231 can include any of a variety of suitable materials, for example, a UV-curable epoxy material. The adhesive 231 can have a viscosity high enough to allow it to adhere to the second surface 234 and the recess 232 of the cover 230 when the cover 230 is inverted (as shown in Figure 6A) e.g., by a pick-and-place apparatus. The cover 230 can then be moved downwardly to the assembly 202 below, with the adhesive 231 contacting the conductive structure 220 and/or the semiconductor die 210. Optionally, the assembly 202 may be placed under pressure to enhance the seal between the cover 230, the semiconductor die 210 and/or the conductive structure 220. The adhesive 231 can optionally be cured e.g., by exposure to UV radiation. In a particular embodiment, the adhesive 231 is not optically transparent. Accordingly, the adhesive 231 is placed on the cover 230 in such a manner that, when it contacts the assembly 202, it does not extend inwardly into a radiation path 218 along which the sensor/transmitter 211 receives and/or transmits radiation signals. For example, the adhesive 231 can be applied using a stencil and/or printing technique. In other embodiments, the adhesive 231 can be transparent at the wavelength associated with the sensor/transmitter, e.g., the adhesive 231 can be an optical- grade adhesive. In such an instance, the adhesive 231 can optionally be disposed over the inner portion of the cover 230, as it will not interfere with the operation of the sensor/transmitter 211. Suitable adhesives for both of the foregoing applications are available from the Abelstik Company of Rancho Dominguez, California. Figure 6B illustrates another arrangement for attaching the cover 230 to the assembly
202, which may be used in lieu of the arrangement described above with reference to Figure 6A. In this embodiment, an adhesive dispenser 235 applies the adhesive 231 to the semiconductor die 210 and/or the conductive structure 220, instead of applying the adhesive 231 directly to the cover 230, as was discussed above with reference Figure 6A. The adhesive 231 can be disposed in a manner that covers the conductive couplers 240 and extends into a gap between the ends of the leadfingers 223 and the semiconductor die 210. In a particular embodiment, the amount of adhesive 231 disposed in this manner is controlled by the dispenser 235 so that when the cover 230 is placed downwardly on the assembly 202 and contacts the adhesive 231, it does not cause an excess amount of adhesive 231 to flow or otherwise move inwardly and interfere with the radiation path 218 associated with the sensor/transmitter 211. The adhesive 231 accordingly covers less than the entire first surface 225 of the semiconductor die 210 and may be cured in a manner similar to that described above with reference to Figure 6A. In another embodiment, e.g., when the adhesive 231 is of optical grade, or is otherwise transparent at the desired wavelength, the adhesive 231 can be disposed over the sensor/transmitter 211.
Figure 7 A illustrates the package 201 after the cover 230 has been attached. If the adhesive 231 is confined to the peripheral region of the semiconductor die 210, the package 201 includes a gap 212 between the cover 230 and the sensor/transmitter 211. In other embodiments, the adhesive 231 can cover the sensor/transmitter 211 and the gap 212 can be eliminated. Once the adhesive 231 has been attached, the removable support member 250 may be removed from the second surface 214 of the semiconductor die 210 and the second surface 229 of the conductive structure 220, e.g., by peeling the support member 250 away. Optionally, the adhesive 231 can be further cured (e.g., at elevated temperatures) after the support member 250 has been removed.
In Figure 7B, the assembly 202 is placed on a singulation tape 216 or other substrate suitable for supporting the assembly 202 during a singulation process. During the singulation process, a blade 217 or other singulation device (e.g., a water jet or a laser beam) is used to separate the frame member 222 from the inwardly disposed leadfϊngers 223. In a particular embodiment, the outer edges of the cover 230 are at or within the outer edges of the leadfϊngers 223 and accordingly, the blade 217 need only separate the frame member 222 from the leadfingers 223. In another embodiment, the cover 230 may overlie at least portion of the frame member 222, as shown in dashed lines in Figure 7B. Accordingly, the blade 217 or other singulation device can cut through both the frame member 222 and the outer portions of the cover 230. In either embodiment, the outer edges 236 of the cover 230 can be exposed after the singulation process is complete. The singulation tape 216 is then removed to expose the second surface 214 of the semiconductor die 210 and the second bond sites 226 positioned at the second surface 229 of the conductive structure 220. Accordingly, the leadfingers 223 can be accessed from the second surface 229 of the conductive structure 220 and also from the outwardly facing edge surfaces 229a of the conductive structure 220. One feature of semiconductor packages in accordance with at least some of the foregoing embodiments described above is that they can include a cover having a recess that receives the conductive couplers connected between the semiconductor die and the conductive structure. As a result, the conductive couplers, or portions of the conductive couplers, can be accommodated in the recess, and the overall thickness of the package when the cover is included can be less than the overall thickness of the package if the cover did not include the recess. This arrangement can make the package more versatile and, in particular embodiments, better suited for compact electronic devices in which space is at a premium.
Another feature of packages in accordance with at least some of the foregoing embodiments is that they can be manufactured with the aid of a removable or releasable support member that supports the conductive structure and the die relative to each other as these components are connected, but is then removed prior to completing the package. As a result, the package does not require a base (e.g., the base 27 shown in Figure IA), which is typically encapsulated as part of the overall package. Accordingly the overall thickness of the package can be reduced. Another result of this feature is that the second surface of the semiconductor die can be exposed, which can improve the rate at which heat is transferred away from the semiconductor die. At the same time, the semiconductor package can include a high density of low profile external connectors (e.g., arranged in a "quad flat no lead" or QFN configuration) so as to provide for an improved integratibility with electronic devices. Still another feature of semiconductor packages in accordance with at least some of the foregoing embodiments is that they do not include an encapsulant (e.g., the encapsulant 41 shown in Figure IB). Instead, the packages can include an adhesive that connects the cover to the semiconductor die, but does not encapsulate the entire assembly. For example, the outer edges of the cover can be exposed. Because encapsulants are typically disposed in a high temperature process, eliminating the encapsulant and replacing it with an adhesive that has a lower temperature curing process can reduce the thermal stresses placed on the semiconductor die during processing, and can accordingly use less of the "thermal budget" allocated to the semiconductor die for manufacturing processes. This in turn can improve the reliability of the package, and/or allow other, perhaps more critical processes to be conducted at higher temperatures.
Any of the semiconductor packages described above with reference to Figures 2-7B can be incorporated into a myriad of larger and/or complex systems, a representative example of which is a system 800 shown schematically in Figure 8. The system 800 can include a processor 802, a memory 804 (e.g., SRAM, DRAM, flash memory and/or other memory device), input/output devices 806 (e.g., a sensor and/or a transmitter), and/or other sub-systems or components 808. Semiconductor packages having any one or a combination the features described above with reference to Figure 2-7B may be included in any of the devices shown in Figure 8. The resulting system 800 can perform any of a wide variety of computing, processing, storage, sensing, imaging, and/or other functions. Accordingly, the representative system 800 includes without limitation, computers and/or other data processors, for example, desktop computers, laptop computers, internet appliances, hand-held devices (e.g., palm-top computers, wearable computers, cellular or mobile phones, personal digital assistants, music players, cameras, etc.), multi-processor systems, processor-based or programmable consumer electronics, network computers and minicomputers. Other representative systems 800 may be housed in a single unit or distributed over multiple interconnected units (e.g., through a communication network). The components of the system 800 can accordingly include local and/or remote memory storage devices, and any of a wide variety of computer readable media.
From the foregoing, it will be appreciated that specific embodiments have been described herein for purposes of illustration, but that the foregoing systems and methods may have other embodiments as well. For example, while certain of the embodiments describe above were described in the context of semiconductor packages that include a sensor/transmitter, many of the foregoing features may be included in semiconductor packages that do not include a sensor/transmitter. Certain features described in the context of particular embodiments may be combined or eliminated in other embodiments. Further, while advantages associated with certain embodiments have been described in the context of those embodiments, other embodiments may also exhibit such advantages, and not all embodiments need necessarily exhibit such advantages. Accordingly, the disclosure can include other embodiments not shown or described above.

Claims

CLAIMSI/ We claim:
1. A semiconductor system, comprising: a semiconductor package that includes: a semiconductor die having die bond sites; a conductive structure positioned proximate to the semiconductor die, the conductive structure having first bond sites and second bond sites spaced apart from the first bond sites; conductive couplers connected between the first bond sites and the die bond sites; and a cover positioned adjacent to the semiconductor die, the cover having a recess in which the conductive couplers are received.
2. The system of claim 1 wherein the semiconductor die includes at least one of a sensor positioned to receive radiation along a radiation path at a target wavelength, and a transmitter positioned to transmit radiation along the radiation path at the target wavelength, and wherein the cover is positioned along the radiation path and is at least generally transparent at the target radiation.
3. The system of claim 2 wherein the cover includes a glass material.
4. The system of claim 1 wherein the recess is a pre-formed recess formed in the cover before the cover is attached to at least one of the semiconductor die and the conductive member.
5. The system of claim 1 wherein the conductive structure includes conductive leadfingers of a conductive leadframe.
6. The system of claim 1 wherein the conductive couplers include wirebonds.
7. The system of claim 1 wherein the cover has a first surface facing outwardly from the semiconductor die and a second surface facing inwardly toward the semiconductor die, and wherein the recess is in the second surface and has a generally rectangular cross-sectional shape.
8. The system of claim 1 wherein the cover has a first surface facing outwardly from the semiconductor die, a second surface facing inwardly toward the semiconductor die, and a peripheral edge surface between the first and second surfaces, and wherein the edge surface is exposed.
9. The system of claim 1, further comprising an adhesive disposed between the semiconductor die and the cover.
10. The system of claim 9 wherein the adhesive is disposed in the recess and in contact with the conductive coupler, the conductive structure, the first bond sites and the die bond sites.
11. The system of claim 1 wherein the semiconductor package further includes an adhesive between the cover and the semiconductor die, but no encapsulant, and wherein an outwardly facing surface of the cover and an outwardly facing surface of the semiconductor die face in opposite directions and are both exposed.
12. The system of claim 1 wherein the semiconductor die and the cover are separated by a gap.
13. The system of claim 1 wherein the conductive structure and the semiconductor die each have a first surface facing toward the cover and a second surface facing away from the cover, and wherein the second surface of the conductive structure is generally flush with the second surface of the semiconductor die.
14. The system of claim 1 wherein the cover has four edge surfaces, and wherein the recess includes a continuous channel arranged generally parallel to each of the four edge surfaces.
15. The system of claim 1 wherein the semiconductor die has a first surface and a second surface facing opposite from the first surface, and wherein the die bond sites are located at the first surface, and wherein the second surface is accessible from outside the package.
16. The system of claim 1, further comprising a computing device having at least one of a processor, a memory and an input/output device, and wherein the semiconductor package is included as a component of at least one of the processor, the memory, and the input/output device.
17. A method for packaging a semiconductor die, comprising: coupling a semiconductor die to a conductive member with conductive couplers; and attaching a cover to at least one of the semiconductor die and the conductive member, with the conductive couplers received in at least one recess of the cover.
18. The method of claim 17 wherein attaching a cover includes attaching a generally rigid cover having a pre-formed recess in which the conductive couplers are received.
19. The method of claim 17 wherein the semiconductor die includes at least one of a sensor positioned to receive radiation along a radiation path at a target wavelength, and a transmitter positioned to transmit radiation along the radiation path at the target wavelength, and wherein attaching a cover includes attaching a cover that is at least generally transparent to the target wavelength, and wherein attaching a cover includes attaching a cover to be in the radiation path.
20. The method of claim 19, further comprising applying an adhesive between the semiconductor die and the cover to be around but not in the radiation path.
21. The method of claim 19, further comprising applying an adhesive between the semiconductor die and the cover to be in the radiation path.
22. The method of claim 17 wherein the semiconductor die has a surface area axially aligned with and facing directly toward the cover, and wherein attaching the cover includes attaching the cover with an adhesive that covers less than the entire surface area.
23. The method of claim 17 wherein attaching the cover includes: disposing an adhesive on the cover; and contacting the adhesive with at least one of the semiconductor die and the conductive member.
24. The method of claim 17 wherein attaching the cover includes: disposing an adhesive on at least one of the semiconductor die and the conductive member; and contacting the adhesive with the cover.
25. The method of claim 17, further comprising forming the at least one recess in the cover.
26. The method of claim 17, further comprising: temporarily supporting the conductive member and the semiconductor die relative to each other with a removable support while attaching the cover; and removing the removable support and exposing an outwardly facing surface of the semiconductor die after attaching the cover.
27. The method of claim 17 wherein the conductive member includes a leadframe having multiple leadfingers located proximate to the semiconductor die, and wherein coupling the semiconductor die to the conductive member with conductive couplers includes attaching wirebonds between the leadfingers and the semiconductor die.
28. The method of claim 27, further comprising separating a frame member of the leadframe from the leadfingers after attaching the wirebonds.
29. The method of claim 28, further comprising separating a portion of the cover positioned adjacent to the frame member, along with the frame member.
30. A method for packaging a semiconductor die, comprising: positioning a semiconductor die proximate to a leadframe, with the semiconductor die positioned inwardly from leadfingers of the leadframe; temporarily supporting the leadframe and the semiconductor die relative to each other with a removable support; coupling the leadfingers to the semiconductor die with conductive couplers while temporarily supporting the leadframe and the semiconductor die relative to each other; and removing the removable support and exposing an outwardly facing surface of the semiconductor die after coupling the leadfingers to the semiconductor die.
31. The method of claim 30, further comprising positioning a cover adjacent to the semiconductor die while temporarily supporting the leadframe and the semiconductor die relative to each other with the removable support; and attaching the cover to at least one of the semiconductor die and the conductive member.
32. The method of claim 30, further comprising attaching a cover to at least one of the leadframe and the semiconductor die with the conductive couplers received in at least one recess of the cover.
33. The method of claim 30 wherein temporarily supporting the leadframe and the semiconductor die includes temporarily supporting the leadframe and the semiconductor die with an adhesive layer.
34. The method of claim 30 wherein coupling the leadfingers includes coupling the leadfingers with wirebonds.
PCT/US2008/070165 2007-07-24 2008-07-16 Thin semiconductor die packages and associated systems and methods WO2009014953A1 (en)

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