WO2010027715A1 - Method for forming aluminum-doped metal carbonitride gate electrodes - Google Patents

Method for forming aluminum-doped metal carbonitride gate electrodes Download PDF

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Publication number
WO2010027715A1
WO2010027715A1 PCT/US2009/054707 US2009054707W WO2010027715A1 WO 2010027715 A1 WO2010027715 A1 WO 2010027715A1 US 2009054707 W US2009054707 W US 2009054707W WO 2010027715 A1 WO2010027715 A1 WO 2010027715A1
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Prior art keywords
precursor
aluminum
metal carbonitride
substrate
depositing
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PCT/US2009/054707
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French (fr)
Inventor
Toshio Hasegawa
Gerrit J. Leusink
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Tokyo Electron Limited
Tokyo Electron America, Inc.
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Application filed by Tokyo Electron Limited, Tokyo Electron America, Inc. filed Critical Tokyo Electron Limited
Priority to JP2011525115A priority Critical patent/JP5529134B2/en
Priority to DE112009002118T priority patent/DE112009002118B4/en
Priority to CN2009801335090A priority patent/CN102132389B/en
Priority to KR1020117006359A priority patent/KR101503969B1/en
Publication of WO2010027715A1 publication Critical patent/WO2010027715A1/en

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/80—Field effect transistors with field effect produced by a PN or other rectifying junction gate, i.e. potential-jump barrier
    • H01L29/808—Field effect transistors with field effect produced by a PN or other rectifying junction gate, i.e. potential-jump barrier with a PN junction gate, e.g. PN homojunction gate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/49—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET
    • H01L29/4966—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET the conductor material next to the insulator being a composite material, e.g. organic material, TiN, MoSi2
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/28008—Making conductor-insulator-semiconductor electrodes
    • H01L21/28017—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
    • H01L21/28026—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor
    • H01L21/28088—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor the final conductor layer next to the insulator being a composite, e.g. TiN
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/49—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET
    • H01L29/51—Insulating materials associated therewith
    • H01L29/517—Insulating materials associated therewith the insulating material comprising a metallic compound, e.g. metal oxide, metal silicate

Definitions

  • the field of the invention relates generally to the field of forming a semiconductor device, and more specifically to formation of aluminum-doped metal carbonithde gate electrodes with tunable aluminum concentrations.
  • high-k materials may refer to dielectric materials such as metallic silicates or oxides that are deposited onto substrates (e.g., Hf ⁇ 2, ZrO2) rather than grown on the surface of the substrates (e.g., SiO 2 , SiO x Ny).
  • the gate electrode In addition to the gate dielectric layer, the gate electrode also represents a major challenge for future scaling of microelectronic devices.
  • the introduction of metal-containing gate electrodes to replace the traditional doped poly-Si gate electrode can bring about several advantages. These advantages include elimination of the poly-Si gate depletion effect, reduction in sheet resistance, better reliability and potentially better thermal stability on the advanced high-k dielectric materials.
  • switching from poly-Si to a metal-containing gate electrode can achieve a 2 - 3 Angstrom (A) improvement in the effective or electrical thickness of the gate stack. This improvement occurs largely because the problem of poly-Si depletion at the interfaces with other materials is removed entirely.
  • CMOS complementary metal oxide semiconductor
  • PMOS Positive-channel Metal Oxide Semiconductor
  • NMOS Negative-channel Metal Oxide Semiconductor
  • Conventional technology for controlling the work function of a gate electrode includes band-edge metal approach where a metal with a specific workfunction is selected; a P-metal (Re, Co, Ni, Ru, Pt, etc) with a workfunction greater than about 5eV; and a N-metal (Ta, Hf, Y, La, Ir, etc) with a workfunction less than about 4.5eV.
  • the effective workfunction of a gate stack further depends on bulk and surface material properties, crystallographic orientation, and the permittivity of the high-k film interfacing with the gate electrode.
  • gate electrode metals and dielectric threshold voltage adjustment layers have been utilized to control the work function of gate stacks and to obtain the desired threshold voltages for N-MOS and P-MOS transistors in a manufactured semiconductor device.
  • Exemplary threshold voltage adjustment layers include lanthanum oxide (La2 ⁇ 3) for N-MOS devices and aluminum oxide (AI2O3) for P-MOS devices.
  • the dielectric threshold voltage adjustment layers have generally been positioned above the high-k gate dielectric and in contact with the gate electrode.
  • elements in the dielectric threshold voltage adjustment layers generally diffuse through the high-k gate dielectric towards an interface layer (e.g., a high mobility, low defect SiO 2 layer) positioned between the high-k gate dielectric and the substrate to cause threshold voltage adjustment near the interface of the high-k gate dielectric and the underlying interface layer.
  • an interface layer e.g., a high mobility, low defect SiO 2 layer
  • element(s) of some dielectric threshold voltage adjustment layers may not sufficiently diffuse through the high-k gate dielectric to fully adjust the threshold voltage of the semiconductor device to the desired value.
  • Embodiments of the invention provide a method for forming aluminum-doped metal (tantalum or titanium) carbonithde gate electrodes with tunable aluminum concentrations.
  • tantalum carbonitride (TaCN) or titanium carbonithde (TiCN) films are deposited by chemical vapor deposition (CVD) in the absence of plasma and doped with aluminum to tune the workfunction and threshold voltage (V t ).
  • the method includes providing a substrate containing a dielectric layer thereon, and forming an aluminum- doped metal carbonitride gate electrode on the dielectric layer in the absence of plasma.
  • the aluminum-doped metal carbonitride gate electrode is formed by depositing a metal carbonitride film through exposing the substrate to a gas pulse of a metal carbonitride precursor, where the metal carbonitride precursor contains tantalum, titanium, or a combination thereof.
  • the method further includes adsorbing an atomic layer of an aluminum precursor on the metal carbonitride film by exposing the substrate to a gas pulse of the aluminum precursor, where, during the depositing and adsorbing, the substrate is maintained at a temperature above the thermal decomposition temperature of the metal carbonitride precursor and below the thermal decomposition temperature of the aluminum precursor.
  • the steps of depositing and adsorbing may be repeated a desired number of times until the aluminum-doped metal carbonitride gate electrode has a desired thickness.
  • FIGS. 1A - 1 C show schematic cross-sectional views of a method for forming a gate stack containing an aluminum-doped metal carbonitride gate electrode according to an embodiment of the invention
  • FIGS. 2A - 2D are schematic gas flowcharts for depositing aluminum-doped tantalum carbonithde films on a substrate in a process chamber according to embodiments of the invention
  • FIGS. 3A - 3D show schematic cross-sectional views of gate stacks containing aluminum-doped metal carbonitride gate electrodes according to embodiments of the invention
  • FIG. 4 shows experimental data for tantalum carbonitride films deposited on a substrate using a TBTEMT precursor
  • FIG. 5 shows experimental data for aluminum concentration in aluminum-doped tantalum carbonitride films as a function of substrate temperature
  • FIG. 6 shows experimental data for aluminum concentration in aluminum-doped tantalum carbonitride films as a function of the total number of TMA pulses
  • FIG. 7 shows composition of tantalum carbonitride films and aluminum-doped tantalum carbonitride films as a function of processing conditions
  • FIG. 8 depicts a schematic view of a processing system for forming aluminum-doped metal carbonitride gate electrodes in accordance with embodiments of the invention.
  • the aluminum-doped metal carbonitride gate electrodes contain aluminum (Al), carbon (C), nitrogen (N), and tantalum (Ta) and/or titanium (Ti).
  • the aluminum-doped metal carbonitride gate electrodes can further contain impurities such as oxygen (O), chlorine (Cl), and hydrogen (H), that may originate from the film deposition process and/or substrate transfer in air following the film deposition process.
  • the aluminum-doped metal carbonitride gate electrodes may contain combinations of 1 - 50 atomic percent C and 1 - 50 atomic percent N.
  • the aluminum tantalum carbonitride gate electrodes comprise at least 5 (and in some embodiments, at least 10, 15, 20, 25, 30, 35, 40, 45, or even at least 50) atomic percent aluminum.
  • the aluminum-doped metal carbonitride gate electrodes can contain between 5 and 50 atomic percent aluminum. This allows for varying the workfunction of the aluminum-doped metal carbonitride gate electrodes over several tenths of an electron volt (eV).
  • FIGS. 1 A - 1 C show schematic cross-sectional views of a method for forming a gate stack containing an aluminum-doped metal carbonitride gate electrode according to an embodiment of the invention.
  • FIG. 1A schematically shows a substrate 100 containing a high-k film 102 formed thereon.
  • the substrate 100 can be of any size, for example a 200 mm substrate, a 300 mm substrate, or an even larger substrate.
  • the substrate 100 can contain Si, for example crystalline Si, polycrystalline Si, or amorphous Si.
  • the substrate 100 can be a tensile-strained Si layer.
  • the substrate 100 may contain Ge or Si x Gei -x compounds, where x is the atomic fraction of Si, 1-x is the atomic fraction of Ge, and 0 ⁇ 1 -x ⁇ 1.
  • Exemplary Si ⁇ Gei -x compounds include Si 0 1 Ge 0 9, Si 0 2Ge 0 s, Si 0 3Ge 0 7, Si 04 Ge 0 e, Si 0 5Ge 0 5, Si 0 ⁇ Ge 04 , Si 0 7Ge 0 3, Si 0 sGe 0 2, and Si 0 9Ge 0 1.
  • the substrate 100 can be a compressive-strained Ge layer or a tensile-strained Si ⁇ Gei -x (x>0.5) deposited on a relaxed Si 0 5Ge 0 5 buffer layer.
  • the structure in FIG. 1 A may further include an interface layer between the substrate 100 and the high-k film 102.
  • the interface layer can, for example, contain a silicon oxynitride (SiON) or a high mobility, low defect SiO2 with a thickness between about 5 and about 15 angstrom, for example about 8 angstrom.
  • the high-k film 102 can, for example, contain hafnium, zirconium, or hafnium and zirconium, including hafnium oxide (Hf ⁇ 2), hafnium oxynitride (HfON), hafnium silicate (HfSiO), hafnium silicon oxynitride (HfSiON), zirconium oxide (Zr ⁇ 2), zirconium oxynitride (ZrON), zirconium silicate (ZrSiO), zirconium silicon oxynitride (ZrSiON), hafnium zirconium oxide (HfZr ⁇ 2), hafnium zirconium oxynitride (HfZrON), hafnium zirconium silicate (HfZrSiO), hafnium zirconium silicon oxynitride (HfZrSiON), or a combination of two or more thereof.
  • hafnium oxide Hf ⁇ 2
  • FIG. 1 B schematically shows an aluminum-doped metal carbonithde gate electrode 108a formed on the high-k film 102.
  • the aluminum-doped metal carbonitride gate electrode 108a contains a metal carbonithde film 104a formed on the high-k film 102 and an atomic layer 106a of an aluminum precursor adsorbed on the metal carbonitride film 104a.
  • the metal carbonitride film 104a can be deposited by exposing the high-k film 102 to a metal carbonitride precursor that thermally decomposes on the high-k film 102 in the absence of plasma.
  • the metal carbonitride film 104a is exposed to an aluminum precursor in the absence of a plasma to form the atomic layer 106a on the metal carbonitride film 104a.
  • the atomic layer 106a comprises a partially decomposed aluminum precursor.
  • the aluminum precursor contains trimethyl aluminum (AIMe 3 , AI(CH 3 ) 3 , TMA) and it is contemplated that the atomic layer 106a may comprise AIMe x .
  • the substrate 100 is maintained at a temperature that is higher than the thermal decomposition temperature of the metal carbonitride precursor and lower than the thermal decomposition temperature of the aluminum precursor.
  • This allows for thermal chemical vapor deposition (CVD) of the metal carbonitride film 104a, where the thickness of the metal carbonitride film 104a is proportional to the length of the exposure to the metal carbonitride precursor.
  • the exposure of metal carbonitride film 104a to the aluminum precursor is not dependent on the length of the exposure once self-limiting saturation of approximately one atomic layer 106a of the aluminum precursor, or less, is achieved on the metal carbonitride film 104a.
  • the thermal decomposition temperature of the metal carbonitride precursor and aluminum precursor may be determined by experimentation as shown in FIGS. 4 and 5, respectively.
  • the alternating exposures to the metal carbonitride precursor and the aluminum precursor may be repeated any number of times. FIG.
  • FIG. 1 C schematically shows an aluminum-doped metal carbonitride gate electrode 108n after performing the alternating exposures of the metal carbonitride precursor and aluminum precursor a total of n times each to form metal carbonitride films 104a, 104b, 104c, ..., 104n, and atomic layers 106a, 106b, 106c, ..., 106n.
  • the aluminum-doped metal carbonitride gate electrode 108n can contain between 2 and 40 metal carbonitride films, or between 5 and 20 metal carbonitride films.
  • the amount of aluminum in the aluminum-doped metal carbonitride gate electrode 108n may be selected by controlling the thickness of each metal carbonitride film 104a, 104b, ..., 104n.
  • the aluminum-doped metal carbonitride gate electrode 108n may be annealed in order to further intermix the metal carbonitride films and the aluminum and form an amorphous aluminum-doped metal carbonitride gate electrode 108n with desired electrical and materials properties.
  • the aluminum-doped metal carbonitride gate electrode 108n may be annealed at a temperature between 300 0 C and 500 0 C.
  • the amount of aluminum may be varied through a thickness of the aluminum-doped metal carbonithde gate electrode 108n.
  • the amount of aluminum may be gradually increased or decreased through a thickness of the aluminum- doped tantalum carbonitride gate electrode 108n.
  • the amount of aluminum may be gradually increased through a thickness of the aluminum-doped tantalum carbonitride gate electrode 108n by sequentially decreasing the thickness of each metal carbonitride film 104a, 104b, 104c, ..., 104n.
  • the aluminum concentration in the aluminum doped metal carbonitride gate electrode 108n is at least 5 (and in some embodiments, at least 10, 15, 20, 25, 30, 35, 40, 45, or even at least 50) atomic percent aluminum.
  • a large number of tantalum and titanium carbonitride precursors may be utilized for depositing the tantalum carbonitride films and titanium carbonitride films.
  • a tantalum carbonitride precursor can contain Ta, C, and N, but an additional nitrogen source gas (e.g., NH 3 ) may be added as an additional source of nitrogen.
  • tantalum carbonitride precursor containing "Ta-N" intra-molecular bonds include Ta(NMe 2 )S(NCMe 2 Et) (TAIMATA), Ta(NEt 2 ) 5 (PDEAT), Ta(NMe 2 ) 5 (PDMAT), Ta(NEtMe) 5 (PEMAT), (fBuN)Ta(NMe 2 ) 3 (TBTDMT), (fBuN)Ta(NEt 2 ) 3 (TBTDET), ( ⁇ BuN)Ta(NEtMe) 3 (TBTEMT), and (/PrN)Ta(NEt 2 ) 3 (IPTDET).
  • a titanium carbonitride precursor can contain Ti, C, and N but an additional nitrogen source gas (e.g., NH 3 ) may be added as an additional source of nitrogen.
  • additional nitrogen source gas e.g., NH 3
  • titanium carbonitride precursors containing "Ti-N" intra-molecular bonds include Ti(NEt 2 ) 4 (TDEAT), Ti(NMeEt) 4 (TEMAT), and Ti(NMe 2 ) 4 (TDMAT).
  • TDEAT Ti(NEt 2 ) 4
  • TEMAT Ti(NMeEt) 4
  • TDMAT Ti(NMe 2 ) 4
  • Embodiments of the invention may utilize a wide variety of aluminum precursors. For example, many aluminum precursors have the formula: AIL 1 L 2 L 3 D x
  • L 1 , L 2 , L 3 are individual anionic ligands
  • D is a neutral donor ligand where x can be 0, 1 , or 2.
  • Each L 1 , L 2 , L 3 ligand may be individually selected from the groups of alkoxides, halides, aryloxides, amides, cyclopentadienyls, alkyls, silyls, amidinates, ⁇ -diketonates, ketoiminates, silanoates, and carboxylates.
  • D ligands may be selected from groups of ethers, furans, pyridines, pyroles, pyrolidines, amines, crown ethers, glymes, and nithles.
  • aluminum precursors include: AIMe3, AIEt 3 , AIMe 2 H, [AI(OsBu) 3 ] 4 , AI(CH3COCHCOCH3)3, AICI 3 , AIBr 3 , AII 3 , AI(OzPr) 3 , [AI(NMe 2 )S] 2 , AI(ZBu) 2 CI, AI(ZBu) 3 , AI(ZBu) 2 H, AIEt 2 CI, Et 3 AI 2 (OsBu) 3 , AI(THD) 3 , H 3 AINMe 3 , H 3 AINEt 3 , H 3 AINMe 2 Et, and H 3 AIMeEt 2 .
  • FIGS. 2A - 2D are schematic gas flowcharts for depositing aluminum-doped tantalum carbonithde films on a substrate in a process chamber according to embodiments of the invention.
  • the different flowcharts may be used to deposit aluminum-doped tantalum carbonithde films or aluminum-doped titanium carbonitride films with different elemental compositions.
  • TBTEMT, NH 3 , and TMA are used to illustrate the embodiments but other tantalum or titanium carbonitride precursors, additional nitrogen source gases, and aluminum precursors may be used.
  • FIG. 2A schematically shows alternating exposures of TBTEMT gas pulses 202 and TMA gas pulses 204, denoted as [TBTEMT ⁇ TMA] deposition cycles.
  • a purge gas such as Argon (Ar) may be utilized to continuously purge the process chamber or to purge the process chamber between gas pulses of reactant gases, e.g. TBTEMT, TMA, or NH 3 .
  • Ar Argon
  • FIG. 2B schematically shows overlapping exposures of a TBTEMT gas pulse 212 and a NH 3 gas pulse 216, followed by a TMA gas pulse 214.
  • This exposure sequence is denoted as a [(TBTEMT + NH 3 ) ⁇ TMA] deposition cycle.
  • FIG. 2C schematically shows overlapping exposures of a TBTEMT gas pulse 222 and a NH 3 gas pulse 226, followed by a sequence of a TMA gas pulse 224 and an additional NH 3 gas pulse 226'.
  • This exposure sequence is denoted as [(TBTEMT + NH 3 ) ⁇ TMA ⁇ NH 3 ] a deposition cycle.
  • gas pulses 226' and 226 are shown as separate gas pulses, they may be combined into a single NH 3 gas pulse.
  • FIG. 2D schematically shows overlapping exposures of a TBTEMT gas pulse 232 and a NH 3 gas pulse 236, followed by a sequence of a second TBTEMT gas pulse of 232", a TMA gas pulse 234, and a third TBTEMT gas pulse 232'.
  • This exposure sequence is denoted as a [(TBTEMT + NH 3 ) ⁇ TBTEMT ⁇ TMA ⁇ TBTEMT] deposition cycle.
  • gas pulses 232', 232, and 232" are shown as separate gas pulses, two or more of the gas pulses may be combined into a single TBTEMT gas pulse.
  • the different deposition cycles may be repeated any number of times until the aluminum-doped tantalum carbonitride gate electrode has a desired thickness.
  • FIGS. 3A - 3D show schematic cross-sectional views of gate stacks containing aluminum-doped metal carbonitride gate electrodes according to embodiments of the invention.
  • FIG. 3A schematically shows a substrate 300 containing a high-k film 302 formed thereon and an aluminum-doped metal carbonitride gate electrode 304 formed on the high-k film 302.
  • the aluminum-doped metal carbonitride gate electrode 304 is formed using [TBTEMT ⁇ TMA] deposition cycles shown in FIG. 2A.
  • FIG. 3B shows a hybrid aluminum-doped metal carbonitride gate electrode 320 containing an aluminum-doped metal carbonitride gate electrode 308 formed on the high-k film 302 using [TBTEMT ⁇ TMA] deposition cycles and a metal carbonitride film 310 formed on the aluminum-doped metal carbonitride gate electrode 308 using a (TBTEMT+NH 3 ) exposure.
  • FIG. 3B shows a hybrid aluminum-doped metal carbonitride gate electrode 320 containing an aluminum-doped metal carbonitride gate electrode 308 formed on the high-k film 302 using [TBTEMT ⁇ TMA] deposition cycles and a metal carbonitride film 310 formed on the aluminum-doped metal carbonitride gate electrode 308 using a (TBTEMT+NH 3 ) exposure.
  • FIG. 3C shows another hybrid aluminum- doped metal carbonithde gate electrode 322 containing a metal carbonitride film 310 formed on the high-k film 302 using a (TBTEMT+NH 3 ) exposure and an aluminum-doped metal carbonitride gate electrode 308 formed on the metal carbonitride film 310 using [TBTEMT ⁇ TMA] deposition cycles.
  • FIG. 3D shows yet another hybrid aluminum-doped metal carbonitride gate electrode 324.
  • the hybrid aluminum-doped metal carbonitride gate electrode 324 is similar to the hybrid aluminum-doped metal carbonitride gate electrode 322 shown in FIG. 3C but further contains a second metal carbonitride film 312 formed on the aluminum-doped metal carbonitride gate electrode 308 using a (TBTEMT+NH 3 ) exposure.
  • the aluminum-doped metal carbonitride gate electrodes 304 and 308 may be formed using the [(TBTEMT + NH 3 ) ⁇ TMA] deposition cycle shown in FIG. 2B, the [(TBTEMT + NH 3 ) ⁇ TMA ⁇ NH 3 ] deposition cycle shown in FIG. 2C, or the [(TBTEMT + NH 3 ) ⁇ TBTEMT ⁇ TMA ⁇ TBTEMT] deposition cycle shown in FIG. 2D.
  • FIG. 4 shows experimental data for tantalum carbonitride films deposited on a substrate using a TBTEMT precursor.
  • the tantalum carbonitride films were thermally deposited without the use of a plasma.
  • Trace 401 shows the results for tantalum carbonitride films deposited using alternating exposures of TBTEMT gas pulses and NH 3 gas pulses.
  • An atomic layer deposition (ALD) window is identified below about 300 0 C, where each TBTEMT gas pulse and NH 3 gas pulse results in a saturated surface reaction and the tantalum carbonitride film thickness is only weakly dependent on the substrate temperature.
  • ALD atomic layer deposition
  • Trace 402 shows tantalum carbonitride film growth rate as a function of substrate temperature for continuous exposures to a process gas containing TGTEMT precursor gas but not NH 3 gas.
  • Trace 403 shows tantalum carbonithde film growth rate as a function of substrate temperature for continuous exposures to a process gas containing TGTEMT precursor gas and NH 3 gas.
  • Traces 402 and 403 show that formation of tantalum carbonithde films by thermal decomposition of TGTEMT precursor is obtained at substrate temperatures greater than about 300 0 C with a feed rate limited growth rate of about 13-15nm/min.
  • FIG. 5 shows experimental data for aluminum concentration in aluminum-doped tantalum carbonithde films as a function of substrate temperature.
  • the aluminum content was measured by X-ray fluorescence (XRF) spectroscopy.
  • XRF X-ray fluorescence
  • the aluminum-doped tantalum carbonithde films were deposited using 32 [TBTEMT ⁇ TMA] deposition cycles.
  • the aluminum-doped tantalum carbonitride films were deposited using 32 of [(TBTEMT + NH 3 ) ⁇ TMA ⁇ NH 3 ] deposition cycles.
  • traces 501 and 502 the average tantalum carbonitride thickness per deposition cycle was about 0.4nm and each TMA gas pulse duration was 3 seconds.
  • Traces 501 and 502 show that TMA exposures below about 500 0 C resulted in saturated surface reactions and formation of atomic layers of aluminum but TMA exposures above 500C resulted in thermal self- decomposition of TMA on the substrate.
  • FIG. 6 shows experimental data for aluminum concentration in aluminum-doped tantalum carbonitride films as a function of the total number of TMA pulses.
  • the substrate temperatures were 450°C and 500 0 C and the total thickness of each aluminum-doped tantalum carbonitride film was about 10nm.
  • FIG. 6 also shows the thickness of the aluminum-doped tantalum carbonitride film deposited in each deposition cycle.
  • the aluminum concentration was measured by XRF spectroscopy and ranged from about 4 atomic percent to greater than about 35 atomic percent.
  • the aluminum concentration was varied by selecting different tantalum carbonithde film thicknesses deposited in each deposition cycle.
  • [(TBTEMT + NH 3 ) ⁇ TMA], [(TBTEMT + NH 3 ) ⁇ TMA ⁇ NH 3 ], and [(TBTEMT + NH 3 ) ⁇ TBTEMT ⁇ TMA ⁇ TBTEMT] deposition cycles resulted in aluminum concentrations of about 8 atomic percent when using a total of 5 TMA gas pulses and about 15 atomic percent when using a total of 10 TMA gas pulses.
  • [TBTEMT ⁇ TMA] deposition cycles resulted in aluminum concentrations of about 4 atomic percent when using a total of 5 TMA gas pulses and about 7 atomic percent when using a total of 10 TMA gas pulses.
  • FIG. 7 shows composition of tantalum carbonitride films and aluminum-doped tantalum carbonitride films as a function of processing conditions. A TBTEMT tantalum precursor and a TMA aluminum precursor were used.
  • the experimental data shows that AITaCN films have higher C concentration than TaCN films, due to reduced removal of methyl groups from TMA precursor adsorbed on the substrate surface. Furthermore, [(TBTEMT+NH 3 )] deposition cycles resulted in increased N film concentration and decreased C concentration compared to [TBTEMT] exposures. In addition, compared to [(TBTEMT ⁇ TMA] deposition cycles, [(TBTEMT+NH 3 ) ⁇ TMA ⁇ NH 3 ] deposition cycles resulted in increased Al content, and increased N film content and decreased C film content due to AIN formation from reaction of NH 3 with adsorbed TMA precursor. Oxygen incorporation into the films was due to air exposure after the film deposition. [0045] FIG.
  • the processing system 1 can be utilized to perform various deposition processes, including thermal CVD.
  • the processing system 1 includes a process chamber 10 having a substrate holder 20 configured to support a substrate 25 upon which the aluminum-doped metal carbonitride gate electrode is to be formed.
  • the process chamber 10 further contains an upper assembly 30 (e.g., a showerhead) coupled to a first process material supply system 40, a second process material supply system 42, a third process material supply system 44, and a purge gas supply system 46.
  • the processing system 1 includes a substrate temperature control system 60 coupled to substrate holder 20 and configured to elevate and control the temperature of substrate 25.
  • the processing system 1 may be configured to process 200 mm substrates, 300 mm substrates, or larger-sized substrates.
  • the deposition system may be configured to process substrates, wafers, or flat panel displays regardless of their size, as would be appreciated by those skilled in the art. Therefore, while aspects of the invention will be described in connection with the processing of a semiconductor substrate, the invention is not limited solely thereto.
  • the first process material supply system 40, the second process material supply system 42, and third process material supply system 44 are configured to simultaneously or alternately introduce a first, second, and process materials to the process chamber 10.
  • the alternating introduction of the first, second, and third process materials can be cyclical, or it may be acyclical with variable time periods between introduction of the first, second, and third process materials.
  • the first process material can contain a tantalum carbonitride precursor, a titanium carbonitride precursor, or both.
  • the tantalum or titanium carbonitride precursor can originate as a solid phase, a liquid phase, or a gaseous phase, and it may be delivered to process chamber 10 in a gaseous phase with or without the use of a carrier gas (e.g., a noble gas or N 2 ).
  • the second process material can, for example, comprise an additional nitrogen source gas, and it may be delivered to process chamber 10 with or without the use of a carrier gas.
  • the second process material can contain NH 3 , NH(CH 3 ) 2 , N 2 H 4 , or N 2 H 3 CH 3 , or a combination of two or more thereof.
  • the third process material supply system 44 can be configured for introducing a third process material containing an aluminum precursor. Examples of tantalum carbonitride precursors, titanium carbonitride precursors, and aluminum precursors were described above.
  • the purge gas supply system 46 can be configured to introduce a purge gas to process chamber 10. For example, the introduction of purge gas may occur between introduction of the first process material and the second process material to process chamber 10, or following the introduction of the second process material to process chamber 10, respectively.
  • processing system 1 includes substrate temperature control system 60 coupled to the substrate holder 20 and configured to elevate and control the temperature of substrate 25.
  • Substrate temperature control system 60 comprises temperature control elements, such as a cooling system including a re-circulating coolant flow that receives heat from substrate holder 20 and transfers heat to a heat exchanger system (not shown), or when heating, transfers heat from the heat exchanger system.
  • the temperature control elements can include heating/cooling elements, such as resistive heating elements, or thermo-electric heaters/coolers, which can be included in the substrate holder 20, as well as the chamber wall of the process chamber 10 and any other component within the processing system 1.
  • the substrate holder 20 can include a mechanical clamping system, or an electrical clamping system, such as an electrostatic clamping system, to affix substrate 25 to an upper surface of substrate holder 20.
  • substrate holder 20 can further include a substrate backside gas delivery system configured to introduce gas to the back-side of substrate 25 in order to improve the gas-gap thermal conductance between substrate 25 and substrate holder 20.
  • a substrate backside gas delivery system configured to introduce gas to the back-side of substrate 25 in order to improve the gas-gap thermal conductance between substrate 25 and substrate holder 20.
  • the substrate backside gas system can comprise a two-zone gas distribution system, wherein the helium gas gap pressure can be independently varied between the center and the edge of substrate 25.
  • the process chamber 10 is further coupled to a pressure control system 32, including a vacuum pumping system 34 and a valve 36, through a duct 38, wherein the pressure control system 32 is configured to controllably evacuate the process chamber 10 to a pressure suitable for forming the thin film on substrate 25, and suitable for use of the first, second, and third process materials.
  • the vacuum pumping system 34 can include a turbo-molecular vacuum pump (TMP) or a cryogenic pump capable of a pumping speed up to about 5000 liters per second (and greater) and valve 36 can include a gate valve for throttling the chamber pressure.
  • a device for monitoring chamber pressure (not shown) can be coupled to the process chamber 10.
  • the pressure measuring device can, for example, be a capacitance manometer.
  • the processing system 1 includes a controller 70 than can be used to configure any number of processing elements of the processing system 1 , and the controller 70 can collect, provide, process, store, and display data from processing elements.
  • the controller 70 can comprise a number of applications for controlling one or more of the processing elements.
  • controller 70 can include a graphic user interface (GUI) component (not shown) that can provide easy to use interfaces that enable a user to monitor and/or control one or more processing elements.
  • GUI graphic user interface
  • controller 70 can be coupled to one or more additional controllers/computers (not shown), and controller 70 can obtain setup and/or configuration information from an additional controller/computer.
  • the controller 70 can comprise a microprocessor, memory, and a digital I/O port capable of generating control voltages sufficient to communicate and activate inputs of the processing elements of the processing system 1 as well as monitor outputs from the processing system 1.
  • a program stored in the memory may be utilized to activate the inputs to the aforementioned components of the processing system 1 according to a process recipe in order to perform an etching process, or a deposition process.
  • the controller 70 may be implemented as a general purpose computer system that performs a portion or all of the microprocessor based processing steps of embodiments of the invention in response to a processor executing one or more sequences of one or more instructions contained in a memory. Such instructions may be read into the controller memory from another computer readable medium, such as a hard disk or a removable media drive.
  • processors in a multi-processing arrangement may also be employed as the controller microprocessor to execute the sequences of instructions contained in main memory.
  • hardwired circuitry may be used in place of or in combination with software instructions. Thus, embodiments are not limited to any specific combination of hardware circuitry and software.
  • the controller 70 includes at least one computer readable medium or memory, such as the controller memory, for holding instructions programmed according to the teachings of the invention and for containing data structures, tables, records, or other data that may be necessary to implement the present invention.
  • Examples of computer readable media are compact discs, hard disks, floppy disks, tape, magneto-optical disks, PROMs (EPROM, EEPROM, flash EPROM), DRAM, SRAM, SDRAM, or any other magnetic medium, compact discs (e.g., CD-ROM), or any other optical medium, punch cards, paper tape, or other physical medium with patterns of holes, a carrier wave (described below), or any other medium from which a computer can read.
  • the present invention includes software for controlling the controller 70, for driving a device or devices for implementing embodiments the invention, and/or for enabling the controller to interact with a human user.
  • software may include, but is not limited to, device drivers, operating systems, development tools, and applications software.
  • Such computer readable media further includes the computer program product of the present invention for performing all or a portion (if processing is distributed) of the processing performed in implementing embodiments of the invention.
  • the computer code devices of the present invention may be any interpretable or executable code mechanism, including but not limited to scripts, interpretable programs, dynamic link libraries (DLLs), Java classes, and complete executable programs. Moreover, parts of the processing of the present invention may be distributed for better performance, reliability, and/or cost.
  • Non-volatile media includes, for example, optical, magnetic disks, and magneto-optical disks, such as the hard disk or the removable media drive.
  • Volatile media includes dynamic memory, such as the main memory.
  • various forms of computer readable media may be involved in carrying out one or more sequences of one or more instructions to processor of controller for execution. For example, the instructions may initially be carried on a magnetic disk of a remote computer.
  • the remote computer can load the instructions for implementing all or a portion of the present invention remotely into a dynamic memory and send the instructions over a network to the controller 70.
  • the controller 70 may be locally located relative to the processing system 1 , or it may be remotely located relative to the processing system 1.
  • the controller 70 may exchange data with the processing system 1 using at least one of a direct connection, an intranet, the Internet and a wireless connection.
  • the controller 70 may be coupled to an intranet at, for example, a customer site (i.e., a device maker, etc.), or it may be coupled to an intranet at, for example, a vendor site (i.e., an equipment manufacturer). Additionally, for example, the controller 70 may be coupled to the Internet.
  • controller 70 may access, for example, the controller 70 to exchange data via at least one of a direct connection, an intranet, and the Internet.
  • controller 70 may exchange data with the processing system 1 via a wireless connection.

Abstract

A method for forming an aluminum-doped metal (tantalum or titanium) carbonithde gate electrode for a semiconductor device is described. The method includes providing a substrate containing a dielectric layer thereon, and forming the gate electrode on the dielectric layer in the absence of plasma. The gate electrode is formed by depositing a metal carbonithde film, and adsorbing an atomic layer of an aluminum precursor on the metal carbonithde film. The steps of depositing and adsorbing may be repeated a desired number of times until the aluminum-doped metal carbonitride gate electrode has a desired thickness.

Description

METHOD OF FORMING ALUMINUM-DOPED METAL CARBONITRIDE
GATE ELECTRODES
CROSS-REFERENCE TO RELATED APPLICATION
[0001] This application is related to co-pending United States Patent Application No. 11/839,410 entitled "SEMICONDUCTOR DEVICE CONTAINING AN ALUMINUM TANTALUM CARBONITRIDE BARRIER FILM AND METHOD OF FORMING," filed on August 15, 2007, the entire content of which is hereby incorporated by reference.
FIELD OF INVENTION
[0002] The field of the invention relates generally to the field of forming a semiconductor device, and more specifically to formation of aluminum-doped metal carbonithde gate electrodes with tunable aluminum concentrations.
BACKGROUND OF THE INVENTION
[0003] In the semiconductor industry, the minimum feature sizes of microelectronic devices are approaching the deep sub-micron regime to meet the demand for faster, lower power microprocessors and digital circuits. The Si-based microelectronic technology is currently faced with major materials challenges to achieve further miniaturization of integrated circuit devices. A gate stack containing a Siθ2 gate dielectric layer and a degenerately doped polycrystalline Si gate electrode, which has served the industry for several decades, will be replaced with a gate stack having a higher capacitance. [0004] High-capacitance materials, known as high-k materials (where "k" refers to the dielectric constant of the material), feature a dielectric constant greater than that of Siθ2 (k~3.9). In addition, high-k materials may refer to dielectric materials such as metallic silicates or oxides that are deposited onto substrates (e.g., Hfθ2, ZrO2) rather than grown on the surface of the substrates (e.g., SiO2, SiOxNy).
[0005] In addition to the gate dielectric layer, the gate electrode also represents a major challenge for future scaling of microelectronic devices. The introduction of metal-containing gate electrodes to replace the traditional doped poly-Si gate electrode can bring about several advantages. These advantages include elimination of the poly-Si gate depletion effect, reduction in sheet resistance, better reliability and potentially better thermal stability on the advanced high-k dielectric materials. In one example, switching from poly-Si to a metal-containing gate electrode can achieve a 2 - 3 Angstrom (A) improvement in the effective or electrical thickness of the gate stack. This improvement occurs largely because the problem of poly-Si depletion at the interfaces with other materials is removed entirely.
[0006] Workfunction, resistivity, and compatibility with complementary metal oxide semiconductor (CMOS) technology are key parameters for the new gate electrode materials. Positive-channel Metal Oxide Semiconductor (PMOS) and the Negative-channel Metal Oxide Semiconductor (NMOS) transistor gate electrodes require different gate materials to achieve acceptable threshold voltages; the former having a Fermi level near the silicon valence band (E~4eV), and the latter having a Fermi level near the conduction band (E~5.1 eV).
[0007] Conventional technology for controlling the work function of a gate electrode includes band-edge metal approach where a metal with a specific workfunction is selected; a P-metal (Re, Co, Ni, Ru, Pt, etc) with a workfunction greater than about 5eV; and a N-metal (Ta, Hf, Y, La, Ir, etc) with a workfunction less than about 4.5eV. However, the effective workfunction of a gate stack further depends on bulk and surface material properties, crystallographic orientation, and the permittivity of the high-k film interfacing with the gate electrode. In particular, interactions of the different materials at layer interfaces and diffusion of chemical species throughout a gate stack during post-processing, such as high temperature anneals, can affect the work function and other properties of the semiconductor device. [0008] Recently, gate electrode metals and dielectric threshold voltage adjustment layers have been utilized to control the work function of gate stacks and to obtain the desired threshold voltages for N-MOS and P-MOS transistors in a manufactured semiconductor device. Exemplary threshold voltage adjustment layers include lanthanum oxide (La2θ3) for N-MOS devices and aluminum oxide (AI2O3) for P-MOS devices. The dielectric threshold voltage adjustment layers have generally been positioned above the high-k gate dielectric and in contact with the gate electrode. It has been shown that during high temperature processing, elements in the dielectric threshold voltage adjustment layers generally diffuse through the high-k gate dielectric towards an interface layer (e.g., a high mobility, low defect SiO2 layer) positioned between the high-k gate dielectric and the substrate to cause threshold voltage adjustment near the interface of the high-k gate dielectric and the underlying interface layer. However, element(s) of some dielectric threshold voltage adjustment layers may not sufficiently diffuse through the high-k gate dielectric to fully adjust the threshold voltage of the semiconductor device to the desired value.
[0009] Thus, in view of the above-mentioned problems, new methods are needed for integrating metal-containing gate electrodes into gate stacks, and in particular, new methods are needed that allow for forming metal-containing gate electrodes with tunable workfunctions.
SUMMARY OF THE INVENTION
[0010] Embodiments of the invention provide a method for forming aluminum-doped metal (tantalum or titanium) carbonithde gate electrodes with tunable aluminum concentrations. According to embodiments of the invention, tantalum carbonitride (TaCN) or titanium carbonithde (TiCN) films are deposited by chemical vapor deposition (CVD) in the absence of plasma and doped with aluminum to tune the workfunction and threshold voltage (Vt). [0011] According to one embodiment, the method includes providing a substrate containing a dielectric layer thereon, and forming an aluminum- doped metal carbonitride gate electrode on the dielectric layer in the absence of plasma. The aluminum-doped metal carbonitride gate electrode is formed by depositing a metal carbonitride film through exposing the substrate to a gas pulse of a metal carbonitride precursor, where the metal carbonitride precursor contains tantalum, titanium, or a combination thereof. The method further includes adsorbing an atomic layer of an aluminum precursor on the metal carbonitride film by exposing the substrate to a gas pulse of the aluminum precursor, where, during the depositing and adsorbing, the substrate is maintained at a temperature above the thermal decomposition temperature of the metal carbonitride precursor and below the thermal decomposition temperature of the aluminum precursor. The steps of depositing and adsorbing may be repeated a desired number of times until the aluminum-doped metal carbonitride gate electrode has a desired thickness.
BRIEF DESCRIPTION OF THE DRAWINGS
[0012] The present invention is illustrated by way of example and not as a limitation in the figures of the accompanying drawings. [0013] FIGS. 1A - 1 C show schematic cross-sectional views of a method for forming a gate stack containing an aluminum-doped metal carbonitride gate electrode according to an embodiment of the invention; [0014] FIGS. 2A - 2D are schematic gas flowcharts for depositing aluminum-doped tantalum carbonithde films on a substrate in a process chamber according to embodiments of the invention;
[0015] FIGS. 3A - 3D show schematic cross-sectional views of gate stacks containing aluminum-doped metal carbonitride gate electrodes according to embodiments of the invention;
[0016] FIG. 4 shows experimental data for tantalum carbonitride films deposited on a substrate using a TBTEMT precursor;
[0017] FIG. 5 shows experimental data for aluminum concentration in aluminum-doped tantalum carbonitride films as a function of substrate temperature;
[0018] FIG. 6 shows experimental data for aluminum concentration in aluminum-doped tantalum carbonitride films as a function of the total number of TMA pulses;
[0019] FIG. 7 shows composition of tantalum carbonitride films and aluminum-doped tantalum carbonitride films as a function of processing conditions; and
[0020] FIG. 8 depicts a schematic view of a processing system for forming aluminum-doped metal carbonitride gate electrodes in accordance with embodiments of the invention.
DETAILED DESCRIPTION OF SEVERAL EMBODIMENTS
[0021] Formation of aluminum-doped metal carbonitride gate electrodes and gate stacks containing such gate electrodes is disclosed in various embodiments. The aluminum-doped metal carbonitride gate electrodes contain aluminum (Al), carbon (C), nitrogen (N), and tantalum (Ta) and/or titanium (Ti). The aluminum-doped metal carbonitride gate electrodes can further contain impurities such as oxygen (O), chlorine (Cl), and hydrogen (H), that may originate from the film deposition process and/or substrate transfer in air following the film deposition process. In some examples, the aluminum-doped metal carbonitride gate electrodes may contain combinations of 1 - 50 atomic percent C and 1 - 50 atomic percent N. In some embodiments, the aluminum tantalum carbonitride gate electrodes comprise at least 5 (and in some embodiments, at least 10, 15, 20, 25, 30, 35, 40, 45, or even at least 50) atomic percent aluminum. According to one embodiment, the aluminum-doped metal carbonitride gate electrodes can contain between 5 and 50 atomic percent aluminum. This allows for varying the workfunction of the aluminum-doped metal carbonitride gate electrodes over several tenths of an electron volt (eV).
[0022] One skilled in the relevant art will recognize that the various embodiments may be practiced without one or more of the specific details, or with other replacement and/or additional methods, materials, or components. In other instances, well-known structures, materials, or operations are not shown or described in detail to avoid obscuring aspects of various embodiments of the invention. Similarly, for purposes of explanation, specific numbers, materials, and configurations are set forth in order to provide a thorough understanding of the invention. Nevertheless, the invention may be practiced without specific details. Furthermore, it is understood that the various embodiments shown in the figures are illustrative representations and are not necessarily drawn to scale.
[0023] Reference throughout this specification to "one embodiment" or "an embodiment" means that a particular feature, structure, material, or characteristic described in connection with the embodiment is included in at least one embodiment of the invention, but do not denote that they are present in every embodiment. Thus, the appearances of the phrases "in one embodiment" or "in an embodiment" in various places throughout this specification are not necessarily referring to the same embodiment of the invention. Furthermore, the particular features, structures, materials, or characteristics may be combined in any suitable manner in one or more embodiments. Various additional layers and/or structures may be included and/or described features may be omitted in other embodiments. [0024] Various operations will be described as multiple discrete operations in turn, in a manner that is most helpful in understanding the invention. However, the order of description should not be construed as to imply that these operations are necessarily order dependent. In particular, these operations need not be performed in the order of presentation. Operations described may be performed in a different order than the described embodiment. Various additional operations may be performed and/or described operations may be omitted in additional embodiments. [0025] FIGS. 1 A - 1 C show schematic cross-sectional views of a method for forming a gate stack containing an aluminum-doped metal carbonitride gate electrode according to an embodiment of the invention. FIG. 1A schematically shows a substrate 100 containing a high-k film 102 formed thereon. The substrate 100 can be of any size, for example a 200 mm substrate, a 300 mm substrate, or an even larger substrate. According to one embodiment, the substrate 100 can contain Si, for example crystalline Si, polycrystalline Si, or amorphous Si. In one example, the substrate 100 can be a tensile-strained Si layer. According to another embodiment, the substrate 100 may contain Ge or SixGei-x compounds, where x is the atomic fraction of Si, 1-x is the atomic fraction of Ge, and 0 < 1 -x < 1. Exemplary SiχGei-x compounds include Si01 Ge09, Si02Ge0 s, Si03Ge07, Si04Ge0 e, Si05Ge05, Si0 θGe04, Si07Ge03, Si0 sGe02, and Si09Ge01. In one example, the substrate 100 can be a compressive-strained Ge layer or a tensile-strained SiχGei-x (x>0.5) deposited on a relaxed Si05Ge05 buffer layer. Although not shown, the structure in FIG. 1 A may further include an interface layer between the substrate 100 and the high-k film 102. The interface layer can, for example, contain a silicon oxynitride (SiON) or a high mobility, low defect SiO2 with a thickness between about 5 and about 15 angstrom, for example about 8 angstrom.
[0026] The high-k film 102 can, for example, contain hafnium, zirconium, or hafnium and zirconium, including hafnium oxide (Hfθ2), hafnium oxynitride (HfON), hafnium silicate (HfSiO), hafnium silicon oxynitride (HfSiON), zirconium oxide (Zrθ2), zirconium oxynitride (ZrON), zirconium silicate (ZrSiO), zirconium silicon oxynitride (ZrSiON), hafnium zirconium oxide (HfZrθ2), hafnium zirconium oxynitride (HfZrON), hafnium zirconium silicate (HfZrSiO), hafnium zirconium silicon oxynitride (HfZrSiON), or a combination of two or more thereof. However, other high-k dielectric materials are contemplated and may be used.
[0027] FIG. 1 B schematically shows an aluminum-doped metal carbonithde gate electrode 108a formed on the high-k film 102. The aluminum-doped metal carbonitride gate electrode 108a contains a metal carbonithde film 104a formed on the high-k film 102 and an atomic layer 106a of an aluminum precursor adsorbed on the metal carbonitride film 104a. The metal carbonitride film 104a can be deposited by exposing the high-k film 102 to a metal carbonitride precursor that thermally decomposes on the high-k film 102 in the absence of plasma. Following the exposure to the metal carbonitride precursor, the metal carbonitride film 104a is exposed to an aluminum precursor in the absence of a plasma to form the atomic layer 106a on the metal carbonitride film 104a. The atomic layer 106a comprises a partially decomposed aluminum precursor. In one example, the aluminum precursor contains trimethyl aluminum (AIMe3, AI(CH3)3, TMA) and it is contemplated that the atomic layer 106a may comprise AIMex. [0028] According to embodiments of the invention, during formation of the aluminum-doped metal carbonitride gate electrode 108a, the substrate 100 is maintained at a temperature that is higher than the thermal decomposition temperature of the metal carbonitride precursor and lower than the thermal decomposition temperature of the aluminum precursor. This allows for thermal chemical vapor deposition (CVD) of the metal carbonitride film 104a, where the thickness of the metal carbonitride film 104a is proportional to the length of the exposure to the metal carbonitride precursor. Conversely, the exposure of metal carbonitride film 104a to the aluminum precursor is not dependent on the length of the exposure once self-limiting saturation of approximately one atomic layer 106a of the aluminum precursor, or less, is achieved on the metal carbonitride film 104a. The thermal decomposition temperature of the metal carbonitride precursor and aluminum precursor may be determined by experimentation as shown in FIGS. 4 and 5, respectively. [0029] The alternating exposures to the metal carbonitride precursor and the aluminum precursor may be repeated any number of times. FIG. 1 C schematically shows an aluminum-doped metal carbonitride gate electrode 108n after performing the alternating exposures of the metal carbonitride precursor and aluminum precursor a total of n times each to form metal carbonitride films 104a, 104b, 104c, ..., 104n, and atomic layers 106a, 106b, 106c, ..., 106n. According to one embodiment of the invention, the aluminum-doped metal carbonitride gate electrode 108n can contain between 2 and 40 metal carbonitride films, or between 5 and 20 metal carbonitride films. The amount of aluminum in the aluminum-doped metal carbonitride gate electrode 108n may be selected by controlling the thickness of each metal carbonitride film 104a, 104b, ..., 104n. The aluminum-doped metal carbonitride gate electrode 108n may be annealed in order to further intermix the metal carbonitride films and the aluminum and form an amorphous aluminum-doped metal carbonitride gate electrode 108n with desired electrical and materials properties. In one example, the aluminum-doped metal carbonitride gate electrode 108n may be annealed at a temperature between 3000C and 5000C. [0030] According to one embodiment of the invention, the amount of aluminum may be varied through a thickness of the aluminum-doped metal carbonithde gate electrode 108n. For example, the amount of aluminum may be gradually increased or decreased through a thickness of the aluminum- doped tantalum carbonitride gate electrode 108n. In one example, the amount of aluminum may be gradually increased through a thickness of the aluminum-doped tantalum carbonitride gate electrode 108n by sequentially decreasing the thickness of each metal carbonitride film 104a, 104b, 104c, ..., 104n. In some embodiments, the aluminum concentration in the aluminum doped metal carbonitride gate electrode 108n is at least 5 (and in some embodiments, at least 10, 15, 20, 25, 30, 35, 40, 45, or even at least 50) atomic percent aluminum.
[0031] A large number of tantalum and titanium carbonitride precursors may be utilized for depositing the tantalum carbonitride films and titanium carbonitride films. A tantalum carbonitride precursor can contain Ta, C, and N, but an additional nitrogen source gas (e.g., NH3) may be added as an additional source of nitrogen. Representative examples of tantalum carbonitride precursor containing "Ta-N" intra-molecular bonds include Ta(NMe2)S(NCMe2Et) (TAIMATA), Ta(NEt2)5 (PDEAT), Ta(NMe2)5 (PDMAT), Ta(NEtMe)5 (PEMAT), (fBuN)Ta(NMe2)3 (TBTDMT), (fBuN)Ta(NEt2)3 (TBTDET), (^BuN)Ta(NEtMe)3 (TBTEMT), and (/PrN)Ta(NEt2)3 (IPTDET). Similarly, a titanium carbonitride precursor can contain Ti, C, and N but an additional nitrogen source gas (e.g., NH3) may be added as an additional source of nitrogen. Representative examples of titanium carbonitride precursors containing "Ti-N" intra-molecular bonds include Ti(NEt2)4 (TDEAT), Ti(NMeEt)4 (TEMAT), and Ti(NMe2)4 (TDMAT). [0032] Embodiments of the invention may utilize a wide variety of aluminum precursors. For example, many aluminum precursors have the formula: AIL1L2L3Dx
where L1, L2, L3 are individual anionic ligands, and D is a neutral donor ligand where x can be 0, 1 , or 2. Each L1, L2, L3 ligand may be individually selected from the groups of alkoxides, halides, aryloxides, amides, cyclopentadienyls, alkyls, silyls, amidinates, β-diketonates, ketoiminates, silanoates, and carboxylates. D ligands may be selected from groups of ethers, furans, pyridines, pyroles, pyrolidines, amines, crown ethers, glymes, and nithles. [0033] Other examples of aluminum precursors include: AIMe3, AIEt3, AIMe2H, [AI(OsBu)3]4, AI(CH3COCHCOCH3)3, AICI3, AIBr3, AII3, AI(OzPr)3, [AI(NMe2)S]2, AI(ZBu)2CI, AI(ZBu)3, AI(ZBu)2H, AIEt2CI, Et3AI2(OsBu)3, AI(THD)3, H3AINMe3, H3AINEt3, H3AINMe2Et, and H3AIMeEt2. [0034] FIGS. 2A - 2D are schematic gas flowcharts for depositing aluminum-doped tantalum carbonithde films on a substrate in a process chamber according to embodiments of the invention. The different flowcharts may be used to deposit aluminum-doped tantalum carbonithde films or aluminum-doped titanium carbonitride films with different elemental compositions. TBTEMT, NH3, and TMA are used to illustrate the embodiments but other tantalum or titanium carbonitride precursors, additional nitrogen source gases, and aluminum precursors may be used. FIG. 2A schematically shows alternating exposures of TBTEMT gas pulses 202 and TMA gas pulses 204, denoted as [TBTEMT→TMA] deposition cycles. Although not shown in FIGS. 2A - 2D, a purge gas such as Argon (Ar) may be utilized to continuously purge the process chamber or to purge the process chamber between gas pulses of reactant gases, e.g. TBTEMT, TMA, or NH3.
[0035] FIG. 2B schematically shows overlapping exposures of a TBTEMT gas pulse 212 and a NH3 gas pulse 216, followed by a TMA gas pulse 214. This exposure sequence is denoted as a [(TBTEMT + NH3) →TMA] deposition cycle.
[0036] FIG. 2C schematically shows overlapping exposures of a TBTEMT gas pulse 222 and a NH3 gas pulse 226, followed by a sequence of a TMA gas pulse 224 and an additional NH3 gas pulse 226'. This exposure sequence is denoted as [(TBTEMT + NH3) →TMA→ NH3] a deposition cycle. Although gas pulses 226' and 226 are shown as separate gas pulses, they may be combined into a single NH3 gas pulse.
[0037] FIG. 2D schematically shows overlapping exposures of a TBTEMT gas pulse 232 and a NH3 gas pulse 236, followed by a sequence of a second TBTEMT gas pulse of 232", a TMA gas pulse 234, and a third TBTEMT gas pulse 232'. This exposure sequence is denoted as a [(TBTEMT + NH3) →TBTEMT→TMA→TBTEMT] deposition cycle. Although gas pulses 232', 232, and 232" are shown as separate gas pulses, two or more of the gas pulses may be combined into a single TBTEMT gas pulse. [0038] In FIGS. 2A - 2D, the different deposition cycles may be repeated any number of times until the aluminum-doped tantalum carbonitride gate electrode has a desired thickness.
[0039] FIGS. 3A - 3D show schematic cross-sectional views of gate stacks containing aluminum-doped metal carbonitride gate electrodes according to embodiments of the invention. FIG. 3A schematically shows a substrate 300 containing a high-k film 302 formed thereon and an aluminum-doped metal carbonitride gate electrode 304 formed on the high-k film 302. The aluminum-doped metal carbonitride gate electrode 304 is formed using [TBTEMT→TMA] deposition cycles shown in FIG. 2A. FIG. 3B shows a hybrid aluminum-doped metal carbonitride gate electrode 320 containing an aluminum-doped metal carbonitride gate electrode 308 formed on the high-k film 302 using [TBTEMT→TMA] deposition cycles and a metal carbonitride film 310 formed on the aluminum-doped metal carbonitride gate electrode 308 using a (TBTEMT+NH3) exposure. FIG. 3C shows another hybrid aluminum- doped metal carbonithde gate electrode 322 containing a metal carbonitride film 310 formed on the high-k film 302 using a (TBTEMT+NH3) exposure and an aluminum-doped metal carbonitride gate electrode 308 formed on the metal carbonitride film 310 using [TBTEMT→TMA] deposition cycles. FIG. 3D shows yet another hybrid aluminum-doped metal carbonitride gate electrode 324. The hybrid aluminum-doped metal carbonitride gate electrode 324 is similar to the hybrid aluminum-doped metal carbonitride gate electrode 322 shown in FIG. 3C but further contains a second metal carbonitride film 312 formed on the aluminum-doped metal carbonitride gate electrode 308 using a (TBTEMT+NH3) exposure.
[0040] Still referring to FIGS. 3A - 3D, according to other embodiments of the invention, the aluminum-doped metal carbonitride gate electrodes 304 and 308, may be formed using the [(TBTEMT + NH3) →TMA] deposition cycle shown in FIG. 2B, the [(TBTEMT + NH3) →TMA→ NH3] deposition cycle shown in FIG. 2C, or the [(TBTEMT + NH3) →TBTEMT→TMA→TBTEMT] deposition cycle shown in FIG. 2D.
[0041] FIG. 4 shows experimental data for tantalum carbonitride films deposited on a substrate using a TBTEMT precursor. The tantalum carbonitride films were thermally deposited without the use of a plasma. Trace 401 shows the results for tantalum carbonitride films deposited using alternating exposures of TBTEMT gas pulses and NH3 gas pulses. An atomic layer deposition (ALD) window is identified below about 3000C, where each TBTEMT gas pulse and NH3 gas pulse results in a saturated surface reaction and the tantalum carbonitride film thickness is only weakly dependent on the substrate temperature. Above about 3000C, a chemical vapor deposition (CVD) regime is observed where TBTEMT gas exposure results in continuous film deposition and film growth rate is strongly dependent on the substrate temperature. Trace 402 shows tantalum carbonitride film growth rate as a function of substrate temperature for continuous exposures to a process gas containing TGTEMT precursor gas but not NH3 gas. Trace 403 shows tantalum carbonithde film growth rate as a function of substrate temperature for continuous exposures to a process gas containing TGTEMT precursor gas and NH3 gas. Traces 402 and 403 show that formation of tantalum carbonithde films by thermal decomposition of TGTEMT precursor is obtained at substrate temperatures greater than about 3000C with a feed rate limited growth rate of about 13-15nm/min.
[0042] FIG. 5 shows experimental data for aluminum concentration in aluminum-doped tantalum carbonithde films as a function of substrate temperature. The aluminum content was measured by X-ray fluorescence (XRF) spectroscopy. Referring to the gas flowchart in FIG. 2A and trace 501 in FIG. 5, the aluminum-doped tantalum carbonithde films were deposited using 32 [TBTEMT→TMA] deposition cycles. Referring to the gas flowchart in FIG. 2C and trace 502 in FIG. 5, the aluminum-doped tantalum carbonitride films were deposited using 32 of [(TBTEMT + NH3) →TMA→NH3] deposition cycles. In traces 501 and 502, the average tantalum carbonitride thickness per deposition cycle was about 0.4nm and each TMA gas pulse duration was 3 seconds. Traces 501 and 502 show that TMA exposures below about 5000C resulted in saturated surface reactions and formation of atomic layers of aluminum but TMA exposures above 500C resulted in thermal self- decomposition of TMA on the substrate.
[0043] FIG. 6 shows experimental data for aluminum concentration in aluminum-doped tantalum carbonitride films as a function of the total number of TMA pulses. The substrate temperatures were 450°C and 5000C and the total thickness of each aluminum-doped tantalum carbonitride film was about 10nm. FIG. 6 also shows the thickness of the aluminum-doped tantalum carbonitride film deposited in each deposition cycle. The aluminum concentration was measured by XRF spectroscopy and ranged from about 4 atomic percent to greater than about 35 atomic percent. The aluminum concentration was varied by selecting different tantalum carbonithde film thicknesses deposited in each deposition cycle. For example, [(TBTEMT + NH3) →TMA], [(TBTEMT + NH3) →TMA→NH3], and [(TBTEMT + NH3) →TBTEMT →TMA→ TBTEMT] deposition cycles resulted in aluminum concentrations of about 8 atomic percent when using a total of 5 TMA gas pulses and about 15 atomic percent when using a total of 10 TMA gas pulses. In another example, [TBTEMT→TMA] deposition cycles resulted in aluminum concentrations of about 4 atomic percent when using a total of 5 TMA gas pulses and about 7 atomic percent when using a total of 10 TMA gas pulses. Thus, the aluminum concentrations were about twice as high when using co- exposures of TBTEMT gas and NH3 gas compared to exposures of TBTEMT gas without NH3 gas. In summary, aluminum concentrations in aluminum- doped tantalum carbonitride films may be adjusted over a wide range by adjusting the thickness of a tantalum carbonitride film deposited in each cycle and co-exposure of TBTEMT gas and NH3 gas. [0044] FIG. 7 shows composition of tantalum carbonitride films and aluminum-doped tantalum carbonitride films as a function of processing conditions. A TBTEMT tantalum precursor and a TMA aluminum precursor were used. The experimental data shows that AITaCN films have higher C concentration than TaCN films, due to reduced removal of methyl groups from TMA precursor adsorbed on the substrate surface. Furthermore, [(TBTEMT+NH3)] deposition cycles resulted in increased N film concentration and decreased C concentration compared to [TBTEMT] exposures. In addition, compared to [(TBTEMT→TMA] deposition cycles, [(TBTEMT+NH3)→TMA→NH3] deposition cycles resulted in increased Al content, and increased N film content and decreased C film content due to AIN formation from reaction of NH3 with adsorbed TMA precursor. Oxygen incorporation into the films was due to air exposure after the film deposition. [0045] FIG. 8 depicts a schematic view of a processing system for forming aluminum-doped metal carbonitride gate electrodes in accordance with embodiments of the invention. As those skilled in the art will readily recognize, the processing system 1 can be utilized to perform various deposition processes, including thermal CVD. The processing system 1 includes a process chamber 10 having a substrate holder 20 configured to support a substrate 25 upon which the aluminum-doped metal carbonitride gate electrode is to be formed. The process chamber 10 further contains an upper assembly 30 (e.g., a showerhead) coupled to a first process material supply system 40, a second process material supply system 42, a third process material supply system 44, and a purge gas supply system 46. Additionally, the processing system 1 includes a substrate temperature control system 60 coupled to substrate holder 20 and configured to elevate and control the temperature of substrate 25.
[0046] The processing system 1 may be configured to process 200 mm substrates, 300 mm substrates, or larger-sized substrates. In fact, it is contemplated that the deposition system may be configured to process substrates, wafers, or flat panel displays regardless of their size, as would be appreciated by those skilled in the art. Therefore, while aspects of the invention will be described in connection with the processing of a semiconductor substrate, the invention is not limited solely thereto. [0047] The first process material supply system 40, the second process material supply system 42, and third process material supply system 44 are configured to simultaneously or alternately introduce a first, second, and process materials to the process chamber 10. The alternating introduction of the first, second, and third process materials can be cyclical, or it may be acyclical with variable time periods between introduction of the first, second, and third process materials. The first process material can contain a tantalum carbonitride precursor, a titanium carbonitride precursor, or both. For instance, the tantalum or titanium carbonitride precursor can originate as a solid phase, a liquid phase, or a gaseous phase, and it may be delivered to process chamber 10 in a gaseous phase with or without the use of a carrier gas (e.g., a noble gas or N2). The second process material can, for example, comprise an additional nitrogen source gas, and it may be delivered to process chamber 10 with or without the use of a carrier gas. The second process material can contain NH3, NH(CH3)2, N2H4, or N2H3CH3, or a combination of two or more thereof. The third process material supply system 44 can be configured for introducing a third process material containing an aluminum precursor. Examples of tantalum carbonitride precursors, titanium carbonitride precursors, and aluminum precursors were described above. [0048] Additionally, the purge gas supply system 46 can be configured to introduce a purge gas to process chamber 10. For example, the introduction of purge gas may occur between introduction of the first process material and the second process material to process chamber 10, or following the introduction of the second process material to process chamber 10, respectively. The purge gas can comprise an inert gas, such as a noble gas (i.e., helium, neon, argon, xenon, krypton), N2, or H2. [0049] Still referring to FIG. 8, processing system 1 includes substrate temperature control system 60 coupled to the substrate holder 20 and configured to elevate and control the temperature of substrate 25. Substrate temperature control system 60 comprises temperature control elements, such as a cooling system including a re-circulating coolant flow that receives heat from substrate holder 20 and transfers heat to a heat exchanger system (not shown), or when heating, transfers heat from the heat exchanger system. Additionally, the temperature control elements can include heating/cooling elements, such as resistive heating elements, or thermo-electric heaters/coolers, which can be included in the substrate holder 20, as well as the chamber wall of the process chamber 10 and any other component within the processing system 1.
[0050] In order to improve the thermal transfer between substrate 25 and substrate holder 20, the substrate holder 20 can include a mechanical clamping system, or an electrical clamping system, such as an electrostatic clamping system, to affix substrate 25 to an upper surface of substrate holder 20. Furthermore, substrate holder 20 can further include a substrate backside gas delivery system configured to introduce gas to the back-side of substrate 25 in order to improve the gas-gap thermal conductance between substrate 25 and substrate holder 20. Such a system can be utilized when temperature control of the substrate 25 is required at elevated or reduced temperatures. For example, the substrate backside gas system can comprise a two-zone gas distribution system, wherein the helium gas gap pressure can be independently varied between the center and the edge of substrate 25. [0051] Furthermore, the process chamber 10 is further coupled to a pressure control system 32, including a vacuum pumping system 34 and a valve 36, through a duct 38, wherein the pressure control system 32 is configured to controllably evacuate the process chamber 10 to a pressure suitable for forming the thin film on substrate 25, and suitable for use of the first, second, and third process materials. The vacuum pumping system 34 can include a turbo-molecular vacuum pump (TMP) or a cryogenic pump capable of a pumping speed up to about 5000 liters per second (and greater) and valve 36 can include a gate valve for throttling the chamber pressure. Moreover, a device for monitoring chamber pressure (not shown) can be coupled to the process chamber 10. The pressure measuring device can, for example, be a capacitance manometer.
[0052] The processing system 1 includes a controller 70 than can be used to configure any number of processing elements of the processing system 1 , and the controller 70 can collect, provide, process, store, and display data from processing elements. The controller 70 can comprise a number of applications for controlling one or more of the processing elements. For example, controller 70 can include a graphic user interface (GUI) component (not shown) that can provide easy to use interfaces that enable a user to monitor and/or control one or more processing elements. Alternatively, or in addition, controller 70 can be coupled to one or more additional controllers/computers (not shown), and controller 70 can obtain setup and/or configuration information from an additional controller/computer. [0053] The controller 70 can comprise a microprocessor, memory, and a digital I/O port capable of generating control voltages sufficient to communicate and activate inputs of the processing elements of the processing system 1 as well as monitor outputs from the processing system 1. For example, a program stored in the memory may be utilized to activate the inputs to the aforementioned components of the processing system 1 according to a process recipe in order to perform an etching process, or a deposition process.
[0054] The controller 70 may be implemented as a general purpose computer system that performs a portion or all of the microprocessor based processing steps of embodiments of the invention in response to a processor executing one or more sequences of one or more instructions contained in a memory. Such instructions may be read into the controller memory from another computer readable medium, such as a hard disk or a removable media drive. One or more processors in a multi-processing arrangement may also be employed as the controller microprocessor to execute the sequences of instructions contained in main memory. In alternative embodiments, hardwired circuitry may be used in place of or in combination with software instructions. Thus, embodiments are not limited to any specific combination of hardware circuitry and software. [0055] The controller 70 includes at least one computer readable medium or memory, such as the controller memory, for holding instructions programmed according to the teachings of the invention and for containing data structures, tables, records, or other data that may be necessary to implement the present invention. Examples of computer readable media are compact discs, hard disks, floppy disks, tape, magneto-optical disks, PROMs (EPROM, EEPROM, flash EPROM), DRAM, SRAM, SDRAM, or any other magnetic medium, compact discs (e.g., CD-ROM), or any other optical medium, punch cards, paper tape, or other physical medium with patterns of holes, a carrier wave (described below), or any other medium from which a computer can read. [0056] Stored on any one or on a combination of computer readable media, the present invention includes software for controlling the controller 70, for driving a device or devices for implementing embodiments the invention, and/or for enabling the controller to interact with a human user. Such software may include, but is not limited to, device drivers, operating systems, development tools, and applications software. Such computer readable media further includes the computer program product of the present invention for performing all or a portion (if processing is distributed) of the processing performed in implementing embodiments of the invention. [0057] The computer code devices of the present invention may be any interpretable or executable code mechanism, including but not limited to scripts, interpretable programs, dynamic link libraries (DLLs), Java classes, and complete executable programs. Moreover, parts of the processing of the present invention may be distributed for better performance, reliability, and/or cost.
[0058] The term "computer readable medium" as used herein refers to any medium that participates in providing instructions to the processor of the controller 70 for execution. A computer readable medium may take many forms, including but not limited to, non-volatile media, volatile media, and transmission media. Non-volatile media includes, for example, optical, magnetic disks, and magneto-optical disks, such as the hard disk or the removable media drive. Volatile media includes dynamic memory, such as the main memory. Moreover, various forms of computer readable media may be involved in carrying out one or more sequences of one or more instructions to processor of controller for execution. For example, the instructions may initially be carried on a magnetic disk of a remote computer. The remote computer can load the instructions for implementing all or a portion of the present invention remotely into a dynamic memory and send the instructions over a network to the controller 70. [0059] The controller 70 may be locally located relative to the processing system 1 , or it may be remotely located relative to the processing system 1. For example, the controller 70 may exchange data with the processing system 1 using at least one of a direct connection, an intranet, the Internet and a wireless connection. The controller 70 may be coupled to an intranet at, for example, a customer site (i.e., a device maker, etc.), or it may be coupled to an intranet at, for example, a vendor site (i.e., an equipment manufacturer). Additionally, for example, the controller 70 may be coupled to the Internet. Furthermore, another computer (i.e., controller, server, etc.) may access, for example, the controller 70 to exchange data via at least one of a direct connection, an intranet, and the Internet. As also would be appreciated by those skilled in the art, the controller 70 may exchange data with the processing system 1 via a wireless connection. [0060] A plurality of embodiments for forming aluminum-doped metal carbonithde gate electrodes have been described. The foregoing description of the embodiments of the invention has been presented for the purposes of illustration and description. It is not intended to be exhaustive or to limit the invention to the precise forms disclosed. This description and the claims following include terms that are used for descriptive purposes only and are not to be construed as limiting. For example, the term "on" as used herein (including in the claims) does not require that a first film "on" a second film is directly on and in immediate contact with the second film unless such is specifically stated; there may be a third film or other structure between the first film and the second film on the first film. [0061] Persons skilled in the relevant art can appreciate that many modifications and variations are possible in light of the above teaching. Persons skilled in the art will recognize various equivalent combinations and substitutions for various components shown in the Figures. It is therefore intended that the scope of the invention be limited not by this detailed description, but rather by the claims appended hereto.

Claims

WHAT IS CLAIMED IS:
1. A method of forming a semiconductor device, the method comprising: providing a substrate containing a dielectric layer thereon; and forming an aluminum-doped metal carbonitride gate electrode on the dielectric layer in the absence of plasma by: depositing a metal carbonitride film by exposing the substrate to a gas pulse of a metal carbonitride precursor, the metal carbonitride precursor comprising tantalum, titanium, or a combination thereof, adsorbing an atomic layer of an aluminum precursor on the metal carbonitride film by exposing the substrate to a gas pulse of the aluminum precursor, wherein, during the depositing and adsorbing, the substrate is maintained at a temperature above the thermal decomposition temperature of the metal carbonitride precursor and below the thermal decomposition temperature of the aluminum precursor, and repeating the depositing and adsorbing a desired number of times.
2. The method of claim 1 , wherein the depositing and adsorbing have no temporal overlap.
3. The method of claim 1 , wherein depositing the metal carbonitride film is performed without exposing the substrate to gas pulse containing an additional nitrogen source gas.
4. The method of claim 3, further comprising: depositing a first additional metal carbonitride film on the dielectric layer prior to depositing the metal carbonitride film and/or depositing a second additional metal carbonitride film on the aluminum-doped metal carbonitride gate electrode, wherein depositing the first and/or second additional metal carbonitride film comprises exposing the substrate to a gas pulse of an additional metal carbonitride precursor and an additional nitrogen source gas, the additional metal carbonitride precursor comprising tantalum, titanium, or a combination thereof, and the additional nitrogen source gas comprising NH3, NH(CHs)2, N2H4, or N2H3CH3.
5. The method of claim 1 , wherein depositing the metal carbonitride film further comprises exposing the substrate to gas pulse containing an additional nitrogen source gas having at least partial temporal overlap with the gas pulse of a metal carbonitride precursor.
6. The method of claim 5, wherein the gas pulse containing the additional nitrogen source gas comprises NH3, NH(CH3)2, N2H4, or N2H3CH3.
7. The method of claim 5, wherein the forming further comprises exposing the substrate to a second gas pulse of the additional nitrogen source gas, wherein the second gas pulse of the additional nitrogen source gas has no overlap with the gas pulse of the metal carbonitride precursor or with the gas pulse of the aluminum precursor.
8. The method of claim 5, wherein depositing the metal carbonitride film further comprises exposing the substrate to an additional gas pulse of the metal carbonitride precursor having no overlap with the gas pulse of the metal carbonitride precursor or the gas pulse of the aluminum precursor.
9. The method of claim 5, further comprising: depositing an additional metal carbonitride film on the aluminum-doped metal carbonitride gate electrode, wherein depositing the additional metal carbonitride film comprises exposing the substrate to a gas pulse of an additional metal carbonitride precursor and an additional nitrogen source gas, the additional metal carbonitride precursor comprising tantalum, titanium, or a combination thereof.
10. The method of claim 1 , wherein the metal carbonitride precursor comprises a tantalum carbonitride precursor having Ta-N intra-molecular bonds.
11. The method of claim 10, wherein the tantalum carbonitride precursor comprises Ta(NMe2)S(NCMe2Et) (TAIMATA), Ta(NEt2)5 (PDEAT), Ta(NMe2)5 (PDMAT), Ta(NEtMe)5 (PEMAT), (fBuN)Ta(NMe2)3 (TBTDMT), (fBuN)Ta(NEt2)3 (TBTDET), (^BuN)Ta(NEtMe)3 (TBTEMT), or (ZPrN)Ta(NEt2)3 (IPTDET).
12. The method of claim 1 , wherein the metal carbonitride precursor comprises a titanium carbonitride precursor having Ti-N intra-molecular bonds.
13. The method of claim 12, wherein the titanium carbonitride precursor is comprises Ti(NEt2)4 (TDEAT), Ti(NMeEt)4 (TEMAT), or Ti(NMe2)4 (TDMAT).
14. The method of claim 1 , wherein the aluminum precursor comprises AIMe3, AIEt3, AIMe2H, [AI(OsBu)3]4, AI(CH3COCHCOCH3)3, AICI3, AIBr3, AII3, AI(OzPr)3, [AI(NMe2)3]2, AI(ZBu)2CI, AI(ZBu)3, AI(ZBu)2H, AIEt2CI, Et3AI2(OsBu)3, AI(THD)3, H3AINMe3, H3AINEt3, H3AINMe2Et, or H3AIMeEt2.
15. The method of claim 1 , wherein the aluminum-doped metal carbonitride gate electrode comprises between 5 and 50 atomic percent aluminum.
16. A method of forming a semiconductor device, the method comprising: providing a substrate containing a high-k film thereon; and forming an aluminum-doped metal carbonitride gate electrode on the dielectric layer in the absence of plasma, the forming comprising: depositing a metal carbonitride film by exposing the substrate to a gas pulse of a metal carbonitride precursor and exposing the substrate to gas pulse containing an additional nitrogen source gas having at least partial temporal overlap with the gas pulse of a metal carbonitride precursor, the metal carbonitride precursor comprising a tantalum carbonitride precursor having Ta-N intra-molecular bonds or a titanium carbonitride precursor having Ti-N intra-molecular bonds, adsorbing an atomic layer of an aluminum precursor on the metal carbonitride film by exposing the substrate to a gas pulse of the aluminum precursor, wherein the depositing and adsorbing have no temporal overlap, and during the depositing and adsorbing, the substrate is maintained at a temperature above the thermal decomposition temperature of the metal carbonitride precursor and below the thermal decomposition temperature of the aluminum precursor, and repeating the depositing and adsorbing a desired number of times.
17. The method of claim 16, wherein the gas pulse containing the additional nitrogen source gas comprises NH3, NH(CH3)2, N2H4, or N2H3CH3.
18. The method of claim 16, wherein the tantalum carbonitride precursor comprises Ta(NMe2)3(NCMe2Et) (TAIMATA), Ta(NEt2)5 (PDEAT), Ta(NMe2)5 (PDMAT), Ta(NEtMe)5 (PEMAT), (fBuN)Ta(NMe2)3 (TBTDMT), (fBuN)Ta(NEt2)3 (TBTDET), (^BuN)Ta(NEtMe)3 (TBTEMT), or (/PrN)Ta(NEt2)3 (IPTDET), the titanium carbonitride precursor comprises Ti(NEt2)4 (TDEAT), Ti(NMeEt)4 (TEMAT), or Ti(NMe2)4 (TDMAT), and the aluminum precursor comprises AIMe3, AIEt3, AIMe2H, [AI(OsBu)3]4, AI(CH3COCHCOCH3)3, AICI3, AIBr3, AII3, AI(OzPr)3, [AI(NMe2)3]2, AI(ZBu)2CI, AI(ZBu)3, AI(ZBu)2H, AIEt2CI, Et3AI2(OsBu)3, AI(THD)3, H3AINMe3, H3AINEt3, H3AINMe2Et, or H3AIMeEt2.
19. The method of claim 16, wherein the aluminum-doped metal carbonitride gate electrode comprises between 5 and 50 atomic percent aluminum.
20. A method of forming a semiconductor device, the method comprising: providing a substrate containing a high-k film thereon; and forming an aluminum-doped tantalum carbonitride gate electrode on the dielectric layer in the absence of plasma, the forming comprising: depositing a tantalum carbonitride film by exposing the substrate to a gas pulse of a (/BuN)Ta(NEtMe)3 (TBTEMT) precursor, adsorbing an atomic layer of an AIMe3 precursor on the tantalum carbonitride film by exposing the substrate to a gas pulse of the AIMe3 precursor, wherein, during the depositing and adsorbing, the substrate is maintained at a temperature above the thermal decomposition temperature of the (BuN)Ta(NEtMe)3 (TBTEMT) precursor and below the thermal decomposition temperature of the AIMe3 precursor, and repeating the depositing and adsorbing a desired number of times, wherein the aluminum-doped metal carbonitride gate electrode comprises between 5 and 50 atomic percent aluminum.
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Families Citing this family (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20100102393A1 (en) * 2008-10-29 2010-04-29 Chartered Semiconductor Manufacturing, Ltd. Metal gate transistors
JP2014222723A (en) * 2013-05-14 2014-11-27 独立行政法人産業技術総合研究所 Field-effect semiconductor device and method of manufacturing the same
US9552979B2 (en) * 2013-05-31 2017-01-24 Asm Ip Holding B.V. Cyclic aluminum nitride deposition in a batch reactor
US9224594B2 (en) 2013-11-18 2015-12-29 Intermolecular, Inc. Surface preparation with remote plasma
TWI611045B (en) 2014-02-03 2018-01-11 東京威力科創股份有限公司 Integration of ald barrier layer and cvd ru liner for void-free cu filling
US10163644B2 (en) 2014-02-07 2018-12-25 Taiwan Semiconductor Manufacturing Company Interconnect structure including a conductive feature and a barrier layer on sidewalls and a bottom surface of the conductive feature and method of forming the same
TWI556429B (en) 2014-07-10 2016-11-01 台灣積體電路製造股份有限公司 Integrated circuit device and method for manufacturing the same
KR102216575B1 (en) * 2014-10-23 2021-02-18 에이에스엠 아이피 홀딩 비.브이. Titanium aluminum and tantalum aluminum thin films
CN109285879B (en) * 2017-07-20 2021-06-08 中芯国际集成电路制造(上海)有限公司 Semiconductor structure and forming method thereof
US10665685B2 (en) 2017-11-30 2020-05-26 Taiwan Semiconductor Manufacturing Co., Ltd. Semiconductor device and fabrication method thereof
US11251261B2 (en) * 2019-05-17 2022-02-15 Micron Technology, Inc. Forming a barrier material on an electrode
US11456177B2 (en) * 2020-09-22 2022-09-27 Nanya Technology Corporation Method of manufacturing semiconductor device

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20070218704A1 (en) * 2006-03-20 2007-09-20 Tokyo Electron Limited Method of light enhanced atomic layer deposition
US20070231487A1 (en) * 2006-03-31 2007-10-04 Tokyo Electron Limited Method of forming a metal carbide or metal carbonitride film having improved adhesion
US20070251445A1 (en) * 2006-04-29 2007-11-01 Tokyo Electron Limited Method for Depositing a Barrier Layer on a Low Dielectric Constant Material
US20080141937A1 (en) * 2006-12-19 2008-06-19 Tokyo Electron Limited Method and system for controlling a vapor delivery system
US20080164581A1 (en) * 2007-01-04 2008-07-10 Interuniversitair Microelektronica Centrum (Imec) Vzw Electronic device and process for manufacturing the same

Family Cites Families (42)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4116682A (en) 1976-12-27 1978-09-26 Polk Donald E Amorphous metal alloys and products thereof
JP3225706B2 (en) * 1993-08-25 2001-11-05 ソニー株式会社 Method of forming barrier metal layer in semiconductor device
JPH11145077A (en) * 1997-10-31 1999-05-28 Texas Instr Inc <Ti> Film and its manufacture
US6445023B1 (en) 1999-03-16 2002-09-03 Micron Technology, Inc. Mixed metal nitride and boride barrier layers
US6627995B2 (en) 2000-03-03 2003-09-30 Cvc Products, Inc. Microelectronic interconnect material with adhesion promotion layer and fabrication method
US6455421B1 (en) 2000-07-31 2002-09-24 Applied Materials, Inc. Plasma treatment of tantalum nitride compound films formed by chemical vapor deposition
US6444263B1 (en) 2000-09-15 2002-09-03 Cvc Products, Inc. Method of chemical-vapor deposition of a material
US6630201B2 (en) 2001-04-05 2003-10-07 Angstron Systems, Inc. Adsorption process for atomic layer deposition
JP3963078B2 (en) 2000-12-25 2007-08-22 株式会社高純度化学研究所 Tertiary amylimidotris (dimethylamido) tantalum, method for producing the same, raw material solution for MOCVD using the same, and method for forming a tantalum nitride film using the same
US6861334B2 (en) 2001-06-21 2005-03-01 Asm International, N.V. Method of fabricating trench isolation structures for integrated circuits using atomic layer deposition
US7098131B2 (en) 2001-07-19 2006-08-29 Samsung Electronics Co., Ltd. Methods for forming atomic layers and thin films including tantalum nitride and devices including the same
KR100434697B1 (en) 2001-09-05 2004-06-07 주식회사 하이닉스반도체 Method for fabricating semiconductor device
KR100805843B1 (en) 2001-12-28 2008-02-21 에이에스엠지니텍코리아 주식회사 Method of forming copper interconnection, semiconductor device fabricated by the same and system for forming copper interconnection
JP3556206B2 (en) 2002-07-15 2004-08-18 沖電気工業株式会社 Method of forming metal wiring
US20040036129A1 (en) 2002-08-22 2004-02-26 Micron Technology, Inc. Atomic layer deposition of CMOS gates with variable work functions
JP2004095893A (en) 2002-08-30 2004-03-25 Nec Electronics Corp Semiconductor storage device, its control method and its manufacturing method
US6955986B2 (en) 2003-03-27 2005-10-18 Asm International N.V. Atomic layer deposition methods for forming a multi-layer adhesion-barrier layer for integrated circuits
US7186446B2 (en) 2003-10-31 2007-03-06 International Business Machines Corporation Plasma enhanced ALD of tantalum nitride and bilayer
US20050221021A1 (en) 2004-03-31 2005-10-06 Tokyo Electron Limited Method and system for performing atomic layer deposition
US20070059929A1 (en) * 2004-06-25 2007-03-15 Hag-Ju Cho Method of forming a tantalum carbon nitride layer and method of manufacturing a semiconductor device using the same
US7453149B2 (en) 2004-08-04 2008-11-18 Taiwan Semiconductor Manufacturing Co., Ltd. Composite barrier layer
US7300869B2 (en) 2004-09-20 2007-11-27 Lsi Corporation Integrated barrier and seed layer for copper interconnect technology
US20060113675A1 (en) 2004-12-01 2006-06-01 Chung-Liang Chang Barrier material and process for Cu interconnect
US7314835B2 (en) 2005-03-21 2008-01-01 Tokyo Electron Limited Plasma enhanced atomic layer deposition system and method
US20060210723A1 (en) 2005-03-21 2006-09-21 Tokyo Electron Limited Plasma enhanced atomic layer deposition system and method
US8486845B2 (en) 2005-03-21 2013-07-16 Tokyo Electron Limited Plasma enhanced atomic layer deposition system and method
US7341959B2 (en) 2005-03-21 2008-03-11 Tokyo Electron Limited Plasma enhanced atomic layer deposition system and method
US8974868B2 (en) 2005-03-21 2015-03-10 Tokyo Electron Limited Post deposition plasma cleaning system and method
US7422636B2 (en) 2005-03-25 2008-09-09 Tokyo Electron Limited Plasma enhanced atomic layer deposition system having reduced contamination
US20060213437A1 (en) 2005-03-28 2006-09-28 Tokyo Electron Limited Plasma enhanced atomic layer deposition system
US20070059502A1 (en) 2005-05-05 2007-03-15 Applied Materials, Inc. Integrated process for sputter deposition of a conductive barrier layer, especially an alloy of ruthenium and tantalum, underlying copper or copper alloy seed layer
US20060251872A1 (en) 2005-05-05 2006-11-09 Wang Jenn Y Conductive barrier layer, especially an alloy of ruthenium and tantalum and sputter deposition thereof
DE102005023122A1 (en) 2005-05-19 2006-11-23 Infineon Technologies Ag Integrated circuit arrangement with layer stack and method
US7550385B2 (en) 2005-09-30 2009-06-23 Intel Corporation Amine-free deposition of metal-nitride films
CN100565930C (en) * 2005-10-14 2009-12-02 株式会社东芝 Nonvolatile semiconductor memory device
US7897217B2 (en) 2005-11-18 2011-03-01 Tokyo Electron Limited Method and system for performing plasma enhanced atomic layer deposition
US20070116888A1 (en) 2005-11-18 2007-05-24 Tokyo Electron Limited Method and system for performing different deposition processes within a single chamber
WO2008031492A1 (en) 2006-09-13 2008-03-20 Ormecon Gmbh Article with a coating of electrically conductive polymer and precious/semiprecious metal and process for production thereof
US20080132050A1 (en) 2006-12-05 2008-06-05 Lavoie Adrien R Deposition process for graded cobalt barrier layers
JP2008205012A (en) * 2007-02-16 2008-09-04 Matsushita Electric Ind Co Ltd Semiconductor device and method for manufacturing the same
JP5513767B2 (en) 2008-06-25 2014-06-04 株式会社日立国際電気 Semiconductor device manufacturing method, substrate processing method, substrate processing apparatus, and semiconductor device
US8557702B2 (en) * 2009-02-02 2013-10-15 Asm America, Inc. Plasma-enhanced atomic layers deposition of conductive material over dielectric layers

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20070218704A1 (en) * 2006-03-20 2007-09-20 Tokyo Electron Limited Method of light enhanced atomic layer deposition
US20070231487A1 (en) * 2006-03-31 2007-10-04 Tokyo Electron Limited Method of forming a metal carbide or metal carbonitride film having improved adhesion
US20070251445A1 (en) * 2006-04-29 2007-11-01 Tokyo Electron Limited Method for Depositing a Barrier Layer on a Low Dielectric Constant Material
US20080141937A1 (en) * 2006-12-19 2008-06-19 Tokyo Electron Limited Method and system for controlling a vapor delivery system
US20080164581A1 (en) * 2007-01-04 2008-07-10 Interuniversitair Microelektronica Centrum (Imec) Vzw Electronic device and process for manufacturing the same

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
ALEN, P. ET AL.: "?Atomic layer deposition of Ta(AI)N(C) thin films using trimethylaluminum as a reducing agent,?", JOURNAL OF THE ELECTROCHEMICAL SOCIETY, vol. 148, no. 10, 31 August 2001 (2001-08-31), pages G566 - G571, Retrieved from the Internet <URL:http://scitation.aip.org/getpdf/servlet/GetPDFServlet?filetype=pdf&id=JESOAN00014800001000G566000001&idtype=cvips&prog=normal> [retrieved on 20090923] *

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