WO2010030493A3 - Transistor with a passive gate and methods of fabricating the same - Google Patents

Transistor with a passive gate and methods of fabricating the same Download PDF

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Publication number
WO2010030493A3
WO2010030493A3 PCT/US2009/054646 US2009054646W WO2010030493A3 WO 2010030493 A3 WO2010030493 A3 WO 2010030493A3 US 2009054646 W US2009054646 W US 2009054646W WO 2010030493 A3 WO2010030493 A3 WO 2010030493A3
Authority
WO
WIPO (PCT)
Prior art keywords
transistor
fabricating
methods
same
drain
Prior art date
Application number
PCT/US2009/054646
Other languages
French (fr)
Other versions
WO2010030493A2 (en
Inventor
Werner Juengling
Original Assignee
Micron Technology, Inc.
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Micron Technology, Inc. filed Critical Micron Technology, Inc.
Priority to CN200980136187.5A priority Critical patent/CN102160158B/en
Publication of WO2010030493A2 publication Critical patent/WO2010030493A2/en
Publication of WO2010030493A3 publication Critical patent/WO2010030493A3/en

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Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • H01L29/785Field effect transistors with field effect produced by an insulated gate having a channel with a horizontal current flow in a vertical sidewall of a semiconductor body, e.g. FinFET, MuGFET
    • H01L29/7851Field effect transistors with field effect produced by an insulated gate having a channel with a horizontal current flow in a vertical sidewall of a semiconductor body, e.g. FinFET, MuGFET with the body tied to the substrate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/40Electrodes ; Multistep manufacturing processes therefor
    • H01L29/41Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
    • H01L29/423Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
    • H01L29/42312Gate electrodes for field effect devices
    • H01L29/42316Gate electrodes for field effect devices for field-effect transistors
    • H01L29/4232Gate electrodes for field effect devices for field-effect transistors with insulated gate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007Multistep manufacturing processes
    • H01L29/66075Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409Unipolar field-effect transistors
    • H01L29/66477Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/66787Unipolar field-effect transistors with an insulated gate, i.e. MISFET with a gate at the side of the channel
    • H01L29/66795Unipolar field-effect transistors with an insulated gate, i.e. MISFET with a gate at the side of the channel with a horizontal current flow in a vertical sidewall of a semiconductor body, e.g. FinFET, MuGFET

Abstract

Disclosed is a device having a transistor (204, 244, 286) that includes a source, a drain, a channel region extending between the source and the drain, a gate (196, 238, 284) disposed near the channel region, and a conductive member (197, 240, 264) disposed opposite of the channel region from the gate (196, 238, 284). The conductive member (197, 240, 264) may not overlap the source, the drain, or both the source and the drain.
PCT/US2009/054646 2008-09-15 2009-08-21 Transistor with a passive gate and methods of fabricating the same WO2010030493A2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN200980136187.5A CN102160158B (en) 2008-09-15 2009-08-21 Transistor with passive gate and methods of fabricating same

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US12/210,305 2008-09-15
US12/210,305 US8148776B2 (en) 2008-09-15 2008-09-15 Transistor with a passive gate

Publications (2)

Publication Number Publication Date
WO2010030493A2 WO2010030493A2 (en) 2010-03-18
WO2010030493A3 true WO2010030493A3 (en) 2011-04-07

Family

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Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/US2009/054646 WO2010030493A2 (en) 2008-09-15 2009-08-21 Transistor with a passive gate and methods of fabricating the same

Country Status (5)

Country Link
US (1) US8148776B2 (en)
KR (1) KR101626178B1 (en)
CN (1) CN102160158B (en)
TW (1) TWI456759B (en)
WO (1) WO2010030493A2 (en)

Families Citing this family (26)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7808042B2 (en) * 2008-03-20 2010-10-05 Micron Technology, Inc. Systems and devices including multi-gate transistors and methods of using, making, and operating the same
US7996163B2 (en) * 2008-09-15 2011-08-09 Caterpillar Inc. Method and apparatus for detecting a short circuit in a DC link
TW201036142A (en) * 2009-03-16 2010-10-01 Nanya Technology Corp Manufacturing method of supporting structure for stack capacitor in semiconductor device
US8101486B2 (en) * 2009-10-07 2012-01-24 Globalfoundries Inc. Methods for forming isolated fin structures on bulk semiconductor material
JP5638218B2 (en) * 2009-10-15 2014-12-10 三菱電機株式会社 Semiconductor device and manufacturing method thereof
US8334196B2 (en) 2010-11-01 2012-12-18 Micron Technology, Inc. Methods of forming conductive contacts in the fabrication of integrated circuitry
US8921899B2 (en) 2010-11-19 2014-12-30 Micron Technology, Inc. Double gated 4F2 dram CHC cell and methods of fabricating the same
US9553193B2 (en) 2010-11-19 2017-01-24 Micron Technology, Inc. Double gated fin transistors and methods of fabricating and operating the same
US8293602B2 (en) 2010-11-19 2012-10-23 Micron Technology, Inc. Method of fabricating a finFET having cross-hair cells
US8294511B2 (en) 2010-11-19 2012-10-23 Micron Technology, Inc. Vertically stacked fin transistors and methods of fabricating and operating the same
US8815677B2 (en) * 2011-06-14 2014-08-26 Intermolecular, Inc. Method of processing MIM capacitors to reduce leakage current
KR101612657B1 (en) * 2011-12-22 2016-04-14 인텔 코포레이션 Gate aligned contact and method to fabricate same
US8796085B2 (en) * 2012-10-12 2014-08-05 Viktor Koldiaev Vertical super-thin body semiconductor on dielectric wall devices and methods of their fabrication
US9093335B2 (en) * 2012-11-29 2015-07-28 Taiwan Semiconductor Manufacturing Company, Ltd. Calculating carrier concentrations in semiconductor Fins using probed resistance
JP5961563B2 (en) * 2013-01-25 2016-08-02 株式会社豊田中央研究所 Manufacturing method of semiconductor device
US9076870B2 (en) * 2013-02-21 2015-07-07 United Microelectronics Corp. Method for forming fin-shaped structure
US9805934B2 (en) * 2013-11-15 2017-10-31 Taiwan Semiconductor Manufacturing Co., Ltd. Formation of contact/via hole with self-alignment
US9171855B2 (en) * 2013-12-30 2015-10-27 Globalfoundries Singapore Pte. Ltd. Three-dimensional non-volatile memory
US9331158B2 (en) * 2014-09-15 2016-05-03 Qualcomm, Incorporated Transistor devices and methods
US9934970B1 (en) * 2017-01-11 2018-04-03 International Business Machines Corporation Self aligned pattern formation post spacer etchback in tight pitch configurations
US10643906B2 (en) * 2017-12-15 2020-05-05 Micron Technology, Inc. Methods of forming a transistor and methods of forming an array of memory cells
US10818665B2 (en) 2018-08-24 2020-10-27 Micron Technology, Inc. Array of recessed access devices and an array of memory cells individually comprising a capacitor and a transistor
CN112956030A (en) 2018-10-09 2021-06-11 美光科技公司 Semiconductor device including transistor with increased threshold voltage and related methods and systems
US20200212045A1 (en) * 2018-12-26 2020-07-02 Kamal M. Karda Vertical 2-transistor memory cell
KR20210064593A (en) 2019-11-26 2021-06-03 삼성전자주식회사 Semiconductor devices
CN113451318B (en) * 2020-03-24 2023-06-23 中芯国际集成电路制造(上海)有限公司 Semiconductor device and forming method thereof

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5977579A (en) * 1998-12-03 1999-11-02 Micron Technology, Inc. Trench dram cell with vertical device and buried word lines
US20030111686A1 (en) * 2001-12-13 2003-06-19 Nowak Edward J. Method for forming asymmetric dual gate transistor
US20070262375A1 (en) * 2006-05-12 2007-11-15 Werner Juengling Non-planar transistor and techniques for fabricating the same

Family Cites Families (95)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3885861A (en) 1972-10-02 1975-05-27 Hughes Aircraft Co Liquid crystal digital reticle
US5196910A (en) 1987-04-24 1993-03-23 Hitachi, Ltd. Semiconductor memory device with recessed array region
US5160987A (en) 1989-10-26 1992-11-03 International Business Machines Corporation Three-dimensional semiconductor structures formed from planar layers
US5109256A (en) 1990-08-17 1992-04-28 National Semiconductor Corporation Schottky barrier diodes and Schottky barrier diode-clamped transistors and method of fabrication
US6791131B1 (en) 1993-04-02 2004-09-14 Micron Technology, Inc. Method for forming a storage cell capacitor compatible with high dielectric constant materials
US5864181A (en) 1993-09-15 1999-01-26 Micron Technology, Inc. Bi-level digit line architecture for high density DRAMs
JPH07263576A (en) 1994-03-25 1995-10-13 Hitachi Ltd Semiconductor integrated circuit device and manufacture thereof
US6831322B2 (en) 1995-06-05 2004-12-14 Fujitsu Limited Semiconductor memory device and method for fabricating the same
JP3853406B2 (en) 1995-10-27 2006-12-06 エルピーダメモリ株式会社 Semiconductor integrated circuit device and method for manufacturing the same
US6043562A (en) 1996-01-26 2000-03-28 Micron Technology, Inc. Digit line architecture for dynamic memory
WO1997028532A1 (en) 1996-02-01 1997-08-07 Micron Technology, Inc. Digit line architecture for dynamic memory
US5688709A (en) 1996-02-14 1997-11-18 Lsi Logic Corporation Method for forming composite trench-fin capacitors for DRAMS
US5793033A (en) 1996-03-29 1998-08-11 Metanetics Corporation Portable data collection device with viewing assembly
US7064376B2 (en) 1996-05-24 2006-06-20 Jeng-Jye Shau High performance embedded semiconductor memory devices with multiple dimension first-level bit-lines
US5821513A (en) 1996-06-26 1998-10-13 Telxon Corporation Shopping cart mounted portable data collection device with tethered dataform reader
US6285045B1 (en) 1996-07-10 2001-09-04 Fujitsu Limited Semiconductor device with self-aligned contact and its manufacture
JP3941133B2 (en) 1996-07-18 2007-07-04 富士通株式会社 Semiconductor device and manufacturing method thereof
US6130144A (en) 1997-01-02 2000-10-10 Texas Instruments Incorporated Method for making very shallow junctions in silicon devices
US6072209A (en) 1997-07-08 2000-06-06 Micro Technology, Inc. Four F2 folded bit line DRAM cell structure having buried bit and word lines
US5925918A (en) 1997-07-30 1999-07-20 Micron, Technology, Inc. Gate stack with improved sidewall integrity
US6130551A (en) 1998-01-19 2000-10-10 Vantis Corporation Synthesis-friendly FPGA architecture with variable length and variable timing interconnect
US6097212A (en) 1997-10-09 2000-08-01 Lattice Semiconductor Corporation Variable grain architecture for FPGA integrated circuits
US6137128A (en) 1998-06-09 2000-10-24 International Business Machines Corporation Self-isolated and self-aligned 4F-square vertical fet-trench dram cells
US5858829A (en) 1998-06-29 1999-01-12 Vanguard International Semiconductor Corporation Method for fabricating dynamic random access memory (DRAM) cells with minimum active cell areas using sidewall-spacer bit lines
TW388125B (en) 1998-08-19 2000-04-21 Vanguard Int Semiconduct Corp Method for fabricating dynamic random access memory (DRAM) cells with minimum active cell areas
DE19842704C2 (en) 1998-09-17 2002-03-28 Infineon Technologies Ag Manufacturing process for a capacitor with a high epsilon dielectric or a ferroelectric according to the fin stack principle using a negative mold
TW380316B (en) 1998-10-15 2000-01-21 Worldwide Semiconductor Mfg Manufacturing method for fin-trench-structure capacitor of DRAM
US6100129A (en) 1998-11-09 2000-08-08 Worldwide Semiconductor Manufacturing Corporation Method for making fin-trench structured DRAM capacitor
US6426175B2 (en) 1999-02-22 2002-07-30 International Business Machines Corporation Fabrication of a high density long channel DRAM gate with or without a grooved gate
US6690056B1 (en) 1999-04-06 2004-02-10 Peregrine Semiconductor Corporation EEPROM cell on SOI
US6667506B1 (en) 1999-04-06 2003-12-23 Peregrine Semiconductor Corporation Variable capacitor with programmability
KR100325472B1 (en) 1999-04-15 2002-03-04 박종섭 Manufacturing Method of DRAM Memory Cells
US6468849B1 (en) 1999-06-11 2002-10-22 Texas Instruments Incorporated Methods and devices for optimized digital and analog CMOS transistor performance in deep submicron technology
JP4074051B2 (en) 1999-08-31 2008-04-09 株式会社東芝 Semiconductor substrate and manufacturing method thereof
DE19946719A1 (en) 1999-09-29 2001-04-19 Infineon Technologies Ag Trench capacitor used in the production of DRAM storage cells has a conducting contact layer between the substrate and the conducting trench filling in the trench above the insulating collar
US6282113B1 (en) 1999-09-29 2001-08-28 International Business Machines Corporation Four F-squared gapless dual layer bitline DRAM array architecture
JP3457236B2 (en) 1999-11-05 2003-10-14 茂徳科技股▲ふん▼有限公司 Method of manufacturing deep trench capacitor storage electrode
US6252284B1 (en) * 1999-12-09 2001-06-26 International Business Machines Corporation Planarized silicon fin device
WO2001061738A1 (en) 2000-02-15 2001-08-23 Steag Cvd Systems Ltd. Dram capacitor with ultra-thin nitride layer
US6548363B1 (en) 2000-04-11 2003-04-15 Taiwan Semiconductor Manufacturing Company Method to reduce the gate induced drain leakage current in CMOS devices
JP3983960B2 (en) 2000-07-14 2007-09-26 株式会社ルネサステクノロジ Manufacturing method of semiconductor integrated circuit device and semiconductor integrated circuit device
KR100466689B1 (en) 2000-08-28 2005-01-24 인터내셔널 비지네스 머신즈 코포레이션 Compact dual-port dram architecture system and method for making same
US6509226B1 (en) 2000-09-27 2003-01-21 International Business Machines Corporation Process for protecting array top oxide
US6413802B1 (en) 2000-10-23 2002-07-02 The Regents Of The University Of California Finfet transistor structures having a double gate channel extending vertically from a substrate and methods of manufacture
US6967147B1 (en) 2000-11-16 2005-11-22 Infineon Technologies Ag Nitrogen implantation using a shadow effect to control gate oxide thickness in DRAM semiconductor
US6258659B1 (en) 2000-11-29 2001-07-10 International Business Machines Corporation Embedded vertical DRAM cells and dual workfunction logic gates
US6576944B2 (en) 2000-12-14 2003-06-10 Infineon Technologies Ag Self-aligned nitride pattern for improved process window
CA2340985A1 (en) 2001-03-14 2002-09-14 Atmos Corporation Interleaved wordline architecture
US6809368B2 (en) 2001-04-11 2004-10-26 International Business Machines Corporation TTO nitride liner for improved collar protection and TTO reliability
US7190060B1 (en) 2002-01-09 2007-03-13 Bridge Semiconductor Corporation Three-dimensional stacked semiconductor package device with bent and flat leads and method of making same
US6865100B2 (en) 2002-08-12 2005-03-08 Micron Technology, Inc. 6F2 architecture ROM embedded DRAM
US6927462B2 (en) 2002-08-28 2005-08-09 Infineon Technologes Richmond, Lp Method of forming a gate contact in a semiconductor device
US6670682B1 (en) 2002-08-29 2003-12-30 Micron Technology, Inc. Multilayered doped conductor
DE10241171A1 (en) * 2002-09-05 2004-03-18 Infineon Technologies Ag Word and bit line arrangement for a FINFET semiconductor memory
DE10248722A1 (en) 2002-10-18 2004-05-06 Infineon Technologies Ag Integrated circuit arrangement with capacitor and manufacturing process
KR100498476B1 (en) 2003-01-11 2005-07-01 삼성전자주식회사 MOSFET having recessed channel and fabricating method thereof
DE10302128B3 (en) 2003-01-21 2004-09-09 Infineon Technologies Ag Buffer amplifier system for buffer storage of signals runs several DRAM chips in parallel and has two output buffer amplifiers in parallel feeding reference and signal networks with capacitors and DRAMs
US6845033B2 (en) 2003-03-05 2005-01-18 International Business Machines Corporation Structure and system-on-chip integration of a two-transistor and two-capacitor memory cell for trench technology
JP2004281782A (en) 2003-03-17 2004-10-07 Toshiba Corp Semiconductor device and its manufacturing method
US6794254B1 (en) 2003-05-15 2004-09-21 Taiwan Semiconductor Manufacturing Company Embedded dual-port DRAM process
US7099216B2 (en) 2003-09-05 2006-08-29 International Business Machines Corporation Single cycle read/write/writeback pipeline, full-wordline I/O DRAM architecture with enhanced write and single ended sensing
US6844591B1 (en) 2003-09-17 2005-01-18 Micron Technology, Inc. Method of forming DRAM access transistors
DE10361695B3 (en) 2003-12-30 2005-02-03 Infineon Technologies Ag Transistor structure for dynamic random-access memory cell has recess structure between source/drain regions and vertical gate electrode enclosing active region on at least 2 sides
US6998666B2 (en) 2004-01-09 2006-02-14 International Business Machines Corporation Nitrided STI liner oxide for reduced corner device impact on vertical device performance
DE102004006520B4 (en) 2004-02-10 2010-05-12 Qimonda Ag Method for producing a DRAM memory cell arrangement with trench capacitors and ridge field effect transistors (FinFET) and DRAM memory cell arrangement
US7176092B2 (en) * 2004-04-16 2007-02-13 Taiwan Semiconductor Manufacturing Company Gate electrode for a semiconductor fin device
US7564105B2 (en) 2004-04-24 2009-07-21 Taiwan Semiconductor Manufacturing Co., Ltd. Quasi-plannar and FinFET-like transistors on bulk silicon
DE102004021052B3 (en) 2004-04-29 2005-12-29 Infineon Technologies Ag Method for fabricating trench DRAM memory cells and trench DRAM memory cell array with curved channel bridge field effect transistors (CFET)
US7098105B2 (en) 2004-05-26 2006-08-29 Micron Technology, Inc. Methods for forming semiconductor structures
DE102004031385B4 (en) 2004-06-29 2010-12-09 Qimonda Ag A method of fabricating ridge field effect transistors in a DRAM memory cell array, curved channel field effect transistors, and DRAM memory cell array
US7132333B2 (en) 2004-09-10 2006-11-07 Infineon Technologies Ag Transistor, memory cell array and method of manufacturing a transistor
JP2006054431A (en) 2004-06-29 2006-02-23 Infineon Technologies Ag Transistor, memory cell array, and manufacturing method of the transistor
DE102004043857B3 (en) 2004-09-10 2006-03-30 Infineon Technologies Ag DRAM cell pair and DRAM memory cell array with stack and trench memory cells, and method of fabricating a DRAM memory cell array
DE102004043858A1 (en) 2004-09-10 2006-03-16 Infineon Technologies Ag Method for producing a memory cell, a memory cell arrangement and memory cell arrangement
KR100585161B1 (en) 2004-10-02 2006-05-30 삼성전자주식회사 Manufacturing method and device of multi-channel transistor
EP1812964A1 (en) * 2004-11-10 2007-08-01 Gil Asa Transistor structure and method of manufacturing thereof
US7476920B2 (en) 2004-12-15 2009-01-13 Infineon Technologies Ag 6F2 access transistor arrangement and semiconductor memory device
US7254074B2 (en) 2005-03-07 2007-08-07 Micron Technology, Inc. Open digit line array architecture for a memory array
US7316953B2 (en) 2005-05-31 2008-01-08 Nanya Technology Corporation Method for forming a recessed gate with word lines
KR100608380B1 (en) 2005-06-01 2006-08-08 주식회사 하이닉스반도체 Transistor of memory device and method for fabricating the same
US7282401B2 (en) 2005-07-08 2007-10-16 Micron Technology, Inc. Method and apparatus for a self-aligned recessed access device (RAD) transistor gate
US7776715B2 (en) 2005-07-26 2010-08-17 Micron Technology, Inc. Reverse construction memory cell
US7151023B1 (en) 2005-08-01 2006-12-19 International Business Machines Corporation Metal gate MOSFET by full semiconductor metal alloy conversion
US8188551B2 (en) * 2005-09-30 2012-05-29 Infineon Technologies Ag Semiconductor devices and methods of manufacture thereof
US20070058468A1 (en) 2005-09-12 2007-03-15 Promos Technologies Pte.Ltd. Singapore Shielded bitline architecture for dynamic random access memory (DRAM) arrays
KR100653712B1 (en) 2005-11-14 2006-12-05 삼성전자주식회사 Semiconductor devices with a device isolation layer having a substantially same top surface compared with a top surface of an active region in a finfet and methods of forming the same
US7402856B2 (en) 2005-12-09 2008-07-22 Intel Corporation Non-planar microelectronic device having isolation element to mitigate fringe effects and method to fabricate same
US8716772B2 (en) 2005-12-28 2014-05-06 Micron Technology, Inc. DRAM cell design with folded digitline sense amplifier
KR100734304B1 (en) 2006-01-16 2007-07-02 삼성전자주식회사 Method of fabricating a transistor
KR100720238B1 (en) 2006-01-23 2007-05-23 주식회사 하이닉스반도체 Semiconductor device and method for fabricating the same
US20070176253A1 (en) 2006-01-31 2007-08-02 Peng-Fei Wang Transistor, memory cell and method of manufacturing a transistor
TWI294640B (en) 2006-02-16 2008-03-11 Nanya Technology Corp Alignment mark and alignment method for the fabrication of trench-capacitor dram devices
TWI277153B (en) 2006-03-21 2007-03-21 Promos Technologies Inc Semiconductor device with recessed channel and method of fabricating the same
JP2008010503A (en) * 2006-06-27 2008-01-17 Toshiba Corp Semiconductor memory device and its manufacturing method
JP4445521B2 (en) * 2007-06-15 2010-04-07 株式会社東芝 Semiconductor device

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5977579A (en) * 1998-12-03 1999-11-02 Micron Technology, Inc. Trench dram cell with vertical device and buried word lines
US20030111686A1 (en) * 2001-12-13 2003-06-19 Nowak Edward J. Method for forming asymmetric dual gate transistor
US20070262375A1 (en) * 2006-05-12 2007-11-15 Werner Juengling Non-planar transistor and techniques for fabricating the same

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
BOURNEL ET AL: "Device performance and optimization of decananometer long double gate MOSFET by Monte Carlo simulation", SOLID STATE ELECTRONICS, ELSEVIER SCIENCE PUBLISHERS, BARKING, GB LNKD- DOI:10.1016/J.SSE.2007.02.010, vol. 51, no. 4, 10 April 2007 (2007-04-10), pages 543 - 550, XP022025454, ISSN: 0038-1101 *

Also Published As

Publication number Publication date
TWI456759B (en) 2014-10-11
WO2010030493A2 (en) 2010-03-18
TW201021210A (en) 2010-06-01
CN102160158B (en) 2013-05-22
US20100066440A1 (en) 2010-03-18
KR20110057235A (en) 2011-05-31
CN102160158A (en) 2011-08-17
KR101626178B1 (en) 2016-05-31
US8148776B2 (en) 2012-04-03

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