WO2011072061A3 - Enhanced passivation process to protect silicon prior to high dose implant strip - Google Patents

Enhanced passivation process to protect silicon prior to high dose implant strip Download PDF

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Publication number
WO2011072061A3
WO2011072061A3 PCT/US2010/059547 US2010059547W WO2011072061A3 WO 2011072061 A3 WO2011072061 A3 WO 2011072061A3 US 2010059547 W US2010059547 W US 2010059547W WO 2011072061 A3 WO2011072061 A3 WO 2011072061A3
Authority
WO
WIPO (PCT)
Prior art keywords
high dose
passivation process
implant strip
photoresist
dose implant
Prior art date
Application number
PCT/US2010/059547
Other languages
French (fr)
Other versions
WO2011072061A2 (en
Inventor
David Cheung
Haoquan Fang
Jack Kuo
Ilia Kalinovski
Ted Li
Andrew Yao
Original Assignee
Novellus Systems, Inc.
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Novellus Systems, Inc. filed Critical Novellus Systems, Inc.
Priority to KR1020127017871A priority Critical patent/KR101770008B1/en
Priority to CN201080055428.6A priority patent/CN102652351B/en
Priority to JP2012543261A priority patent/JP5770740B2/en
Publication of WO2011072061A2 publication Critical patent/WO2011072061A2/en
Publication of WO2011072061A3 publication Critical patent/WO2011072061A3/en

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/3065—Plasma etching; Reactive-ion etching
    • H01L21/30655—Plasma etching; Reactive-ion etching comprising alternated and repeated etching and passivation steps, e.g. Bosch process
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J37/00—Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
    • H01J37/32—Gas-filled discharge tubes
    • H01J37/32009—Arrangements for generation of plasma specially adapted for examination or treatment of objects, e.g. plasma sources
    • H01J37/32357—Generation remote from the workpiece, e.g. down-stream
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02041—Cleaning
    • H01L21/02057—Cleaning during device manufacture
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
    • H01L21/0271—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers
    • H01L21/0273—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers characterised by the treatment of photoresist layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105—After-treatment
    • H01L21/311—Etching the insulating layers by chemical or physical means
    • H01L21/31127—Etching organic layers
    • H01L21/31133—Etching organic layers by chemical means
    • H01L21/31138—Etching organic layers by chemical means by dry-etching

Abstract

improved methods and apparatus for stripping photoresist and removing ion implant related residues from a work piece surface are provided. According to various embodiments, the workpiece is exposed to a passivation plasma, allowed to cool for a period of time, and then exposed to an oxygen-based or hydrogen-based plasma to remove the photoresist and ion implant related residues. Aspects of the invention include reducing silicon loss, leaving little or no residue while maintaining an acceptable strip rate. In certain embodiments, methods and apparatus remove photoresist material after high-dose ion implantation processes.
PCT/US2010/059547 2009-12-11 2010-12-08 Enhanced passivation process to protect silicon prior to high dose implant strip WO2011072061A2 (en)

Priority Applications (3)

Application Number Priority Date Filing Date Title
KR1020127017871A KR101770008B1 (en) 2009-12-11 2010-12-08 Enhanced passivation process to protect silicon prior to high dose implant strip
CN201080055428.6A CN102652351B (en) 2009-12-11 2010-12-08 The enhanced passivation technology of protection silicon before high dose is implanted and divested
JP2012543261A JP5770740B2 (en) 2009-12-11 2010-12-08 Method and apparatus for improving the passivation process to protect silicon prior to high dose implant strips

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US28591809P 2009-12-11 2009-12-11
US61/285,918 2009-12-11

Publications (2)

Publication Number Publication Date
WO2011072061A2 WO2011072061A2 (en) 2011-06-16
WO2011072061A3 true WO2011072061A3 (en) 2011-09-22

Family

ID=44141527

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/US2010/059547 WO2011072061A2 (en) 2009-12-11 2010-12-08 Enhanced passivation process to protect silicon prior to high dose implant strip

Country Status (6)

Country Link
US (1) US8721797B2 (en)
JP (1) JP5770740B2 (en)
KR (1) KR101770008B1 (en)
CN (1) CN102652351B (en)
TW (1) TWI518773B (en)
WO (1) WO2011072061A2 (en)

Cited By (3)

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Publication number Priority date Publication date Assignee Title
US8721797B2 (en) 2009-12-11 2014-05-13 Novellus Systems, Inc. Enhanced passivation process to protect silicon prior to high dose implant strip
US9514954B2 (en) 2014-06-10 2016-12-06 Lam Research Corporation Peroxide-vapor treatment for enhancing photoresist-strip performance and modifying organic films
US9564344B2 (en) 2009-12-11 2017-02-07 Novellus Systems, Inc. Ultra low silicon loss high dose implant strip

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US8193096B2 (en) 2004-12-13 2012-06-05 Novellus Systems, Inc. High dose implantation strip (HDIS) in H2 base chemistry
US8129281B1 (en) 2005-05-12 2012-03-06 Novellus Systems, Inc. Plasma based photoresist removal system for cleaning post ash residue
US7740768B1 (en) 2006-10-12 2010-06-22 Novellus Systems, Inc. Simultaneous front side ash and backside clean
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US8591661B2 (en) 2009-12-11 2013-11-26 Novellus Systems, Inc. Low damage photoresist strip method for low-K dielectrics
US9613825B2 (en) 2011-08-26 2017-04-04 Novellus Systems, Inc. Photoresist strip processes for improved device integrity
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US11501972B2 (en) 2020-07-22 2022-11-15 Applied Materials, Inc. Sacrificial capping layer for passivation using plasma-based implant process
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