WO2011120216A1 - Method, system and processor for performing count of instruction execution times - Google Patents

Method, system and processor for performing count of instruction execution times Download PDF

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Publication number
WO2011120216A1
WO2011120216A1 PCT/CN2010/071391 CN2010071391W WO2011120216A1 WO 2011120216 A1 WO2011120216 A1 WO 2011120216A1 CN 2010071391 W CN2010071391 W CN 2010071391W WO 2011120216 A1 WO2011120216 A1 WO 2011120216A1
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Prior art keywords
instruction
counting
module
processor
specified
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PCT/CN2010/071391
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French (fr)
Chinese (zh)
Inventor
韩冰
Original Assignee
华为技术有限公司
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Publication date
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Priority to PCT/CN2010/071391 priority Critical patent/WO2011120216A1/en
Priority to CN201080004276.7A priority patent/CN102947803B/en
Publication of WO2011120216A1 publication Critical patent/WO2011120216A1/en

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    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/30Monitoring
    • G06F11/34Recording or statistical evaluation of computer activity, e.g. of down time, of input/output operation ; Recording or statistical evaluation of user activity, e.g. usability assessment
    • G06F11/3466Performance evaluation by tracing or monitoring
    • G06F11/3476Data logging
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F2201/00Indexing scheme relating to error detection, to error correction, and to monitoring
    • G06F2201/88Monitoring involving counting

Definitions

  • Embodiments of the present invention relate to the field of computers, and in particular, to a method, system, and processor for counting the number of times an instruction is executed. Background technique
  • a processor is a component of a computer that interprets and executes instructions.
  • the processor executes an instruction, it is sometimes necessary to count the number of executions of the instruction, and solve the problem actually encountered according to the counting of the number of executions of the instruction. For example, dynamically design a software system based on the count of instruction execution times to determine the main business processes in the software system; in some embedded systems that cannot be debugged or in a user's production environment where reliability requirements are high, the number of executions by instructions The count is used to determine which processes are currently running in the software system, and which error processes have been processed to narrow down the problem and improve the efficiency of problem solving.
  • the prior art counts the number of instruction executions by writing instructions for counting in the software system, and the processor implements counting by running these instructions for counting.
  • the embodiment of the invention provides a method, a system and a processor for counting the number of executions of an instruction, which solves the defects in the prior art that the software system writes the instruction for counting and causes the performance of the software system to be greatly reduced, so as to improve the software system. performance.
  • An embodiment of the present invention provides a method for counting the number of times the instruction is executed, including: dividing a counting space in a storage space corresponding to an instruction space address of a predetermined processor; setting a counting module in the predetermined processor, when the predetermined The processor executes the first instruction And the counting module counts the number of executions of the first instruction in a corresponding position in the counting space according to an address of the first instruction.
  • An embodiment of the present invention provides a method for counting the number of times an instruction is executed, including: adding counting information to a specified instruction;
  • the counting module when the processor executes the specified instruction, the counting module, according to the counting information of the specified instruction being executed, in the corresponding register, the specified instruction being executed The number of executions is counted.
  • An embodiment of the present invention provides a system for counting the number of times an instruction is executed, and the system includes: a predetermined processor and a storage counting device;
  • the predetermined processor includes a first execution module and a first counting module
  • the first execution module is configured to execute a first instruction
  • the first counting module is configured to, when the first execution module executes the first instruction, according to an address of the first instruction being executed, to a corresponding position in the storage counting device The number of executions of an instruction is counted.
  • An embodiment of the present invention provides a processor, where the processor includes: an adding module, a second executing module, a second counting module, and a register;
  • the adding module is configured to add counting information on the specified instruction
  • the second execution module is configured to execute the specified instruction
  • the second counting module is configured to: when the second execution module executes the specified instruction, specify a instruction that is being executed by the second execution module in the register according to the counting information added by the adding module The number of executions is counted.
  • FIG. 1 is a schematic flow chart of a first embodiment of a method for counting the number of executions of an instruction according to the present invention
  • FIG. 2 is a schematic flow chart of a second embodiment of a method for counting the number of executions of an instruction according to the present invention
  • FIG. 3 is a schematic flow chart of counting by the counting module of the present invention.
  • FIG. 4 is a schematic structural view of a first embodiment of a system for counting the number of executions of an instruction according to the present invention
  • FIG. 5 is a schematic structural diagram of a first embodiment of a processor according to the present invention. detailed description
  • FIG. 1 is a schematic flow chart of a first embodiment of a method for counting the number of executions of an instruction according to the present invention. As shown in FIG. 1, the method includes:
  • the predetermined processor refers to a processor of a non-von-Neumann architecture, in the non-von
  • the instruction space is independent, so the non-von-Neumann architecture
  • the processor is primarily a dedicated processor.
  • the corresponding instruction space address can create a counting space of 1 : 1; 1 : 1 means how large the instruction space is, and how much counting space is created. Since all instructions are counted, the instruction address is the count index, so the count can be easily and conveniently implemented without storing the count index.
  • the storage space preset in this embodiment may be a high speed memory or a register.
  • Step 102 Set a counting module in the predetermined processor, when the predetermined processor executes the first instruction, the counting module counts the number of executions of the first instruction according to the address of the first instruction in a corresponding position in the counting space.
  • the counting module may be a counter or an accumulator, but is not limited to the two counters or accumulators, as long as the hardware unit can achieve the purpose of counting.
  • the counting module may be set inside the predetermined processor through a hardware circuit such as a gate circuit or a flip-flop, such that when the predetermined processor executes the first instruction, the counting module is in the corresponding position in the counting space according to the address of the first instruction. The number of executions of the first instruction is counted.
  • the counting module first reads the current execution number of the first instruction from the high-speed memory, and then adds the execution number to the first instruction. Finally, the number of executions of the updated first instruction is stored in the high speed memory; if the counting space is divided in the register, the counting module directly increments the number of executions of the first instruction by one in a register of the predetermined processor.
  • the embodiment of the present invention sets the counting module in the predetermined processor, when the predetermined processor executes the instruction, the counting module counts according to the address of the instruction being executed in the corresponding position in the counting space, so There is not a large number of counting instructions in the software system, which greatly improves the performance of the software system; When the counting space is created in the register, the problem caused by the high-speed memory storage count is not considered, and the performance of the software system is further improved.
  • the method provided by the embodiment of the present invention is used to count instructions, the user only needs to send a Release version of the software system, and the performance of the software system is high. Can also be based on the obtained finger Execution times, know the current software system in which the process is running, run-off error process which narrowed the scope of the problem to find, improve problem-solving efficiency.
  • the embodiments of the present invention can also be used for performance design of a software system.
  • the prior art generally adopts a static design method, that is, a main business process is assumed, and the main business process is optimized in design and implementation to achieve a predetermined performance goal.
  • This statically designed software system can meet the needs of most users and cannot meet all the needs of users. If the business process is dynamically adjusted according to the actual operation, it analyzes all the business processes running during a period of time, and determines from this.
  • the main business process this dynamically designed software system can meet all the needs of users in terms of performance. Therefore, when the first instruction is a preset instruction of each business process in the plurality of business processes of the software system, the method may further include:
  • the first instruction for each business process in multiple business processes is generally selected as The instruction is preset, but the embodiment of the present invention does not limit this, and other instructions may be selected as a preset instruction in each business process.
  • the embodiment of the present invention creates a counting space of 1:1 at an instruction space address corresponding to a predetermined processor, and sets a counting module inside the predetermined processor.
  • the counting module is according to the instruction being executed.
  • the address is counted in the corresponding position in the counting space, instead of writing the instruction for counting in the software system, thereby greatly improving the performance of the software system; in the case where the performance of the software system is not affected, it can be executed according to the calculated instruction
  • the number of times solves the actual problem and improves the user experience. It can also determine the main business process according to the preset number of execution orders of each business process, and realize the dynamic optimization of the performance of the software system.
  • FIG. 2 is a schematic flow chart of a method for counting the number of executions of an instruction according to a second embodiment of the present invention. As shown in FIG. 2, the method includes:
  • the embodiment of the present invention may extend the length of the specified instruction, and add the counting information on the length of the extended specified instruction;
  • the specified instruction is some instructions that may need to be counted.
  • the added count information may include a count enable flag and a register index, but is not limited to these two pieces of information.
  • the count enable flag when the count enable flag is true, it indicates that the count needs to be performed; when the count enable flag is false, it indicates that the count is not required as an example for description; of course, this is only a specific setting method. It can also be set that when the count enable flag is true, it indicates that counting is not required; when the count enable flag is false, it indicates that counting is required, and the embodiment of the present invention does not limit these.
  • the counting module aligns in the corresponding register according to the counting information of the specified instruction being executed The number of executions of the specified instruction executed is counted.
  • the counting module may be a counter or an accumulator, but is not limited to the two counters or accumulators, as long as the hardware unit can achieve the purpose of counting.
  • the counting module may be set inside the predetermined processor through a hardware circuit such as a gate circuit or a flip-flop, such that when the predetermined processor executes the first instruction, the counting module is in the corresponding position in the counting space according to the address of the first instruction. The number of executions of the first instruction is counted.
  • the counting module when the processor executes a specified instruction, if the count enable flag of the specified instruction is true, indicating that the specified instruction needs to be counted, the counting module records the specified instruction in the corresponding register according to the register index. The number of executions is incremented by one.
  • FIG. 3 is a schematic flowchart of counting by a counting module according to an embodiment of the present invention. As shown in FIG. 3, the process is as follows:
  • the counting module performs a counting operation of adding 1 to the execution number of the specified instruction being executed in the corresponding register according to the register index;
  • the processor executes only the specified instruction, and the counting module does not count the number of executions of the specified instruction.
  • the processor can define the size of the register according to different needs. For example, when the index of the register is 8 bits, it indicates that the processor can support counting of 256 instructions when executing the instruction, if the processor executes If there are fewer instructions, the register size can be reduced by reducing the number of bits in the register index, which saves the cost of the register.
  • the processor may be a processor of all architectures.
  • the method provided by the embodiment of the present invention is used to count instructions, the user only needs to send a Release version of the software system, and the performance of the software system is high. Can also be based on the obtained finger Execution times, know the current software system in which the process is running, run-off error process which narrowed the scope of the problem to find, improve problem-solving efficiency.
  • the embodiments of the present invention can also be used for performance design of a software system.
  • the prior art generally adopts a static design method, that is, a main business process is assumed, and the main business process is optimized in design and implementation to achieve a predetermined performance goal.
  • This statically designed software system can meet the needs of most users and cannot meet all the needs of users. If the business process is dynamically adjusted according to actual operating conditions, all business processes running during a period of time are analyzed and selected. The main business process, this dynamically designed software system can meet all the needs of users in terms of performance.
  • the specified instruction may be a preset instruction of each business process in multiple business processes of the software system, and correspondingly, the method may further include: The main business process is determined based on the count of the number of executions of the preset instruction for each business process in the plurality of business processes.
  • the first instruction of each business process is generally selected as a preset instruction, but the embodiment of the present invention does not limit this, and other instructions may be selected as a preset instruction in each business process.
  • the counting module is corresponding according to the counting information of the specified instruction.
  • the number of executions of the specified instruction being executed is counted in the register. Since the extended instruction length is only increased in the storage length, the processor does not process the count-related information of the specified instruction when executing the specified instruction, and thus does not affect the processing.
  • the device executes the specified instruction, and can set the size of the register according to actual needs, thereby saving the cost of the register; since the counting module is used for counting, and the instruction for counting is not written in the software system, the performance of the software system is greatly improved; In the case that the performance of the software system is not affected, the actual occurrence of the problem can be solved according to the calculated number of executions of the instruction, and the user experience is improved; and the main business process can also be determined according to the counting of the execution times of the preset instruction of each business process. Dynamic Optimization software to achieve system performance.
  • FIG. 4 is a schematic structural diagram of a first embodiment of a system for counting the number of times of instruction execution.
  • the system includes: a predetermined processor 401 and a storage counting device 402.
  • the predetermined processor 401 includes a first execution module 4011. And a first counting module 4012;
  • a first execution module 4011 configured to execute the first instruction
  • the first counting module 4012 is configured to, when the first executing module 4011 executes the first instruction, according to the address of the first instruction being executed by the first executing module 4011, the first position being performed in the corresponding position in the storage counting device 402 The number of executions of the instruction is counted;
  • the first counting module 4012 may be a counter or an accumulator, but is not limited to a counter or an accumulator, as long as the hardware unit can achieve the purpose of counting.
  • the storage counting device 402 is configured to store the counting result of the first counting module 4012.
  • the storage counter device 402 can be a high speed memory or a register.
  • the predetermined processor 401 in the embodiment of the present invention refers to a processor of a non-von-Neumann architecture, and in a processor other than the von Neumann architecture, the instruction space exists independently. Since all instructions are counted, the instruction address is the count index, so the count can be easily and conveniently implemented without storing the count index.
  • the storage counting device 402 is a high-speed memory
  • the first counting module 4012 first reads the current execution number of the first instruction from the high-speed memory, and then performs the number of executions. Adding 1 , finally storing the number of executions of the updated first instruction in the high speed memory; if the storage counting device 402 is a register, when the predetermined processor 401 executes the first instruction, the first counting module 4012 is directly at the predetermined processor The number of executions of the first instruction is incremented by one in the register.
  • the embodiment of the present invention sets a first counting module 4012 inside the predetermined processor 401.
  • the first counting module 4012 stores the counting device according to the address of the instruction being executed.
  • the corresponding position in 402 counts the instructions being executed, rather than counting by writing instructions in the software system, thereby greatly improving the performance of the software system, and in the case where the performance of the software system is not affected, it can also be calculated according to The number of instruction executions solves the actual problems and improves the user experience.
  • the processor includes: an adding module 501, a second executing module 502, a second counting module 503, and a register 504;
  • Adding a module 501 configured to add counting information on the specified instruction
  • the adding module 501 expands the specified instruction by extending the length of the specified instruction. Add count information on the length.
  • the specified instruction is an instruction that may need to be counted, and the added count information may include a count enable flag and a register index, but is not limited to these two pieces of information.
  • a second execution module 502 configured to execute a specified instruction
  • the second counting module 503 is configured to count the number of executions of the specified instruction being executed in the corresponding register 504 according to the counting information added by the adding module 501 when the second executing module 502 executes the specified instruction.
  • the second counting module 503 can be a counter or an accumulator, but is not limited to a counter or an accumulator, as long as the hardware unit can achieve the purpose of counting.
  • the processor may be a processor of all architectures.
  • the adding module 501 adds the counting information to the specified instruction.
  • the second counting module 503 is in the corresponding register 504 according to the counting information of the specified instruction. The number of executions of the specified instruction being executed is counted.
  • the add module 501 adds the count information to the length of the extended specified instruction by extending the length of the specified instruction, since the extended instruction length is only increased in the storage length, it does not affect
  • the second execution module 502 executes the specified instruction; since the second counting module 503 is used for counting, the instruction for counting is not written in the software system, thereby greatly improving the performance of the software system; and in the case that the performance of the software system is not affected It is also possible to solve the actual problem according to the number of executed instruction executions and improve the user experience.

Abstract

The embodiments of the present invention disclose a method, system and processor for performing count of instruction execution times, which belong to the field of computer. The method includes that: the count information is added to a designated instruction; a count module is set inside the processor; and when the processor executes the designated instruction, the count module counts the execution times of the designated instruction which is being executed in a corresponding register according to the count information of the designated instruction which is being executed. The system comprises a predefined processor and a storage count device. The processor comprises an adding module, a second execution module, a second count module and a register. The embodiments of the present invention set the count module inside the processor, and when the processor executes the instruction, the count module counts the execution times of the instruction which is being executed, and the instruction which is used for counting is not written in a software system, so as to greatly improve the capability of the software system.

Description

对指令执行次数进行计数的方法、 系统及处理器 技术领域  Method, system and processor for counting instruction execution times
本发明实施例涉及计算机领域, 尤其涉及一种对指令执行次数进行计 数的方法、 系统及处理器。 背景技术  Embodiments of the present invention relate to the field of computers, and in particular, to a method, system, and processor for counting the number of times an instruction is executed. Background technique
处理器是计算机中解释并执行指令的功能部件。 在处理器执行指令时, 有时需要对指令的执行次数进行计数, 根据指令执行次数的计数情况来解决 实际中遇到的问题。 例如, 根据指令执行次数的计数情况来动态设计软件系 统, 确定软件系统中的主要业务流程; 在一些不能诊断调试的嵌入式系统或 者对可靠性要求艮高的用户生产环境中, 通过指令执行次数的计数来确定当 前软件系统在运行哪些流程, 处理过哪些错误流程, 以缩小出现问题的范围, 提高解决问题的效率。  A processor is a component of a computer that interprets and executes instructions. When the processor executes an instruction, it is sometimes necessary to count the number of executions of the instruction, and solve the problem actually encountered according to the counting of the number of executions of the instruction. For example, dynamically design a software system based on the count of instruction execution times to determine the main business processes in the software system; in some embedded systems that cannot be debugged or in a user's production environment where reliability requirements are high, the number of executions by instructions The count is used to determine which processes are currently running in the software system, and which error processes have been processed to narrow down the problem and improve the efficiency of problem solving.
现有技术对指令执行次数的计数是通过在软件系统中写用来计数的指 令, 处理器通过运行这些用来计数的指令来实现计数。  The prior art counts the number of instruction executions by writing instructions for counting in the software system, and the processor implements counting by running these instructions for counting.
在实现本发明过程中, 发明人发现现有技术中至少存在如下问题: 在软件系统中写用来计数的指令, 使得软件系统的性能大大降低。 发明内容  In the process of implementing the present invention, the inventors have found that at least the following problems exist in the prior art: The instructions for counting are written in the software system, so that the performance of the software system is greatly reduced. Summary of the invention
本发明实施例提供一种对指令执行次数进行计数的方法、 系统及处理 器, 解决现有技术中在软件系统写用来计数的指令而导致软件系统性能大 大降低的缺陷, 以提高软件系统的性能。  The embodiment of the invention provides a method, a system and a processor for counting the number of executions of an instruction, which solves the defects in the prior art that the software system writes the instruction for counting and causes the performance of the software system to be greatly reduced, so as to improve the software system. performance.
本发明实施例提供了一种对指令执行次数进行计数的方法, 包括: 对应预定处理器的指令空间地址在存储空间中划分计数空间; 在所述预定处理器内设置计数模块, 当所述预定处理器执行第一指令 时, 所述计数模块根据所述第一指令的地址, 在所述计数空间中的对应位 置对所述第一指令的执行次数进行计数。 An embodiment of the present invention provides a method for counting the number of times the instruction is executed, including: dividing a counting space in a storage space corresponding to an instruction space address of a predetermined processor; setting a counting module in the predetermined processor, when the predetermined The processor executes the first instruction And the counting module counts the number of executions of the first instruction in a corresponding position in the counting space according to an address of the first instruction.
本发明实施例提供了一种对指令执行次数进行计数的方法, 包括: 在指定指令上添加计数信息;  An embodiment of the present invention provides a method for counting the number of times an instruction is executed, including: adding counting information to a specified instruction;
在处理器内部设置计数模块, 当所述处理器执行所述指定指令时, 所 述计数模块根据所述正在执行的指定指令的计数信息, 在对应的寄存器中 对所述正在执行的指定指令的执行次数进行计数。  Setting a counting module inside the processor, when the processor executes the specified instruction, the counting module, according to the counting information of the specified instruction being executed, in the corresponding register, the specified instruction being executed The number of executions is counted.
本发明实施例提供了一种对指令执行次数进行计数的系统, 所述系统 包括: 预定处理器和存储计数装置;  An embodiment of the present invention provides a system for counting the number of times an instruction is executed, and the system includes: a predetermined processor and a storage counting device;
所述预定处理器包括第一执行模块和第一计数模块;  The predetermined processor includes a first execution module and a first counting module;
所述第一执行模块, 用于执行第一指令;  The first execution module is configured to execute a first instruction;
所述第一计数模块, 用于当所述第一执行模块执行所述第一指令时, 根据所述正在执行的第一指令的地址, 在所述存储计数装置中的对应位置 对所述第一指令的执行次数进行计数。  The first counting module is configured to, when the first execution module executes the first instruction, according to an address of the first instruction being executed, to a corresponding position in the storage counting device The number of executions of an instruction is counted.
本发明实施例提供了一种处理器, 所述处理器包括: 添加模块、 第二 执行模块、 第二计数模块和寄存器;  An embodiment of the present invention provides a processor, where the processor includes: an adding module, a second executing module, a second counting module, and a register;
所述添加模块, 用于在指定指令上添加计数信息;  The adding module is configured to add counting information on the specified instruction;
所述第二执行模块, 用于执行所述指定指令;  The second execution module is configured to execute the specified instruction;
所述第二计数模块, 用于当所述第二执行模块执行所述指定指令时, 根据所述添加模块添加的计数信息, 在所述寄存器中对所述第二执行模块 正在执行的指定指令的执行次数进行计数。  The second counting module is configured to: when the second execution module executes the specified instruction, specify a instruction that is being executed by the second execution module in the register according to the counting information added by the adding module The number of executions is counted.
本发明实施例通过在处理器内设置计数模块, 当处理器执行指令时, 该计数模块对正在执行的指令的执行次数进行计数, 而不在软件系统中写 用来计数的指令, 因此大大提高了软件系统的性能。 附图说明 为了更清楚地说明本发明实施例或现有技术中的技术方案, 下面将对实 施例或现有技术描述中所需要使用的附图作一简单地介绍, 显而易见地, 下 面描述中的附图是本发明的一些实施例, 对于本领域普通技术人员来讲, 在 不付出创造性劳动性的前提下, 还可以根据这些附图获得其他的附图。 In the embodiment of the present invention, by setting a counting module in the processor, when the processor executes an instruction, the counting module counts the number of executions of the instruction being executed, and does not write an instruction for counting in the software system, thereby greatly improving The performance of the software system. DRAWINGS In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, a brief description of the drawings used in the embodiments or the prior art description will be briefly described below. Obviously, the drawings in the following description It is a certain embodiment of the present invention, and other drawings can be obtained from those skilled in the art without any inventive labor.
图 1为本发明对指令执行次数进行计数的方法第一实施例流程示意 图;  1 is a schematic flow chart of a first embodiment of a method for counting the number of executions of an instruction according to the present invention;
图 2为本发明对指令执行次数进行计数的方法第二实施例流程示意 图;  2 is a schematic flow chart of a second embodiment of a method for counting the number of executions of an instruction according to the present invention;
图 3为本发明计数模块进行计数的流程示意图;  3 is a schematic flow chart of counting by the counting module of the present invention;
图 4为本发明对指令执行次数进行计数的系统第一实施例结构示意 图;  4 is a schematic structural view of a first embodiment of a system for counting the number of executions of an instruction according to the present invention;
图 5为本发明处理器的第一实施例结构示意图。 具体实施方式  FIG. 5 is a schematic structural diagram of a first embodiment of a processor according to the present invention. detailed description
为使本发明实施例的目的、 技术方案和优点更加清楚, 下面将结合本 发明实施例中的附图, 对本发明实施例中的技术方案进行清楚、 完整地描 述,显然, 所描述的实施例是本发明一部分实施例, 而不是全部的实施例。 基于本发明中的实施例, 本领域普通技术人员在没有作出创造性劳动前提 下所获得的所有其他实施例, 都属于本发明保护的范围。  The technical solutions in the embodiments of the present invention are clearly and completely described in the following with reference to the accompanying drawings in the embodiments of the present invention. It is a partial embodiment of the invention, and not all of the embodiments. All other embodiments obtained by a person of ordinary skill in the art based on the embodiments of the present invention without creative efforts are within the scope of the present invention.
实施例 1  Example 1
图 1为本发明对指令执行次数进行计数的方法第一实施例流程示意 图, 如图 1所示, 本方法包括:  FIG. 1 is a schematic flow chart of a first embodiment of a method for counting the number of executions of an instruction according to the present invention. As shown in FIG. 1, the method includes:
101 : 对应预定处理器的指令空间地址, 在预设的存储空间中划分计 数空间, 该计数空间用于存储指令执行次数的计数结果;  101: corresponding to an instruction space address of the predetermined processor, dividing a counting space in a preset storage space, where the counting space is used to store a counting result of the number of executions of the instruction;
本发明实施例中,预定处理器是指非冯-诺伊曼架构的处理器,在非冯 In the embodiment of the present invention, the predetermined processor refers to a processor of a non-von-Neumann architecture, in the non-von
-诺伊曼架构的处理器中, 指令空间是独立存在的, 因此非冯 -诺伊曼架构 的处理器主要是专用处理器。 - In the Neumann architecture processor, the instruction space is independent, so the non-von-Neumann architecture The processor is primarily a dedicated processor.
具体的, 对应指令空间地址可以创建 1 : 1的计数空间; 1 : 1的意思 是指令空间有多大, 就创建多大的计数空间。 由于对所有指令都计数, 指 令地址即为计数索引, 因此可以不用存储计数索引, 就可以简单方便的实 现计数。 本实施例中预设的存储空间可以是高速内存或者寄存器。  Specifically, the corresponding instruction space address can create a counting space of 1 : 1; 1 : 1 means how large the instruction space is, and how much counting space is created. Since all instructions are counted, the instruction address is the count index, so the count can be easily and conveniently implemented without storing the count index. The storage space preset in this embodiment may be a high speed memory or a register.
102: 在上述预定处理器内设置一个计数模块, 当该预定处理器执行 第一指令时, 该计数模块根据第一指令的地址在上述计数空间中的对应位 置对第一指令的执行次数进行计数。  Step 102: Set a counting module in the predetermined processor, when the predetermined processor executes the first instruction, the counting module counts the number of executions of the first instruction according to the address of the first instruction in a corresponding position in the counting space. .
本实施例中计数模块可以是计数器或累加器, 但不限于这两种计数器 或累加器, 只要可以达到计数目的的硬件单元都可以。 在预定处理器内部 可以通过门电路或者触发器等硬件电路对计数模块进行设置, 使得当预定 处理器执行第一指令时, 该计数模块就根据第一指令的地址在上述计数空 间中的对应位置对第一指令的执行次数进行计数。  In this embodiment, the counting module may be a counter or an accumulator, but is not limited to the two counters or accumulators, as long as the hardware unit can achieve the purpose of counting. The counting module may be set inside the predetermined processor through a hardware circuit such as a gate circuit or a flip-flop, such that when the predetermined processor executes the first instruction, the counting module is in the corresponding position in the counting space according to the address of the first instruction. The number of executions of the first instruction is counted.
具体的, 如果在高速内存中划分出计数空间, 则当预定处理器执行第 一指令时, 该计数模块先从高速内存中读取该第一指令当前的执行次数, 然后将该执行次数加 1 , 最后将更新后的第一指令的执行次数存储在高速 内存中; 如果在寄存器中划分出计数空间, 则计数模块直接在预定处理器 的寄存器中对该第一指令的执行次数加 1。  Specifically, if the counting space is divided in the high-speed memory, when the predetermined processor executes the first instruction, the counting module first reads the current execution number of the first instruction from the high-speed memory, and then adds the execution number to the first instruction. Finally, the number of executions of the updated first instruction is stored in the high speed memory; if the counting space is divided in the register, the counting module directly increments the number of executions of the first instruction by one in a register of the predetermined processor.
现有技术对某条指令计数时, 需要在软件系统中对应于该指令地址的 位置写用来计数的指令, 通过执行用来计数的指令来实现计数, 计数结果 存储在内存中, 因此当软件系统中需要计数的指令很多时, 用来计数的指 令也就很多, 并且每一次计数还需要进行 I/O的两次操作, 多核处理器时 还要考虑内存资源的互斥, 这些都大大影响了软件系统的性能; 而本发明 实施例通过在预定处理器内设置计数模块, 在预定处理器执行指令时, 该 计数模块根据正在执行的指令的地址在计数空间中的对应位置进行计数, 因此软件系统中没有大量的计数指令, 使得软件系统的性能大大提高; 当 计数空间创建在寄存器中时, 不用考虑用高速内存存储计数带来的问题, 进一步提高了软件系统的性能。 In the prior art, when an instruction is counted, an instruction for counting is required to be written in a position corresponding to the address of the instruction in the software system, and counting is performed by executing an instruction for counting, and the counting result is stored in the memory, so when the software When there are many instructions in the system that need to be counted, there are many instructions for counting, and each time the count needs to perform two operations of I/O, and the multi-core processor also needs to consider the mutual exclusion of memory resources, which greatly affects The performance of the software system; and the embodiment of the present invention sets the counting module in the predetermined processor, when the predetermined processor executes the instruction, the counting module counts according to the address of the instruction being executed in the corresponding position in the counting space, so There is not a large number of counting instructions in the software system, which greatly improves the performance of the software system; When the counting space is created in the register, the problem caused by the high-speed memory storage count is not considered, and the performance of the software system is further improved.
由于现有技术是通过在软件系统中写用来计数的指令来实现计数, 因 此给用户发送设计的软件系统时, 一般是发送两个版本, 一个版本是没有 计数指令的软件系统, 通常称为 Release版本, 该 Release版本的软件系统 性能较高, 但是由于没有计数功能, 所以不能获得指令执行的次数情况, 从而也就不能得知实际运行时软件系统内部的各个分支模块运行情况; 另 一个版本是带有计数指令的软件系统, 通常称为 Debug版本, 用户虽然可 以根据该 Debug版本的软件系统获得指令执行次数解决实际中遇到的问 题, 但是该 Debug版本的软件系统的性能较低, 因此一般不会应用于对性 能要求较高的场景中; 而利用本发明实施例提供的方法来对指令进行计数 的话, 只需给用户发送一个 Release版本的软件系统, 在软件系统性能高 的同时, 还可以根据得到的指令执行次数, 获知当前软件系统在运行哪些 流程, 运行过哪些错误流程, 缩小了查找问题的范围, 提高解决问题的效 率。  Since the prior art implements counting by writing an instruction for counting in a software system, when a designed software system is sent to a user, two versions are generally transmitted, and one version is a software system without counting instructions, which is usually called Release version, the software version of the Release version has higher performance, but because there is no counting function, the number of instructions execution cannot be obtained, and thus the operation status of each branch module in the software system during actual operation cannot be known; another version Is a software system with counting instructions, usually called Debug version, although the user can obtain the number of instruction execution times according to the Debug version of the software system to solve the actual problems encountered, but the performance of the Debug version of the software system is low, so Generally, it is not applied to a scenario with high performance requirements. If the method provided by the embodiment of the present invention is used to count instructions, the user only needs to send a Release version of the software system, and the performance of the software system is high. Can also be based on the obtained finger Execution times, know the current software system in which the process is running, run-off error process which narrowed the scope of the problem to find, improve problem-solving efficiency.
本发明实施例还可以用于软件系统的性能设计, 现有技术一般采取静 态的设计方法, 即假定一个主要业务流程, 在设计和实现上为该主要业务 流程进行优化, 达到既定的性能目标, 这种静态设计的软件系统可以满足 大多数的用户需求, 不能满足用户的全部需求, 如果根据实际运行情况对 业务流程进行动态调整, 即对一段时期内运行的所有业务流程进行分析, 从中确定出主要业务流程, 这种动态设计的软件系统在性能上可以能满足 用户的所有需求。 因此, 当第一指令为软件系统的多个业务流程中每个业 务流程的预设指令时, 该方法还可以包括:  The embodiments of the present invention can also be used for performance design of a software system. The prior art generally adopts a static design method, that is, a main business process is assumed, and the main business process is optimized in design and implementation to achieve a predetermined performance goal. This statically designed software system can meet the needs of most users and cannot meet all the needs of users. If the business process is dynamically adjusted according to the actual operation, it analyzes all the business processes running during a period of time, and determines from this. The main business process, this dynamically designed software system can meet all the needs of users in terms of performance. Therefore, when the first instruction is a preset instruction of each business process in the plurality of business processes of the software system, the method may further include:
根据多个业务流程中每个业务流程的预设指令执行次数的计数结果, 确定主要业务流程。  Determine the main business process based on the count of the number of executions of the preset instructions for each business process in multiple business processes.
实际应用中, 一般选择多个业务流程中每个业务流程的第一条指令为 预设指令, 但本发明实施例对此不作限制, 也可以在每个业务流程中选择 其它的指令作为预设指令。 In practical applications, the first instruction for each business process in multiple business processes is generally selected as The instruction is preset, but the embodiment of the present invention does not limit this, and other instructions may be selected as a preset instruction in each business process.
本发明实施例通过在对应预定处理器的指令空间地址创建 1 : 1的计 数空间,并在预定处理器内部设置计数模块, 当预定处理器在执行指令时, 该计数模块根据正在执行的指令的地址在计数空间中的对应位置进行计 数, 而不用在软件系统中写用来计数的指令, 因此大大提高了软件系统的 性能; 在软件系统性能不受影响的情况下, 可以根据计算的指令执行次数 解决实际出现的问题, 提高了用户体验; 还可以根据每个业务流程的预设 指令执行次数的计数情况, 确定主要业务流程, 实现软件系统的性能动态 优化。  The embodiment of the present invention creates a counting space of 1:1 at an instruction space address corresponding to a predetermined processor, and sets a counting module inside the predetermined processor. When the predetermined processor executes an instruction, the counting module is according to the instruction being executed. The address is counted in the corresponding position in the counting space, instead of writing the instruction for counting in the software system, thereby greatly improving the performance of the software system; in the case where the performance of the software system is not affected, it can be executed according to the calculated instruction The number of times solves the actual problem and improves the user experience. It can also determine the main business process according to the preset number of execution orders of each business process, and realize the dynamic optimization of the performance of the software system.
实施例 2  Example 2
图 2为本发明对指令执行次数进行计数的方法第二实施例流程示意 图, 如图 2所示, 该方法包括:  2 is a schematic flow chart of a method for counting the number of executions of an instruction according to a second embodiment of the present invention. As shown in FIG. 2, the method includes:
201 : 在指定指令上添加计数信息;  201 : adding count information to the specified instruction;
具体的, 本发明实施例可以扩展指定指令的长度, 在扩展的指定指令 的长度上添加计数信息;  Specifically, the embodiment of the present invention may extend the length of the specified instruction, and add the counting information on the length of the extended specified instruction;
其中, 指定指令是一些可能需要计数的指令。  Among them, the specified instruction is some instructions that may need to be counted.
具体的, 添加的计数信息可以包括计数使能标记和寄存器索引, 但不 限于这两个信息。  Specifically, the added count information may include a count enable flag and a register index, but is not limited to these two pieces of information.
本发明实施例以设置当计数使能标记为真时, 表示需要进行计数; 当 计数使能标记为假时, 表示不需要进行计数为例进行说明; 当然, 这只是 一种具体的设置方法, 也可以设置当计数使能标记为真时, 表示不需要进 行计数; 当计数使能标记为假时, 表示需要进行计数, 本发明实施例对这 些不做限制。  In the embodiment of the present invention, when the count enable flag is true, it indicates that the count needs to be performed; when the count enable flag is false, it indicates that the count is not required as an example for description; of course, this is only a specific setting method. It can also be set that when the count enable flag is true, it indicates that counting is not required; when the count enable flag is false, it indicates that counting is required, and the embodiment of the present invention does not limit these.
202: 在处理器内部设置一个计数模块, 当处理器执行指定指令时, 该计数模块根据正在执行的指定指令的计数信息, 在对应的寄存器中对正 在执行的指定指令的执行次数进行计数。 202: setting a counting module inside the processor, when the processor executes the specified instruction, the counting module aligns in the corresponding register according to the counting information of the specified instruction being executed The number of executions of the specified instruction executed is counted.
本实施例中计数模块可以是计数器或累加器, 但不限于这两种计数器 或累加器, 只要可以达到计数目的的硬件单元都可以。 在预定处理器内部 可以通过门电路或者触发器等硬件电路对计数模块进行设置, 使得当预定 处理器执行第一指令时, 该计数模块就根据第一指令的地址在上述计数空 间中的对应位置对第一指令的执行次数进行计数。  In this embodiment, the counting module may be a counter or an accumulator, but is not limited to the two counters or accumulators, as long as the hardware unit can achieve the purpose of counting. The counting module may be set inside the predetermined processor through a hardware circuit such as a gate circuit or a flip-flop, such that when the predetermined processor executes the first instruction, the counting module is in the corresponding position in the counting space according to the address of the first instruction. The number of executions of the first instruction is counted.
继续上述例子, 处理器在执行某条指定指令时, 如果该指定指令的计 数使能标记为真, 表示需要对该指定指令进行计数, 则计数模块根据寄存 器索引在对应的寄存器中对该指定指令的执行次数执行加 1的计数操作。  Continuing with the above example, when the processor executes a specified instruction, if the count enable flag of the specified instruction is true, indicating that the specified instruction needs to be counted, the counting module records the specified instruction in the corresponding register according to the register index. The number of executions is incremented by one.
图 3为本发明实施例中计数模块进行计数的流程示意图,如图 3所示, 该过程如下:  FIG. 3 is a schematic flowchart of counting by a counting module according to an embodiment of the present invention. As shown in FIG. 3, the process is as follows:
301 : 当处理器执行指定指令时, 根据该指定指令的计数使能标记判 断是否需要对该指定指令计数, 如果是, 执行 302; 否则, 执行 303 ;  301: when the processor executes the specified instruction, according to the count enable flag of the specified instruction, whether the specified instruction needs to be counted, if yes, execute 302; otherwise, execute 303;
302: 计数模块根据寄存器索引在对应的寄存器中对正在执行的指定 指令的执行次数执行加 1的计数操作;  302: The counting module performs a counting operation of adding 1 to the execution number of the specified instruction being executed in the corresponding register according to the register index;
303 : 处理器只执行该指定指令, 计数模块不对该指定指令的执行次 数进行计数。  303: The processor executes only the specified instruction, and the counting module does not count the number of executions of the specified instruction.
本发明实施例中, 处理器可以根据不同的需要来定义寄存器的规格大 小,例如,寄存器的索引为 8位时,表明处理器在执行指令时可以支持 256 个指令的计数, 如果处理器执行的指令比较少, 则可以通过减少寄存器索 引的位数来减小寄存器的规格, 节省了寄存器的成本。  In the embodiment of the present invention, the processor can define the size of the register according to different needs. For example, when the index of the register is 8 bits, it indicates that the processor can support counting of 256 instructions when executing the instruction, if the processor executes If there are fewer instructions, the register size can be reduced by reducing the number of bits in the register index, which saves the cost of the register.
本发明实施例中, 处理器可以是所有架构的处理器。  In the embodiment of the present invention, the processor may be a processor of all architectures.
现有技术对某条指令计数时, 需要在软件系统中对应于该指令地址的 位置写用来计数的指令, 通过执行用来计数的指令来实现计数, 计数结果 存储在内存中, 因此当软件系统中需要计数的指令很多时, 用来计数的指 令也就很多, 并且每一次计数还需要进行 I/O的两次操作, 多核处理器时 还要考虑内存资源的互斥, 这些都大大影响了软件系统的性能; 而本发明 实施例通过在处理器内设置一个计数模块, 在处理器执行指令时, 该计数 模块根据该指令的计数信息在对应的寄存器中对正在执行的指令地执行 次数进行计数, 因此软件系统中没有大量的计数指令, 大大提高了软件系 统的性能。 In the prior art, when an instruction is counted, an instruction for counting is required to be written in a position corresponding to the address of the instruction in the software system, and counting is performed by executing an instruction for counting, and the counting result is stored in the memory, so when the software When there are many instructions in the system that need to be counted, there are many instructions for counting, and each time the I/O operation is required for the count, the multi-core processor The mutual exclusion of the memory resources is also considered, which greatly affects the performance of the software system. In the embodiment of the present invention, by setting a counting module in the processor, when the processor executes the instruction, the counting module is based on the counting information of the instruction. The number of executions of the instruction being executed is counted in the corresponding register, so there is not a large number of counting instructions in the software system, which greatly improves the performance of the software system.
由于现有技术是通过在软件系统中写用来计数的指令来实现计数, 因 此给用户发送设计的软件系统时, 一般是发送两个版本, 一个版本是没有 计数指令的软件系统, 通常称为 Release版本, 该 Release版本的软件系统 性能较高, 但是由于没有计数功能, 所以不能获得指令执行的次数情况, 从而也就不能得知实际运行时软件系统内部的各个分支模块运行情况; 另 一个版本是带有计数指令的软件系统, 通常称为 Debug版本, 用户虽然可 以根据该 Debug版本的软件系统获得指令执行次数解决实际中遇到的问 题, 但是该 Debug版本的软件系统的性能较低, 因此一般不会应用于对性 能要求较高的场景中; 而利用本发明实施例提供的方法来对指令进行计数 的话, 只需给用户发送一个 Release版本的软件系统, 在软件系统性能高 的同时, 还可以根据得到的指令执行次数, 获知当前软件系统在运行哪些 流程, 运行过哪些错误流程, 缩小了查找问题的范围, 提高解决问题的效 率。  Since the prior art implements counting by writing an instruction for counting in a software system, when a designed software system is sent to a user, two versions are generally transmitted, and one version is a software system without counting instructions, which is usually called Release version, the software version of the Release version has higher performance, but because there is no counting function, the number of instructions execution cannot be obtained, and thus the operation status of each branch module in the software system during actual operation cannot be known; another version Is a software system with counting instructions, usually called Debug version, although the user can obtain the number of instruction execution times according to the Debug version of the software system to solve the actual problems encountered, but the performance of the Debug version of the software system is low, so Generally, it is not applied to a scenario with high performance requirements. If the method provided by the embodiment of the present invention is used to count instructions, the user only needs to send a Release version of the software system, and the performance of the software system is high. Can also be based on the obtained finger Execution times, know the current software system in which the process is running, run-off error process which narrowed the scope of the problem to find, improve problem-solving efficiency.
本发明实施例还可以用于软件系统的性能设计, 现有技术一般采取静 态的设计方法, 即假定一个主要业务流程, 在设计和实现上为该主要业务 流程进行优化, 达到既定的性能目标, 这种静态设计的软件系统可以满足 大多数的用户需求, 不能满足用户的全部需求, 如果根据实际运行情况对 业务流程进行动态调整, 即对一段时期内运行的所有业务流程进行分析, 从中选出主要业务流程, 这种动态设计的软件系统在性能上可以能满足用 户的所有需求。 因此, 上述指定指令可以是软件系统的多个业务流程中每 个业务流程的预设指令, 相应的, 该方法还可以包括: 根据多个业务流程中的每个业务流程的预设指令执行次数的计数结 果, 确定主要业务流程。 The embodiments of the present invention can also be used for performance design of a software system. The prior art generally adopts a static design method, that is, a main business process is assumed, and the main business process is optimized in design and implementation to achieve a predetermined performance goal. This statically designed software system can meet the needs of most users and cannot meet all the needs of users. If the business process is dynamically adjusted according to actual operating conditions, all business processes running during a period of time are analyzed and selected. The main business process, this dynamically designed software system can meet all the needs of users in terms of performance. Therefore, the specified instruction may be a preset instruction of each business process in multiple business processes of the software system, and correspondingly, the method may further include: The main business process is determined based on the count of the number of executions of the preset instruction for each business process in the plurality of business processes.
实际应用中, 一般选择每个业务流程的第一条指令为预设指令, 但本 发明实施例对此不作限制, 也可以在每个业务流程中选择其它的指令作为 预设指令。  In the actual application, the first instruction of each business process is generally selected as a preset instruction, but the embodiment of the present invention does not limit this, and other instructions may be selected as a preset instruction in each business process.
本发明实施例中, 通过对指定指令的长度进行扩展, 添加计数信息, 并在处理器内部设置一个计数模块, 当处理器执行指定指令时, 该计数模 块根据该指定指令的计数信息在对应的寄存器中对正在执行的指定指令 的执行次数进行计数, 由于扩展的指令长度只是在存储长度上增加, 处理 器在执行指定指令时, 不处理该指定指令的与计数相关的信息, 因此不影 响处理器执行指定指令, 而且可以根据实际需要设置寄存器的规格大小, 节省了寄存器的成本; 由于使用计数模块来计数, 而不在软件系统中写用 来计数的指令, 因此大大提高了软件系统的性能; 在软件系统性能不受影 响的情况下, 可以根据计算的指令执行次数解决实际出现的问题, 提高了 用户体验; 还可以根据每个业务流程的预设指令执行次数的计数情况, 确 定主要业务流程, 实现软件系统的性能动态优化。  In the embodiment of the present invention, by expanding the length of the specified instruction, adding the counting information, and setting a counting module inside the processor, when the processor executes the specified instruction, the counting module is corresponding according to the counting information of the specified instruction. The number of executions of the specified instruction being executed is counted in the register. Since the extended instruction length is only increased in the storage length, the processor does not process the count-related information of the specified instruction when executing the specified instruction, and thus does not affect the processing. The device executes the specified instruction, and can set the size of the register according to actual needs, thereby saving the cost of the register; since the counting module is used for counting, and the instruction for counting is not written in the software system, the performance of the software system is greatly improved; In the case that the performance of the software system is not affected, the actual occurrence of the problem can be solved according to the calculated number of executions of the instruction, and the user experience is improved; and the main business process can also be determined according to the counting of the execution times of the preset instruction of each business process. Dynamic Optimization software to achieve system performance.
实施例 3  Example 3
图 4为本发明对指令执行次数进行计数的系统第一实施例结构示意 图, 如图 4所示, 该系统包括: 预定处理器 401和存储计数装置 402; 预定处理器 401包括第一执行模块 4011和第一计数模块 4012;  4 is a schematic structural diagram of a first embodiment of a system for counting the number of times of instruction execution. As shown in FIG. 4, the system includes: a predetermined processor 401 and a storage counting device 402. The predetermined processor 401 includes a first execution module 4011. And a first counting module 4012;
第一执行模块 4011 , 用于执行第一指令;  a first execution module 4011, configured to execute the first instruction;
第一计数模块 4012, 用于当第一执行模块 4011执行第一指令时, 根 据第一执行模块 4011正在执行的第一指令的地址, 在存储计数装置 402 中的对应位置对正在执行的第一指令的执行次数进行计数;  The first counting module 4012 is configured to, when the first executing module 4011 executes the first instruction, according to the address of the first instruction being executed by the first executing module 4011, the first position being performed in the corresponding position in the storage counting device 402 The number of executions of the instruction is counted;
本实施例中第一计数模块 4012可以是计数器或累加器, 但不限于计 数器或累加器, 只要可以达到计数目的的硬件单元都可以。 存储计数装置 402, 用于存储第一计数模块 4012的计数结果。 In this embodiment, the first counting module 4012 may be a counter or an accumulator, but is not limited to a counter or an accumulator, as long as the hardware unit can achieve the purpose of counting. The storage counting device 402 is configured to store the counting result of the first counting module 4012.
存储计数装置 402可以是高速内存, 也可以是寄存器。  The storage counter device 402 can be a high speed memory or a register.
本发明实施例中的预定处理器 401是指非冯-诺伊曼架构的处理器,在 非冯 -诺伊曼架构的处理器中,指令空间是独立存在的。 由于对所有指令都 计数, 指令地址即为计数索引, 因此可以不用存储计数索引, 就可以简单 方便的实现计数。  The predetermined processor 401 in the embodiment of the present invention refers to a processor of a non-von-Neumann architecture, and in a processor other than the von Neumann architecture, the instruction space exists independently. Since all instructions are counted, the instruction address is the count index, so the count can be easily and conveniently implemented without storing the count index.
具体的, 如果存储计数装置 402为高速内存, 则当预定处理器 401执 行第一指令时, 第一计数模块 4012先从高速内存中读取该第一指令当前 的执行次数, 然后将该执行次数加 1 , 最后将更新后的第一指令的执行次 数存储在高速内存中; 如果存储计数装置 402为寄存器, 则当预定处理器 401执行第一指令时,第一计数模块 4012直接在预定处理器的寄存器中对 该第一指令的执行次数加 1。  Specifically, if the storage counting device 402 is a high-speed memory, when the predetermined processor 401 executes the first instruction, the first counting module 4012 first reads the current execution number of the first instruction from the high-speed memory, and then performs the number of executions. Adding 1 , finally storing the number of executions of the updated first instruction in the high speed memory; if the storage counting device 402 is a register, when the predetermined processor 401 executes the first instruction, the first counting module 4012 is directly at the predetermined processor The number of executions of the first instruction is incremented by one in the register.
需要说明的是,对于系统实施例而言,由于其基本相应于方法实施例, 所以相关之处参见方法实施例的部分说明即可。  It should be noted that, for the system embodiment, since it basically corresponds to the method embodiment, reference may be made to a part of the description of the method embodiment.
本发明实施例通过在预定处理器 401 内部设置第一计数模块 4012 ,当 预定处理器的第一执行模块 4011在执行指令时, 该第一计数模块 4012根 据正在执行的指令的地址在存储计数装置 402中的对应位置对正在执行的 指令进行计数, 而不是通过在软件系统中写指令来计数, 因此大大提高了 软件系统的性能, 在软件系统性能不受影响的情况下, 还可以根据计算的 指令执行次数解决实际出现的问题, 提高了用户体验。  The embodiment of the present invention sets a first counting module 4012 inside the predetermined processor 401. When the first executing module 4011 of the predetermined processor is executing an instruction, the first counting module 4012 stores the counting device according to the address of the instruction being executed. The corresponding position in 402 counts the instructions being executed, rather than counting by writing instructions in the software system, thereby greatly improving the performance of the software system, and in the case where the performance of the software system is not affected, it can also be calculated according to The number of instruction executions solves the actual problems and improves the user experience.
实施例 4  Example 4
图 5为本发明处理器的第一实施例结构示意图, 如图 5所示, 该处理 器包括: 添加模块 501、 第二执行模块 502、 第二计数模块 503和寄存器 504;  5 is a schematic structural diagram of a first embodiment of a processor according to the present invention. As shown in FIG. 5, the processor includes: an adding module 501, a second executing module 502, a second counting module 503, and a register 504;
添加模块 501 , 用于在指定指令上添加计数信息;  Adding a module 501, configured to add counting information on the specified instruction;
具体的, 添加模块 501通过扩展指定指令的长度, 在扩展的指定指令 的长度上添加计数信息。 Specifically, the adding module 501 expands the specified instruction by extending the length of the specified instruction. Add count information on the length.
其中, 指定指令是一些可能需要计数的指令, 添加的计数信息可以包 括计数使能标记和寄存器索引, 但不限于这两个信息。  Wherein, the specified instruction is an instruction that may need to be counted, and the added count information may include a count enable flag and a register index, but is not limited to these two pieces of information.
第二执行模块 502, 用于执行指定指令;  a second execution module 502, configured to execute a specified instruction;
第二计数模块 503 , 用于在第二执行模块 502执行指定指令的时候, 根据添加模块 501添加的计数信息, 在对应的寄存器 504中对正在执行的 指定指令的执行次数进行计数。  The second counting module 503 is configured to count the number of executions of the specified instruction being executed in the corresponding register 504 according to the counting information added by the adding module 501 when the second executing module 502 executes the specified instruction.
本实施例中第二计数模块 503可以是计数器或累加器, 但不限于计数 器或累加器, 只要可以达到计数目的的硬件单元都可以。  In this embodiment, the second counting module 503 can be a counter or an accumulator, but is not limited to a counter or an accumulator, as long as the hardware unit can achieve the purpose of counting.
本发明实施例中, 处理器可以是所有架构的处理器。  In the embodiment of the present invention, the processor may be a processor of all architectures.
需要说明的是, 对于处理器实施例而言, 由于其基本相应于方法实施 例, 所以相关之处参见方法实施例的部分说明即可。  It should be noted that, for the processor embodiment, since it basically corresponds to the method embodiment, reference may be made to a part of the description of the method embodiment.
本发明实施例中, 添加模块 501在指定指令上添加计数信息, 当处理 器的第二执行模块 502执行指定指令时, 第二计数模块 503根据该指定指 令的计数信息在对应的寄存器 504中对正在执行的指定指令的执行次数进 行计数, 当添加模块 501通过扩展指定指令的长度, 在扩展的指定指令的 长度上添加计数信息时, 由于扩展的指令长度只是在存储长度上增加, 因 此不影响第二执行模块 502执行指定指令; 由于使用第二计数模块 503来 计数, 不在软件系统中写用来计数的指令, 因此大大提高了软件系统的性 能; 并在软件系统性能不受影响的情况下, 还可以根据计算的指令执行次 数解决实际出现的问题, 提高用户体验。  In the embodiment of the present invention, the adding module 501 adds the counting information to the specified instruction. When the second executing module 502 of the processor executes the specified instruction, the second counting module 503 is in the corresponding register 504 according to the counting information of the specified instruction. The number of executions of the specified instruction being executed is counted. When the add module 501 adds the count information to the length of the extended specified instruction by extending the length of the specified instruction, since the extended instruction length is only increased in the storage length, it does not affect The second execution module 502 executes the specified instruction; since the second counting module 503 is used for counting, the instruction for counting is not written in the software system, thereby greatly improving the performance of the software system; and in the case that the performance of the software system is not affected It is also possible to solve the actual problem according to the number of executed instruction executions and improve the user experience.
本领域普通技术人员可以理解: 实现上述方法实施例的全部或部分步 骤可以通过程序指令相关的硬件来完成, 前述的程序可以存储于一计算机 可读取存储介质中, 该程序在执行时, 执行包括上述方法实施例的步骤; 而前述的存储介质包括: ROM、 RAM, 磁碟或者光盘等各种可以存储程 序代码的介质。 最后应说明的是: 以上实施例仅用以说明本发明的技术方案, 而非对 其限制; 尽管参照前述实施例对本发明进行了详细的说明, 本领域的普通 技术人员应当理解: 其依然可以对前述各实施例所记载的技术方案进行修 改, 或者对其中部分技术特征进行等同替换; 而这些修改或者替换, 并不 使相应技术方案的本质脱离本发明各实施例技术方案的精神和范围。 A person skilled in the art can understand that all or part of the steps of implementing the above method embodiments may be completed by using hardware related to program instructions, and the foregoing program may be stored in a computer readable storage medium, and the program is executed when executed. The foregoing steps include the steps of the foregoing method embodiments; and the foregoing storage medium includes: a medium that can store program codes, such as a ROM, a RAM, a magnetic disk, or an optical disk. It should be noted that the above embodiments are only for explaining the technical solutions of the present invention, and are not intended to be limiting; although the present invention has been described in detail with reference to the foregoing embodiments, it will be understood by those skilled in the art that: The technical solutions described in the foregoing embodiments are modified, or some of the technical features are equivalently replaced. The modifications and substitutions do not depart from the spirit and scope of the technical solutions of the embodiments of the present invention.

Claims

权 利 要 求 书 Claim
1、 一种对指令执行次数进行计数的方法, 其特征在于, 包括: 对应预定处理器的指令空间地址, 在预设的存储空间中划分计数空 间; A method for counting the number of times of execution of an instruction, comprising: corresponding to an instruction space address of a predetermined processor, dividing a count space in a preset storage space;
在所述预定处理器内设置计数模块, 当所述预定处理器执行第一指令 时, 所述计数模块根据所述第一指令的地址, 在所述计数空间中的对应位 置对所述第一指令的执行次数进行计数。  Setting a counting module in the predetermined processor, when the predetermined processor executes the first instruction, the counting module pairs the first position in the corresponding position in the counting space according to the address of the first instruction The number of executions of the instruction is counted.
2、 根据权利要求 1所述的对指令执行次数进行计数的方法, 其特征 在于, 所述第一指令为软件系统的多个业务流程中每个业务流程的预设指 令时, 所述方法还包括:  2. The method for counting the number of times the instruction is executed according to claim 1, wherein the first instruction is a preset instruction of each of the plurality of business processes of the software system, the method further Includes:
根据所述多个业务流程中每个业务流程的预设指令执行次数的计数 结果, 确定主要业务流程。  The main business process is determined according to the counting result of the preset instruction execution times of each of the plurality of business processes.
3、 一种对指令执行次数进行计数的方法, 其特征在于, 包括: 在指定指令上添加计数信息;  3. A method for counting an instruction execution count, comprising: adding count information to a specified instruction;
在处理器内部设置计数模块, 当所述处理器执行所述指定指令时, 所 述计数模块根据所述正在执行的指定指令的计数信息, 在对应的寄存器中 对所述正在执行的指定指令的执行次数进行计数。  Setting a counting module inside the processor, when the processor executes the specified instruction, the counting module, according to the counting information of the specified instruction being executed, in the corresponding register, the specified instruction being executed The number of executions is counted.
4、 根据权利要求 3所述的对指令执行次数进行计数的方法, 其特征 在于, 所述在指定指令上添加计数信息, 包括:  The method of counting the number of times of execution of an instruction according to claim 3, wherein the adding the counting information to the specified instruction comprises:
扩展指定指令的长度, 在扩展的指定指令的长度上添加计数信息。 The length of the specified instruction is extended, and the count information is added to the length of the extended specified instruction.
5、 根据权利要求 3或 4所述的对指令执行次数进行计数的方法, 其 特征在于, 所述计数信息包括: 计数使能标记和寄存器索引。 5. The method of counting the number of times an instruction is executed according to claim 3 or 4, wherein the count information comprises: a count enable flag and a register index.
6、 根据权利要求 5所述的对指令执行次数进行计数的方法, 其特征 在于, 所述计数模块根据所述指定指令的计数信息, 在对应的寄存器中对 所述指定指令的执行次数进行计数, 包括:  The method of counting the number of executions of an instruction according to claim 5, wherein the counting module counts the number of executions of the specified instruction in a corresponding register according to the counting information of the specified instruction. , including:
所述计数模块根据所述指定指令的计数使能标记判断是否需要对所 述指定指令的执行次数进行计数; The counting module determines, according to the count enable flag of the specified instruction, whether the need is Counting the number of executions of the specified instruction;
如果是, 则所述计数模块根据所述寄存器索引在对应的寄存器中对所 述指定指令的执行次数进行计数;否则,所述处理器只执行所述指定指令。  If so, the counting module counts the number of executions of the specified instruction in the corresponding register according to the register index; otherwise, the processor executes only the specified instruction.
7、 根据权利要求 3至 6中任一项所述的对指令执行次数进行计数的 5 方法, 其特征在于, 所述指定指令为软件系统的多个业务流程中每个业务 流程的预设指令时, 所述方法还包括:  The method for counting the number of executions of an instruction according to any one of claims 3 to 6, wherein the specified instruction is a preset instruction for each business process in a plurality of business processes of the software system. The method further includes:
根据所述多个业务流程中每个业务流程的预设指令执行次数的计数 结果, 确定主要业务流程。  The main business process is determined according to the counting result of the preset instruction execution times of each of the plurality of business processes.
8、 一种对指令执行次数进行计数的系统, 其特征在于, 所述系统包 ° 括: 预定处理器和存储计数装置;  8. A system for counting the number of times an instruction is executed, wherein the system includes: a predetermined processor and a storage counting device;
所述预定处理器包括第一执行模块和第一计数模块;  The predetermined processor includes a first execution module and a first counting module;
所述第一执行模块, 用于执行第一指令;  The first execution module is configured to execute a first instruction;
所述第一计数模块, 用于当所述第一执行模块执行所述第一指令时, 根据所述正在执行的第一指令的地址, 在所述存储计数装置中的对应位置 对所述第一指令的执行次数进行计数。  The first counting module is configured to, when the first execution module executes the first instruction, according to an address of the first instruction being executed, to a corresponding position in the storage counting device The number of executions of an instruction is counted.
9、 根据权利要求 8 所述的对指令执行次数进行计数的系统, 其特征 在于, 所述存储计数装置为高速内存或寄存器。  9. The system for counting the number of times an instruction is executed according to claim 8, wherein the storage counting means is a high speed memory or a register.
10、 一种处理器, 其特征在于, 所述处理器包括: 添加模块、 第二执 行模块、 第二计数模块和寄存器;  A processor, comprising: an adding module, a second executing module, a second counting module, and a register;
° 所述添加模块, 用于在指定指令上添加计数信息;  ° The adding module is used to add counting information on the specified instruction;
所述第二执行模块, 用于执行所述指定指令;  The second execution module is configured to execute the specified instruction;
所述第二计数模块, 用于当所述第二执行模块执行所述指定指令时, 根据所述添加模块添加的计数信息, 在所述寄存器中对所述第二执行模块 正在执行的指定指令的执行次数进行计数。  The second counting module is configured to: when the second execution module executes the specified instruction, specify a instruction that is being executed by the second execution module in the register according to the counting information added by the adding module The number of executions is counted.
PCT/CN2010/071391 2010-03-29 2010-03-29 Method, system and processor for performing count of instruction execution times WO2011120216A1 (en)

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Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5797019A (en) * 1995-10-02 1998-08-18 International Business Machines Corporation Method and system for performance monitoring time lengths of disabled interrupts in a processing system
CN1604044A (en) * 2003-09-30 2005-04-06 国际商业机器公司 Method and apparatus for selectively counting instructions and data accesses
CN1834940A (en) * 2005-12-22 2006-09-20 苏州超锐微电子有限公司 Method of realizing breakpoint modulating function by embedding counter in command
US20090157945A1 (en) * 2002-12-05 2009-06-18 Ravi Kumar Arimilli Enhanced Processor Virtualization Mechanism Via Saving and Restoring Soft Processor/System States
US20090259830A1 (en) * 2008-04-09 2009-10-15 Venkat Rajeev Indukuru Quantifying Completion Stalls Using Instruction Sampling

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5797019A (en) * 1995-10-02 1998-08-18 International Business Machines Corporation Method and system for performance monitoring time lengths of disabled interrupts in a processing system
US20090157945A1 (en) * 2002-12-05 2009-06-18 Ravi Kumar Arimilli Enhanced Processor Virtualization Mechanism Via Saving and Restoring Soft Processor/System States
CN1604044A (en) * 2003-09-30 2005-04-06 国际商业机器公司 Method and apparatus for selectively counting instructions and data accesses
CN1834940A (en) * 2005-12-22 2006-09-20 苏州超锐微电子有限公司 Method of realizing breakpoint modulating function by embedding counter in command
US20090259830A1 (en) * 2008-04-09 2009-10-15 Venkat Rajeev Indukuru Quantifying Completion Stalls Using Instruction Sampling

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