WO2012037216A3 - Staged via formation from both sides of chip - Google Patents

Staged via formation from both sides of chip Download PDF

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Publication number
WO2012037216A3
WO2012037216A3 PCT/US2011/051552 US2011051552W WO2012037216A3 WO 2012037216 A3 WO2012037216 A3 WO 2012037216A3 US 2011051552 W US2011051552 W US 2011051552W WO 2012037216 A3 WO2012037216 A3 WO 2012037216A3
Authority
WO
WIPO (PCT)
Prior art keywords
conductive
chip
sides
opening
hole
Prior art date
Application number
PCT/US2011/051552
Other languages
French (fr)
Other versions
WO2012037216A2 (en
Inventor
Vage Oganesian
Belgacem Haba
Ilyas Mohammed
Craig Mitchell
Piyush Savalia
Original Assignee
Tessera, Inc.
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tessera, Inc. filed Critical Tessera, Inc.
Priority to CN201180055321.6A priority Critical patent/CN103210486B/en
Priority to EP11767505.8A priority patent/EP2617054B1/en
Priority to KR1020137009211A priority patent/KR101855216B1/en
Priority to JP2013529287A priority patent/JP5753904B2/en
Publication of WO2012037216A2 publication Critical patent/WO2012037216A2/en
Publication of WO2012037216A3 publication Critical patent/WO2012037216A3/en

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
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    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/481—Internal lead connections, e.g. via connections, feedthrough structures
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H—ELECTRICITY
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    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76898—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics formed through a semiconductor substrate
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    • H01L23/50—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor for integrated circuit devices, e.g. power bus, number of leads
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    • H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
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    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/06—Structure, shape, material or disposition of the bonding areas prior to the connecting process of a plurality of bonding areas
    • H01L2224/061—Disposition
    • H01L2224/0618—Disposition being disposed on at least two different sides of the body, e.g. dual array
    • H01L2224/06181—On opposite sides of the body
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    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16135—Disposition the bump connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
    • H01L2224/16145—Disposition the bump connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being stacked
    • H—ELECTRICITY
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    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32135—Disposition the layer connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
    • H01L2224/32145—Disposition the layer connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being stacked
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    • H01L2224/732—Location after the connecting process
    • H01L2224/73201—Location after the connecting process on the same surface
    • H01L2224/73203—Bump and layer connectors
    • H01L2224/73204—Bump and layer connectors the bump connector being embedded into the layer connector
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    • H01L2225/03—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00
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    • H01L2225/06503—Stacked arrangements of devices
    • H01L2225/06513—Bump or bump-like direct electrical connections between devices, e.g. flip-chip connection, solder bumps
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    • H01L2225/06503—Stacked arrangements of devices
    • H01L2225/06541—Conductive via connections through the device, e.g. vertical interconnects, through silicon via [TSV]
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    • H01L2225/06541—Conductive via connections through the device, e.g. vertical interconnects, through silicon via [TSV]
    • H01L2225/06544—Design considerations for via connections, e.g. geometry or layout
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    • H01L2924/013—Alloys
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    • H01L2924/01322—Eutectic Alloys, i.e. obtained by a liquid transforming into two solid phases
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    • H01L2924/078—Adhesive characteristics other than chemical
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    • H01L2924/11—Device type
    • H01L2924/14—Integrated circuits

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)

Abstract

A method of fabricating a semiconductor assembly 10 can include providing a semiconductor element 20 having a front surface 21, a rear surface 22, and a plurality of conductive pads 50, forming at least one hole 40 extending at least through a respective one of the conductive pads 50 by processing applied to the respective conductive pad 50 from above the front surface 21, forming an opening 30 extending from the rear surface 22 at least partially through a thickness of the semiconductor element 20, such that the at least one hole 30 and the opening 40 meet at a location between the front and rear surfaces, and forming at least one conductive element 60, 80 exposed at the rear surface 22 for electrical connection to an external device, the at least one conductive element extending within the at least one hole 30 and at least into the opening 40, the conductive element being electrically connected with the respective conductive pad 50.
PCT/US2011/051552 2010-09-17 2011-09-14 Staged via formation from both sides of chip WO2012037216A2 (en)

Priority Applications (4)

Application Number Priority Date Filing Date Title
CN201180055321.6A CN103210486B (en) 2010-09-17 2011-09-14 The formation of chip both sides segmented path
EP11767505.8A EP2617054B1 (en) 2010-09-17 2011-09-14 Staged via formation from both sides of chip
KR1020137009211A KR101855216B1 (en) 2010-09-17 2011-09-14 Staged via formation from both sides of chip
JP2013529287A JP5753904B2 (en) 2010-09-17 2011-09-14 Gradual via formation from both sides of the chip

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US12/884,649 2010-09-17
US12/884,649 US8847380B2 (en) 2010-09-17 2010-09-17 Staged via formation from both sides of chip

Publications (2)

Publication Number Publication Date
WO2012037216A2 WO2012037216A2 (en) 2012-03-22
WO2012037216A3 true WO2012037216A3 (en) 2012-06-07

Family

ID=44774116

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/US2011/051552 WO2012037216A2 (en) 2010-09-17 2011-09-14 Staged via formation from both sides of chip

Country Status (7)

Country Link
US (4) US8847380B2 (en)
EP (1) EP2617054B1 (en)
JP (1) JP5753904B2 (en)
KR (1) KR101855216B1 (en)
CN (1) CN103210486B (en)
TW (1) TWI523125B (en)
WO (1) WO2012037216A2 (en)

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