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Número de publicaciónWO2012087815 A1
Tipo de publicaciónSolicitud
Número de solicitudPCT/US2011/065461
Fecha de publicación28 Jun 2012
Fecha de presentación16 Dic 2011
Fecha de prioridad23 Dic 2010
También publicado comoUS8498152, US9070472, US20120163085, US20130308381
Número de publicaciónPCT/2011/65461, PCT/US/11/065461, PCT/US/11/65461, PCT/US/2011/065461, PCT/US/2011/65461, PCT/US11/065461, PCT/US11/65461, PCT/US11065461, PCT/US1165461, PCT/US2011/065461, PCT/US2011/65461, PCT/US2011065461, PCT/US201165461, WO 2012/087815 A1, WO 2012087815 A1, WO 2012087815A1, WO-A1-2012087815, WO2012/087815A1, WO2012087815 A1, WO2012087815A1
InventoresIdan Alrod, Eran Sharon, Toru Miwa, Gerrit Jan Hemink, Nima Mokhlesi
SolicitanteSandisk Il Ltd.
Exportar citaBiBTeX, EndNote, RefMan
Enlaces externos:  Patentscope, Espacenet
Non-volatile memory and methods with soft-bit reads while reading hard bits with compensation for coupling
WO 2012087815 A1
Descripción  disponible en inglés
Reclamaciones  disponible en inglés
Citas de patentes
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WO2008042593A119 Sep 200710 Abr 2008Sandisk CorporationNonvolatile memory with error correction based on the likehood the error may occur
US507003215 Mar 19893 Dic 1991Sundisk CorporationMethod of making dense flash eeprom semiconductor memory structures
US50953448 Jun 198810 Mar 1992Eliyahou HarariHighly compact eprom and flash eeprom devices
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US534306318 Dic 199030 Ago 1994Sundisk CorporationDense vertical programmable read only memory cell structure and processes for making them
US557031521 Sep 199429 Oct 1996Kabushiki Kaisha ToshibaMulti-state EEPROM having write-verify control circuit
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US576819223 Jul 199616 Jun 1998Saifun Semiconductors, Ltd.Non-volatile semiconductor memory cell utilizing asymmetrical charge trapping
US590349517 Mar 199711 May 1999Kabushiki Kaisha ToshibaSemiconductor device and memory system
US60117254 Feb 19994 Ene 2000Saifun Semiconductors, Ltd.Two bit non-volatile electrically erasable and programmable semiconductor memory cell utilizing asymmetrical charge trapping
US604693527 Ene 19994 Abr 2000Kabushiki Kaisha ToshibaSemiconductor device and memory system
US62227627 Ago 199724 Abr 2001Sandisk CorporationMulti-state memory
US675176620 May 200215 Jun 2004Sandisk CorporationIncreasing the effectiveness of error correction codes and operating multi-level memory systems by using information about the quality of the stored data
US702373516 Jun 20044 Abr 2006Ramot At Tel-Aviv University Ltd.Methods of increasing the reliability of a flash memory
US743673317 Mar 200614 Oct 2008Sandisk CorporationSystem for performing read operation on non-volatile storage with compensation for coupling
US755123727 Sep 200523 Jun 2009Kabushiki Kaisha ToshibaTelevision receiver having dual power circuits
US20100074026 *23 Jul 200925 Mar 2010Samsung Electronics Co., Ltd.Flash memory device and systems and reading methods thereof
Otras citas
1C.E. SHANNON: "A mathematical theory of communications", BELL SYST.TECH. J., vol. 2, 1948, pages 379 - 423,623-656
2EITAN ET AL.: "NROM: A Novel Localized Trapping, 2-Bit Nonvolatile Memory Cell", IEEE ELECTRON DEVICE LETTERS, vol. 21, no. 11, November 2000 (2000-11-01), pages 543 - 545, XP011430532, DOI: doi:10.1109/55.877205
Citada por
Patente citante Fecha de presentación Fecha de publicación Solicitante Título
WO2014039459A1 *3 Sep 201313 Mar 2014SanDisk Technologies, Inc.Non-volatile storage with joint hard bit and soft bit reading
Clasificación internacionalG06F11/10, G11C16/26, G11C11/56
Clasificación cooperativaG06F11/1072, G11C11/5642, G11C16/3422, G11C16/3427, G11C29/00, G11C16/26, G11C16/34
Clasificación europeaG11C16/34D2, G11C11/56D4, G11C16/34D4, G11C16/26, G06F11/10M10
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